17results about "Angle modulation" patented technology

A radar system injects a calibrated current at a signal generator during a reset portion and acquisition portion of each chirp period. The signal generator employs “gear-switching” to reduce PLL bandwidth during an acquisition phase and to increase the phase lock loop (PLL) bandwidth during a reset phase. By employing gear switching to change the bandwidth of the PLL circuit during the different portions of each chirp period, the length of the reset period is reduced, thus improving overall efficiency of the radar system while maintaining good performance.

Systems and methods for synthesis of a modulated RF signal using a variety of modulation schemes are described. An embodiment includes a direct frequency synthesizer with frequency modulated continuous wave (FMCW) modulation that includes: a high speed BAW resonator that generates a frequency signal; a BAW oscillator that receives the frequency signal and generates an output BAW clock signal (BAW CLK); a frequency and phase estimation circuit that receives a reference clock signal from a reference clock (REF CLK) and the BAW CLK and generates a frequency error and a phase error; a frequency chirp generator that receives chirp parameters, a chirp sync signal and generates a nominal frequency control word (FCW); and a high speed digital to analog converter (HS DAC) that receives the BAW CLK and the codeword and outputs an analog signal.

The invention relates to an FMCW-based level measuring device (1) that can operate in two clearly distinct frequency bands: For this purpose, the level measuring device (1) comprises two high-frequency units (11, 12) each with a frequency-controllable oscillator (111, 112) in order to transmit radar signals (S) in the frequency bands according to the FMCW principle. HF1,2 ) to generate or, after reflection from the surface of the contents, to receive. An antenna arrangement (13) serves to transmit and receive the radar signals (S HF1, 2) towards the filling material (L) and for reception after reflection at the filling material surface, wherein a control / evaluation unit (14) is used based on the received signal (R) HF1,2The level measuring device (1) can determine the fill level (L) using the first or second frequency band. According to the invention, the level measuring device (1) is characterized by a common clock unit (15). This unit serves to form a phase-locked loop with both the first oscillator (111) and the second oscillator (121) in order to generate the corresponding radar signals (S) according to the FMCW principle. HF1,2 , R HF1,2 ) of both frequency bands. This eliminates the need for a complete phase-locked loop for each frequency band. As a result, the number of required components is reduced.

The interface between clock domains in an integrated circuit (IC) depends on the synchronization of the phase-locked loops (PLLs) that generate the clocks in the different domains and how each PLL responds to the jitter of a shared reference clock. The well-controlled, identical bandwidth (and loop dynamics) of these PLLs ensures that the reference jitter contribution is identical or even negligible. As a key component determining digital PLL bandwidth, the digitally controlled oscillator (DCO) can vary in gain due to process, temperature, and power supply IR drop between chips or modules. A calibration circuit provides gain correction factors to achieve the DCO's nominal gain and the desired / target PLL loop bandwidth. In some examples, the calibration circuit for each PLL determines the gain correction factor that results in a common jitter response for the PLLs and stores the gain correction factor in the calibration circuit.

The invention discloses a core circuit for realizing accurate modulation and demodulation based on differential signal coupling design, and the core circuit comprises a differential signal coupling module which is used for converting an input signal into a differential positive signal and a differential negative signal, and outputting the differential positive signal and the differential negative signal; the signal acquisition module is used for receiving the differential positive signal and the differential negative signal and outputting an acquisition signal; the self-adaptive filtering module is used for receiving the acquisition signal and outputting a filtering control signal; the fuzzy logic control module is used for receiving the acquisition signal and outputting a mode control signal; the threshold value control module is used for outputting a protection trigger signal based on the abnormal threshold value; and the modulation-demodulation module is used for adjusting working parameters based on the filtering control signal and the mode control signal. Therefore, the signal imbalance can be accurately compensated by combining the differential signal with the self-adaptive filtering module, modulation and demodulation can be dynamically optimized through the fuzzy logic control module, and the modulation and demodulation accuracy is remarkably improved.

A 4 frequency-shift keying (4FSK) transceiver is provided. The 4FSK transceiver includes both a 4FSK transmitter and a 4FSK receiver. The 4FSK transmitter includes a voltage-controlled oscillator (VCO) and two data links coupled to the VCO for delivering two parallel streams of input data bits to the VCO. For each pair of parallel input data bits received from the two data links, the VCO outputs a modulated signal having one of four operating frequencies via 4FSK modulation. Separately, the 4FSK receiver includes a power divider, for dividing the multi-frequency modulated signal into two paths of two binary bit streams, and a pair of low-noise amplifiers (LNAs) separately coupled to the two paths and configured as a pair of band-pass filters for filtering two different subsets of the four operating frequencies from the two binary bit streams into two filtered binary bit streams.

To provide a frequency modulation device and frequency modulation method, capable of reducing noise generated in the frequency modulation device and noise contained in a demodulation signal due to non-linearity of a voltage-controlled oscillator, and capable of suppressing increase of unwanted harmonic wave signals at demodulation.SOLUTION: A frequency modulation device according to the invention further includes: a pulse count detector (111) for demodulating a frequency modulated signal (51) and outputting a pulse density modulated signal (52); and a one-bit counter (303) for re-converting the pulse density modulated signal (52) to a frequency modulated signal (58), a feedback circuit (115) takes the pulse density modulated signal (52) as a demodulation signal (53).SELECTED DRAWING: Figure 5

Interfaces between clock domains of an integrated circuit (IC) depend on synchronization of phase-locked loops (PLLs) that generate clocks in the different domains and on how each PLL responds to jitter in a shared reference clock. The well-controlled same bandwidth (and loop dynamic) for those PLLs renders the same and, therefore, ignorable reference jitter contribution. As a key component that determines a digital PLL bandwidth, digitally controlled oscillator (DCO) may have its gain vary with process, temperature, and supply IR drop from chip to chip or even module to module. A calibration circuit provides a gain correction factor to achieve a nominal gain in DCO as well as a desired / target PLL loop bandwidth. In some examples, the calibration circuit in each PLL determines a gain correction factor that causes the PLLs to have a common jitter response and stores the gain correction factors in the calibration circuits.

An electronic device is provided. The electronic device includes a substrate and a plurality of modulation units. The plurality of modulation units are disposed on the substrate. Each of the modulation units includes a first electronic element and a second electronic element, a first signal line, a second signal line, and a third signal line. The first signal line provides a first voltage to the first electronic element. The second signal line provides a second voltage to the second electronic element. The third signal line provides a third voltage to the first electronic element and / or the second electronic element. The first voltage is different from the second voltage, and the third voltage is different from the first voltage and / or the second voltage. The electronic device of the embodiments of the present disclosure has modulation units capable of modulating the phase, bandwidth, intensity, or polarization state of electromagnetic waves.

To provide a frequency delta-sigma modulation signal output circuit capable of generating a frequency delta-sigma modulation signal with reduced noise components.SOLUTION: A frequency delta-sigma modulation signal output circuit includes: a phase modulation circuit that generates a phase modulation signal by generating n delay signals by delaying a signal under measurement, where n is any integer greater than or equal to 2, and randomly selecting one of the n delay signals in synchronization with the signal under measurement; and a frequency ratio digital conversion circuit that generates a frequency delta-sigma modulated signal using a reference signal and the phase modulation signal.SELECTED DRAWING: Figure 1

The invention discloses a pulse modulation system and method based on a neural network, and the method comprises the steps: firstly processing an input symbol bit stream through a pulse position modulation module, extracting a position-related symbol bit through an MLP, converting the position-related symbol bit into a normalized current value, and transmitting the normalized current value into a pulse neural network; controlling the occurrence time of a pulse time domain and outputting a pulse position vector by utilizing a membrane potential accumulation characteristic and a time-varying discharge threshold value of linear decline in a symbol period; extracting phase correlation symbol bits through a pulse phase modulation module, distributing the phase correlation symbol bits to positive and negative parallel channels, adjusting the phase based on a pulse position vector, and generating a pulse vector with position and phase characteristics; and finally, expanding the discrete vector into a continuous time domain pulse signal by a transposed convolutional layer. According to the invention, the limitation of hardware adaptability and expansibility of a traditional pulse modulation system is overcome, and an efficient and flexible scheme compatible with various pulse modulation variants is provided for the field of Internet of Things and wireless communication.

The invention discloses a broadband microwave vector signal source system and an implementation method thereof, relates to the technical field of microwave signals, and is characterized in that a digital technology and an analog technology are combined, a digital modulation signal is generated by utilizing an FPGA (Field Programmable Gate Array), and a fixed quadrature modulation analog output signal is generated through a DAC (Digital-to-Analog Converter) (containing a quadrature modulator); according to the broadband microwave vector signal source system, the frequency of the broadband microwave vector signal source system is reduced, the frequency of the broadband microwave vector signal source system is reduced, the frequency of the broadband microwave vector signal source system is increased, the frequency of the broadband microwave vector signal source system is increased, the frequency of the broadband microwave vector signal source system is increased, and the consistency of indexes is well guaranteed.

The invention discloses a modulation-demodulation circuit applied to impedance method human respiration detection, relates to the technical field of integrated circuits, and particularly relates to a modulation-demodulation circuit applied to impedance method human respiration detection, which comprises a phase inverter I 1, a phase inverter I 2, a single-pole double-throw switch SPDT1, a single-pole double-throw switch SPDT2 and a single-pole double-throw switch SPDT3, the single-pole double-throw switch SPDT1, the single-pole double-throw switch SPDT2 and the single-pole double-throw switch SPDT3 are connected with an RE switch SPMODCLK, an RE switch MODVEN, an RE switch SPMODP and an RE switch SPMODN; the device further comprises a chopping demodulation circuit, a control signal generation circuit and a modulation-demodulation circuit. According to the modulation-demodulation circuit applied to impedance method human body respiration detection, the novel impedance method respiration detection modulation-demodulation circuit is simple in structure and low in power consumption, the problems of circuit complexity, power consumption, envelope detection'threshold effect 'and the like of a traditional modulation-demodulation circuit are solved, and the respiration detection effect with high accuracy is achieved.

Embodiments of the present disclosure provide a calibration circuit for a phase shifter, a calibration method, a phase shifting circuit, a radio frequency transmitting circuit, a radio frequency receiving circuit, a radar sensor and an electronic device. The calibration circuit for the phase shifter comprises a phase acquisition circuit and a phase calibration circuit, wherein the phase acquisition circuit is coupled to the phase shifter, configured to modulate a radio frequency signal output by the phase shifter by using a first baseband signal, down-convert the modulated radio frequency signal to a baseband to obtain a second baseband signal containing an actual phase; the phase calibration circuit is coupled to the phase acquisition circuit, configured to obtain the actual phase in the second baseband signal, determine a calibration phase of the phase shifter according to a phase deviation between the actual phase and a preset phase shift phase, and generate a phase shift control signal to be sent to the phase shifter according to the calibration phase. The calibration circuit of the embodiments of the present disclosure has small calibration error and high precision.

The present disclosure relates to a capacitively coupled stacked class-D oscillator for galvanic isolation. The oscillator circuit includes a total of N (N > 2) class-D oscillator circuits stacked together between a supply voltage node and a reference voltage node. The output ports of adjacent class-D oscillator circuits in the disclosed oscillator circuit are coupled together through capacitors to ensure frequency and phase synchronization of the frequency signals generated by the class-D oscillator circuits. The oscillation amplitude of each class-D oscillator circuit in the disclosed oscillator circuit is 1 / N of the oscillation amplitude of a reference oscillator circuit formed by a single class-D oscillator circuit, and the current consumption of the disclosed oscillator circuit is 1 / N of the current consumption of the reference oscillator circuit.

A pulse width modulation system including a plurality of module building blocks. A master control board includes a master board timer to generate a clock signal having a master timer rate. Each of slave control boards includes a slave board timer and is configured to determine a fictive master board timer based upon timer information received from the master control board via a communication bus, and further to synchronize the timer rate of the slave board timer to the master timer rate. The timer information includes timer offset information defining a time offset between the master board timer and the slave board timer The slave control board applies the time offset in control of pulse width modulated phase outputs such that the position of a slave pulse width modulated phase output signal is controlled in relation to the fictive master board timer.

Embodiments of the present disclosure disclose a phase-locked loop, a radar system and a method for randomizing initial phases of FMCW signals. The phase-locked loop includes a phase-locked loop circuit and a random control signal generator. In response to a clock signal indicating a respective target moment of one or more target moments, the random control signal generator inputs a random control signal to the phase-locked loop circuit, so that the accumulated value of the plurality of fractional frequency division values is converted into a random value, and that a plurality of phase differences respectively corresponding to the plurality of chirp signals form a non-arithmetic sequence.