Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

13 results about "Megabit" patented technology

The megabit is a multiple of the unit bit for digital information. The megabit has the unit symbol Mbit. The megabit is closely related to the mebibit, a unit multiple derived from the binary prefix mebi (symbol Mi) of the same order of magnitude, which is equal to 2²⁰bits = 1048576bits, or approximately 5% larger than the megabit. Despite the definitions of these new prefixes for binary-based quantities of storage by international standards organizations, memory semiconductor chips are still marketed using the metric prefix names to designate binary multiples.

Systems, apparatuses, methods, and non-transitory computer-readable storage devices for wireless communication employing enhanced long-range frame format

A communication method has the step of: transmitting or receiving a physical layer protocol data unit (PPDU); wherein the PPDU has a legacy signal (L-SIG) field, at least one enhanced long range (ELR) short training field (ELR-STF), or a combination thereof for avoiding double detection of the PPDU; wherein the L-SIG field comprises a rate subfield indicating a rate different to 6 megabits per second (Mbps), and a length subfield whose value modulo 3 is nonzero; and wherein each of the at least one ELR-STF has a short training sequence (STS) corresponding to a predefined or predetermined number of repeated pulses over a predefined or predetermined time period.
Owner:HUAWEI TECH CO LTD

100M Ethernet consistency test fixture

The utility model relates to a 100-megabit Ethernet consistency test fixture. The fixture comprises a circuit substrate; the circuit substrate is provided with an Ethernet chip, a communication interface and a PIN pin. The output end of the Ethernet chip is connected with the first end of the communication interface, the input end of the PIN pin is connected with the second end of the communication interface, and the third end of the communication interface is connected with the input and output end of the to-be-tested piece. The clamp does not need to be connected with an additional microprocessor and an expensive network card chip (such as an X710 network card chip), does not need to arrange a register on the to-be-tested piece, can achieve the induction test of the to-be-tested piece, and has the advantages of being simple in circuit connection, simple in circuit composition, convenient to operate and low in cost.
Owner:XIAN HAILINGKE ELECTRONIC TECHNOLOGY CO LTD

Communication method, communication device and communication system

PCT designated stageWO2026036295A1Power managementCommunications systemPhysical layer
Provided in the embodiments of the present disclosure are a communication method, a communication device and a communication system. The communication method comprises: a first device determining a first physical layer protocol data unit (PPDU), wherein the first PPDU comprises first identification information, the first identification information is used for identifying the transmission rate of a data part of the first PPDU, and the transmission rate comprises 1.5 megabits per second (Mbps) or 3 Mbps; and the first device sending the first PPDU to a second device, so as to enhance the transmission reliability.
Owner:BEIJING XIAOMI MOBILE SOFTWARE CO LTD

Four-port hundred-mega auto-negotiation optical port system based on SGMII

The invention is applicable to the field of technical improvement of internet equipment, and provides a four-port thousand-mega auto-negotiation optical port system based on an SGMII (Server Gateway Media Independent Interface), which takes NF5180 as a core exchange chip, a link is constructed by cascading two YT8614 interface expansion chips, a first-stage YT8614-0 is connected with an SGMII interface of the exchange chip, a secondary YT8614-1 optical port is connected with an external optical module and is set to be in an electric port following optical port mode, and the SGMII is connected with an optical port. And the electric ports of the two are coupled through a 0.1 mu F capacitor AC. The switching chip reads the identification code identification rate of the optical module equipment by means of the I2C bus, then the YT8614-1 is configured through the SMI bus, and automatic switching between gigabit and 100M of an optical port is realized by combining electric port auto-negotiation and SGMII one-way configuration, so that the hardware utilization rate and the system flexibility are improved, and the method is suitable for a multi-rate industrial scene.
Owner:SHENZHEN YUANTUO PHOTOELECTRIC TECH CO LTD

Superconductor Memory Architecture From Delay Lines

PendingUS20260094644A1Digital storageSoftware engineeringMegabit
Recent advances in logic schemes and fabrication processes have renewed interest in using superconductor electronics for energy-efficient computing and quantum control processors. However, scalable superconducting memory still poses a challenge. To address this issue, this disclosure presents an alternative to approaches that solely emphasize storage cell miniaturization by exploiting the minimal attenuation and dispersion properties of superconducting transmission lines to develop a delay-line memory system. The fully superconducting design is operable at frequencies ranging from approximately 20 GHz to 100 GHz and achieves data densities on the order of tens to thousands of megabits per square centimeter. Additionally, the circulating nature of this design allows for minimal control circuitry, eliminates the need for data splitting and merging, and enables inexpensive implementations of sequential access and content-addressable memories.
Owner:THE RGT UNIV OF MICHIGAN

Systems and methods for providing content based on multiple angles

Systems and methods are described herein for identifying camera angles, based on network parameters, for content available at multiple camera angles. The system determines a network parameter of a network used to provide content that is recorded or rendered at various camera angles. The determined network parameters are used to identify camera angles that are supported by the network. For example, the video data associated with a camera angle having a prerequisite bit rate of 5 Megabits per second is supported by a network having a bandwidth parameter of 40 Mbps, while another camera angle having a prerequisite bit rate of 45 Megabits per second is not supported by the bandwidth parameter of 40 Mbps. The system provides the video data for identified camera angles supported by the network to a device for display.
Owner:ADEIA GUIDES INC

Communication method, communication device and communication system

The embodiment of the invention provides a communication method, communication equipment and a communication system. The communication method comprises the steps that first equipment determines a first physical layer protocol data unit PPDU; wherein the first PPDU comprises first identification information, and the first identification information is used for identifying the transmission rate of the data part of the first PPDU; the transmission rate comprises 1.5 megabits per second Mbps or 3 Mbps; and the first device sends the first PPDU to a second device to enhance the transmission reliability.
Owner:BEIJING XIAOMI MOBILE SOFTWARE CO LTD

Mesoscale nonlinear optical gigascope system with real-time gigapixel mosaic-stitching and digital display

A mesoscale nonlinear optical gigascope (mNLOG) system is provided to assist with rapid gigapixel resonant-raster laser-scanning and post-processing-free digital display of a centimeter-scale biological specimen in real-time. The mNLOG system enables a half-a-micron digital resolution with satisfied Nyquist-Shannon criterion while providing an aliasing-free optically-sectioned cumulative point-scanning area ranging from 1 square millimeter (mm) up-to 400 square mm. The mNLOG system is configured to perform a rapid artifact-compensated two-dimensional large-field mosaic-stitching (rac2D-LMS) process, so as to provide post-processing-free gigapixel mosaic-stitching and real-time digital display with a sustained effective data throughput of at least 500 Megabits per second (Mbps).
Owner:NAT TAIWAN UNIV

Interleaved zipper code for forward error correction

Methods, apparatus, and systems for forward error correction (FEC) that involves inner and outer zipper codes are disclosed. In some embodiments, a message being sent from a transmitter in a network is encoded with a first zipper code, bits of the message are interleaved, and a second zipper code is encoded. The encoded message can then be sent to a receiver in the network where it is decoded to correct transmission errors. Decoding involves decoding the first and second zipper codes and de-interleaving bits. In some embodiments, one soft decoder and one hard decoder are used, and decoding is performed iteratively. In some embodiments, encoding the first and / or second zipper codes involves excluding some parity bits of the respective zipper code from having copies in that code's virtual buffer. Embodiments may provide improvements in the power consumption and performance of FEC, especially for 1.6 terabit-per-second optical communication.
Owner:HUAWEI TECH CO LTD

ASIC chip for high-performance aoip network audio streaming

ActiveCN119861599BProgramme controlComputer controlTransmission protocolMedia Independent Interface
The application discloses an ASIC chip for high-performance AOIP network audio stream transmission, which internally comprises a functional analog circuit subsystem, a sensor controller, a clock and reset control module, a high-speed peripheral interface subsystem arranged on a first bus, a hardware acceleration subsystem arranged on a second bus, and a low-speed peripheral interface subsystem arranged on a third bus, the second bus being connected with the first bus and the third bus respectively, and the functional analog circuit subsystem being connected with the third bus through the sensor controller; the hardware acceleration subsystem comprises a plurality of processor cores, two gigabit or megabit media independent interfaces and a real-time transmission protocol (RTP) transceiving engine; the two gigabit or megabit media independent interfaces are compatible with simplified media independent interfaces, one of the two gigabit or megabit media independent interfaces is used as a main network interface, and the other is used as a backup network interface. The reliability of AOIP network audio stream transmission is solved.
Owner:北京中电慧声科技有限公司 +1

Interleaved zipper code for forward error correction

Methods, apparatus, and systems for forward error correction (FEC) that involves inner and outer zipper codes are disclosed. In some embodiments, a message being sent from a transmitter in a network is encoded with a first zipper code, bits of the message are interleaved, and a second zipper code is encoded. The encoded message can then be sent to a receiver in the network where it is decoded to correct transmission errors. Decoding involves decoding the first and second zipper codes and de-interleaving bits. In some embodiments, one soft decoder and one hard decoder are used, and decoding is performed iteratively. In some embodiments, encoding the first and / or second zipper codes involves excluding some parity bits of the respective zipper code from having copies in that code's virtual buffer. Embodiments may provide improvements in the power consumption and performance of FEC, especially for 1.6 terabit-per-second optical communication.
Owner:HUAWEI TECH CO LTD

Systems, apparatuses, methods, and non-transitory computer-readable storage devices for wireless communication employing enhanced long-range frame format

A communication method has the step of: transmitting or receiving a physical layer protocol data unit (PPDU); wherein the PPDU has a legacy signal (L-SIG) field, at least one enhanced long range (ELR) short training field (ELR-STF), or a combination thereof for avoiding double detection of the PPDU; wherein the L-SIG field comprises a rate subfield indicating a rate different to 6 megabits per second (Mbps), and a length subfield whose value modulo 3 is nonzero; and wherein each of the at least one ELR-STF has a short training sequence (STS) corresponding to a predefined or predetermined number of repeated pulses over a predefined or predetermined time period.
Owner:HUAWEI TECH CO LTD

A data flow processing method, device and medium for binding a kernel to a network card queue

The application provides a data flow processing method for binding a kernel and a network card queue, and relates to the technical field of data flow processing, which comprises the following steps: setting the queue number of each gigabit network card and each megabit network card as the minimum value of the maximum queue number supported by each network card and the number of idle CPU cores; binding each queue of each gigabit network card and each megabit network card to an idle CPU core; setting the queue number of each gigabit network card as the minimum value of the maximum queue number supported by each gigabit network card and the number of idle CPU cores, and setting the queue number of each megabit network card as the minimum value of the maximum queue number supported by each megabit network card and the number of idle CPU cores; and making each queue process the corresponding data flow through an idle CPU. The application effectively solves the problems of unsmart, unbalanced and possibly invalid resource allocation in a mixed rate network card environment.
Owner:HANGZHOU GUYI NETWORK TECH CO LTD