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15 results about "Baseband processor" patented technology

A baseband processor (also known as baseband radio processor, BP, or BBP) is a device (a chip or part of a chip) in a network interface that manages all the radio functions (all functions that require an antenna); however, this term is generally not used in reference to Wi-Fi and Bluetooth radios. A baseband processor typically uses its own RAM and firmware.

Wireless communication methods, devices, equipment and storage media for projectors

PendingCN122317609ALow noiseNoise (radio)
This invention provides a wireless communication method, apparatus, device, and storage medium for a projector. The method includes: receiving a mobile network signal through an antenna array, filtering and switching it via a radio frequency front end, and then amplifying it using a low-noise amplifier; demodulating and processing the amplified radio frequency signal using a baseband processor to obtain baseband data; encrypting and decrypting the baseband data and managing its quality of service using a network communication core processor; and transmitting the processed network data to a main control chip module via a USB interface for decoding and display scheduling, then driving the image imaging and display module for projection display. By integrating a mobile network communication module into the projector, data can be transmitted directly via the mobile network, bypassing external WiFi routers and preventing data interception during relay, thus improving data transmission security.
Owner:CHEERLUX (SHEN ZHEN) ELECTRONIC TECH CO LTD

A reconfigurable baseband processing SoC architecture based on a RISC-V extended instruction set and an instruction control method thereof

The present application relates to a kind of reconfigurable baseband processing SoC architecture based on RISC-V extension instruction set and its instruction control method, belong to communication chip and processor design technical field.For the instruction set flexibility insufficient, data handling inefficiency and dynamic reconfiguration and high energy efficiency difficult to consider of existing 5G / 6G baseband processor, the present application proposes a kind of heterogeneous computing architecture, including the RISC-V processor core cluster of supporting RV64IMAFDCV instruction set, extension instruction execution unit, vector coprocessor and reconfigurable hardware acceleration module group.By adding special instructions such as complex matrix multiplication, optimizing data path design, using double buffering mechanism and hierarchical reconfigurable technology, efficient execution of baseband processing is realized.At the same time, dynamic voltage frequency regulation system can adjust power supply parameters in real time according to work load.The scheme significantly improves the performance and energy efficiency of baseband processing, and is suitable for physical layer signal processing of 5G / 6G communication system.
Owner:GUANGDONG COMM & NETWORKS INST +1

Fast SRS antenna port switching for frequency-division duplexing

PendingUS20260189251A1Transmitted powerMobile device
Methods and systems for fast sounding reference symbol (SRS) antenna port switching for FDD. A mobile device can include a baseband processor and a front end including a transmit power amplifier, a first transmit path, and a second transmit path. The front end can be configurable in a first mode to transmit via the first transmit path within a transmit band of a frequency division duplex band. The front end can be further configurable in a second mode to transmit via the second transmit path within a receive band of the frequency division duplex band.
Owner:SKYWORKS SOLUTIONS INC

Processing slice information with S-NSSAI mapping for UICC

A user equipment (UE) is provided for processing slice information having a Single Network Slice Selection Assist Information (S-NSSAI) mapping for a Universal Integrated Circuit Card (UICC) processor. The UE operates by determining whether its baseband processor is busy. Based on the determination that the baseband processor is not busy, the baseband processor transmits a retrieval message to the UE's UICC processor, wherein the retrieval message is transmitted in response to receiving an active command pending message from the UICC processor. The baseband processor receives an active command message from the UICC processor, wherein the active command message corresponds to a request for Single Network Slice Selection Assist Information (S-NSSAI) information corresponding to one or more network slices. Finally, the baseband processor transmits a response message with the S-NSSAI information to the UICC processor.
Owner:APPLE INC

Transmitter hardware sharing

ActiveUS12665620B2TransmissionComputer hardwareFrequency synthesizer
Methods and apparatus for transmitting wireless signals using multiple transmit chains that share hardware components to reduce transmitter circuit area. One example transmitter circuit for wireless communications generally includes a first transmit chain and a second transmit chain. The first transmit chain and the second transmit chain share a digital-to-analog converter (DAC). For certain aspects, the first transmit chain and the second transmit chain may also share a frequency synthesizer and / or a baseband processor.
Owner:QUALCOMM INC

Wireless access point device

The embodiment of the present application provides a wireless access point device. The wireless access point AP device comprises a first wireless baseband processor and a second wireless baseband processor; the first wireless baseband processor provides wireless communication services for station STA devices in a first sub-region through a first sub-device; the first wireless baseband processor provides wireless communication services for station STA devices in a second sub-region through a second sub-device; the second wireless baseband processor provides wireless communication services for station STA devices in a third sub-region through a third sub-device; wherein the third sub-region is located between the first sub-region and the second sub-region. The method is used to improve the quality of communication services.
Owner:RUIJIE NETWORKS CO LTD

Codebook subset design for uplink data transmission

ActiveUS12676651B2Multi inputPrecoding
A user equipment (UE), a base station, a baseband processor or other network device can determine a codebook subset configuration of a plurality of multiple-input multiple-output (MIMO) layers for antenna ports of a codebook. The codebook subset configuration can include a nested structure based on a codebook configured for a fully-coherent UE, or a codebook configured for a partially-coherent UE. Fully-coherent precoders, a set of partially-coherent precoders or a set of non-coherent precoders can be configured in the codebook subset configuration to reduce a number of precoders from the partially-coherent precoders or the non-coherent precoders.
Owner:APPLE INC

Atom-based closed-loop control for electromagnetic radiation measurement, communications, and information processing

PendingUS20260186040A1Waveform analysisLoop control
A method for atom-based closed-loop control includes exciting atoms of a gas into one or more Rydberg states, applying one or more signal processing functions to the one or more Rydberg states, and regulating a characteristic of the applied one or more signal processing functions based on, at least in part, a response of the one or more Rydberg states to the one or more signal processing functions. A system for internal quantum-state-space interferometry includes an atomic receiver, an interferometric pathway, and a detector. The interferometer includes an atomic vapor with first atomic states and second atomic states. The interferometric pathway from RF phases between the first and second atomic states is closed by a quantum-state-space. The detector is configured to detect a readout of an interferometric signal. Embodiments include atom-based automatic level control, baseband processors, phase-locked loops, voltage transducers, raster RF imagers and waveform analyzers.
Owner:RYDBERG TECHNOLOGIES INC

customer premise equipment

ActiveCN116112049BImprove experienceImprove communication statusTransceiverCustomer-premises equipment
The application relates to a customer premises equipment, which comprises an antenna group, a switch circuit, a radio frequency circuit, a baseband processor, a radio frequency transceiver and a control logic unit module, wherein the switch circuit is connected with a first transmitting antenna and a second transmitting antenna respectively, the radio frequency circuit comprises a transceiving module and a plurality of receiving modules, the transceiving module is connected with the switch circuit and at least one receiving antenna respectively, and each receiving module is connected with at least one receiving antenna; the baseband processor is used for generating a first switching instruction in a first switching mode; the radio frequency transceiver is used for generating a second switching instruction in a second switching mode; and the control logic unit module is used for generating a target switching instruction according to the first switching instruction and / or the second switching instruction to instruct the switch circuit to switch the first transmitting antenna to the second transmitting antenna, so that the use scene of the transmitting antenna switching can be enriched, the coverage range of the transmitting antenna in the customer premises equipment can be improved, and the communication performance is improved.
Owner:GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD

Analog predistortion (APD) for power amplifier

Systems and methods for analog predistortion (APD) in power amplifiers are disclosed. In one aspect, APD may be provided in a front-end module (FEM) of a transmitter. More specifically, the APD may include different predistortions based on where within a frequency band the signal to be distorted is operating (i.e., sub-band APD). The APD in the FEM may further be based on operating conditions such as temperature within the FEM. Still further, the FEM may be configured to apply different APD based on whether or not a baseband processor (BBP) applies digital predistortion (DPD). At a minimum, the provision of the APD may make the operation of a power amplifier in FEM more linear. Further, where DPD is present, the use of the APD may simplify the requirements for the DPD provided in the BBP.
Owner:QORVO US INC

Method and system for end-to-end calibration of a channel emulator

ActiveUS12671430B2Computer hardwareConverters
The technology disclosed teaches a system and methods for end-to-end self-calibration of a channel emulator, wherein the channel emulator includes at least one channel emulator signal chain and at least one integrated parallel calibration signal chain. The channel emulator signal chain further includes an input signal, a first signal conditioner, a first analog-to-digital converter, a baseband processor, second signal conditioner, and an output. The integrated parallel calibration signal chain further includes a sequence generator, wherein the sequence generator is configured to generate a pseudo-random sequence upon which a calibration analysis signal is overlayed. On the supplying side, the sequence generator is coupled to a second digital-to-analog converter for supplying the calibration analysis signal to be processed by the channel emulator signal chain. On the evaluating side, the sequence generator is coupled to a comparator for evaluating results of the processed calibration analysis signal.
Owner:VIAVI SOLUTIONS LICENSING LLC

IoT device data interaction system based on edge computing

ActiveCN121309662BIdentify and suppress abnormal conditions such as faultsEnsure initial securityDigital data protectionPlatform integrity maintainanceSynthetic dataEngineering
This invention provides an edge computing-based IoT device data interaction system, relating to the field of digital information transmission technology. The invention ensures initial data security through a 5G baseband processor and encrypted digital signatures; it then initiates cross-validation of data credibility, dynamically generates sensitization coefficients based on macro-risk levels, and nonlinearly amplifies micro-anomalies. Combined with a fusion decision matrix, a comprehensive data credibility index is calculated, thereby assessing data logical consistency in real time and enhancing system robustness and data credibility. Based on a gradient control strategy and a multi-level permission partitioning model, it triggers defense action combinations and information pushes precisely matched to threat levels, realizing a shift from passive response to proactive early warning and ensuring the minimization, accuracy, and security of information distribution.
Owner:SHANDONG YOUTH UNIV OF POLITICAL SCI

Reconfigurable OFDM Baseband Processor

PendingAU2025283574A1Register allocationPathPing
20 25 28 35 74 18 D ec 2 02 5 A B S T R A C T 2 0 2 5 2 8 3 5 7 4 1 8 D e c 2 0 2 5 1 / 2 C o n tr o l p a th R ec o n fi g u ra b le s ta te m ac h in e R eg is te r In te rr u p t co n tr o l m o d u le In te rr u p t si g n al T X d at a R X d at a R eg is te r S ta te m a ch in e A cc el er at io n c o re D M A S am p le p o in t p ro ce ss in g u n it R eg is te r S ta te m a ch in e A cc el er at io n c o re D M A S y m b o l p ro ce ss in g u n it R eg is te r S ta te m a ch in e A cc el er at io n c o re D M A B lo ck p ro ce ss in g u n it D M A D at a p ac k e t m a n ag em en t m o d u le M ai n b u s in te rf ac e D at a tr an sm is si o n b u s D a ta p a th S h ar ed m em o ry u n it N b an k s O F D M b a se b a n d p ro ce ss o r C o n n ec te d t o a r eg is te r co n fi g u ra ti o n b u s a n d a d at a tr a n sm is si o n b u s S la v e b u s in te rf ac e R eg is te r co n fi g u ra ti o n b u s F IG . 1 Interrupt Control Interrupt signal control path Reconfigurable state machine Register module Register configuration bus State State State Main bus TX data Register machine Register Register DMA machine machine interface Data packet Acceleration core Acceleration core Acceleration core management RX data DMA Sample point DMA Symbol Block module 1 / 2 DMA processing processing processing unit unit unit Data transmission bus Data path Shared memory unit Connected to a register configuration bus and a Slave bus N banks OFDM baseband processor data transmission bus interface FIG. 1 20 25 28 35 74 18 D ec 2 02 5 2 0 2 5 2 8 3 5 7 4 1 8 D e c 2 0 2 5 Reconfigurable state machine Register configuration bus V T X d a t a m a c h i n e m a c h i n e Acceleration coreAcceleration core R X d a t a S a m p l e p o i n t p r o c e s s i n g p r o c e s s i n g Data transmission bus Shared memory unit N b a n k sO F D M b a s e b a n d p r o c e s s o r
Owner:HANGZHOU VANGO TECH

Device for use in wireless communication

PendingUS20260149960A1TransmissionSecurity arrangementModem deviceSecurity domain
This wireless communication device includes an embedded universal integrated circuit card (eUICC) and a communication modem. The eUICC has two parts: the SGP.22 part, containing the MNO1 profile and its Issuer Security Domain Root (ISD-R); and the SGP.32 part, with the MNO2 profile and its ISD-R. The modem features at least two baseband processors: the first for the MNO1 profile and the second for the MNO2 profile. The MNO1 profile is managed by a Local Profile Assistant (LPA), which can select the first ISD-R, while the MNO2 profile is managed by an IoT Profile Assistant (IPA), which can select the second ISD-R. The device is configured so that at least one of the profiles, MNO1 or MNO2, is active at any time.
Owner:GIESECKE DEVRIENT MOBILE SECURITY GERMANY GMBH