37 results about "Cmos power amplifier" patented technology

A power amplifier (PA) provides dynamic stability and gain control for linear and non-linear operation. The PA operates with a baseband processor and a transmitter, in which the PA receives a signal from the transmitter for power amplification prior to transmission of the signal. The PA is configured to select between the linear mode of operation and the non-linear mode of operation, in which device scaling within the PA is achieved by changing a device sizing of at least one stage of the PA. Further to changing the device size, the PA changes biasing resistance and impedance of a matching network in response to the changing of the device size to control power output and stability for the PA.

A small-sized on-chip complementary metal-oxide semiconductor (CMOS) Power Amplifier having improved efficiency is provided herein. The on-chip CMOS power amplifier is capable of improving efficiency and maximizing output thereof by enhancing a K factor, which may cause a problem in a power amplifier having a distributed active transformer structure. The on-chip CMOS power amplifier having an improved efficiency and being fabricated in a small size, the on-chip CMOS power amplifier includes a primary winding located at a first layer, secondary windings located at a second layer, which is an upper part of the first layer, the secondary windings being located corresponding to a position of the primary winding, and a cross section for coupling the second windings with each other.

The invention discloses a 0.1-5GHz ultra-wideband CMOS (complementary metal oxide semiconductor) power amplifier which comprises an input matching circuit, an ultra-wideband driving-stage amplifying circuit, an ultra-wideband power amplifying circuit and an output direct-current blocking circuit. A first ultra-wideband driving stage is used for acquiring preceding-stage gain and guaranteeing ultra-wideband input matching of the integral circuits; an ultra-wideband driving power stage is used for guaranteeing high power output of the integral circuits and an excellent ultra-wide output matching characteristic of the integral circuits. The 0.1-5GHz ultra-wideband CMOS power amplifier has the advantages that a double-stage stacking structure is combined with a compensation capacitive circuit, so that a chip is small in area and wide in bandwidth; parameters of the amplifier can be determined after various indexes such as the gain, bandwidths and output power of the integral circuits are integrated in the integral circuits, so that requirements on high gain, linearity and driving power and flatness at the bandwidth of 0.1-1.5GHz can be met.

The invention discloses a CMOS power amplifier with high linearity. The CMOS power amplifier comprises an amplifier unit and an envelope detection unit. The amplifier unit comprises one or more power transistors used for performing power amplification on input signals to obtain output signals. The envelope detection unit detects the input signals of the power transistors and generates envelope signals to serve as substrate bias voltages of the corresponding power transistors. According to the CMOS power amplifier disclosed by the invention, as the substrate voltages of the power transistors are adjusted by the envelope signals of the input signals of the power transistors, the linearity of the power amplifier can be effectively improved, and compared with the prior art of adjusting the grid voltages or supply voltages of the power transistors by adopting the envelope signals, the linearity is improved more effectively. The CMOS power amplifier further has a certain effect of improving the efficiency of the power amplifier.

Embodiments of the invention may provide CMOS power amplifiers with power mode control to provide the desired power-added efficiency (PAE), idle current, output power, and Adjacent Channel Leakage Ratio (ACLR). For instance, there may be a multi-mode WCDMA CMOS RF power amplifier having high/medium/low output power modes aimed to achieve high PAE and low idle current in a portable wireless environment. According to an example embodiment, a CMOS RF power amplifier may provide a plurality of separate signal paths for purposes of supporting multi-power modes. For example, there may be a first signal path which supports a high-power mode, and a second path which is subsequently divided into two recursive signal paths or sub-paths to support respective medium and low-power modes. One of the three power modes may be selected or controlled using bias control switches in the first and second paths.

There is provided a multi-stage CMOS power amplifier including: a driver amplifier having differential output terminals, inverting differential signals input through first and second input terminals and outputting the respective inverted signals through the differential output terminals; a transformer for power matching having a primary coil connected between the differential output terminals of the driver amplifier and a secondary coil coupled with the primary coil using electromagnetic induction, having a predetermined turns ratio to the primary coil, and connected to a direct current (DC) tuning voltage terminal; and a power amplifier power-amplifying differential signals passing through one end and the other end of the secondary coil of the transformer and outputting the respective power-amplified differential signals through first and second output terminals.

Disclosed herein is a transformer including: a primary coil formed of a first conductor having a predetermined length and including a first end and second end for receiving a signal, wherein the first conductor is formed as a first loop; and a secondary coil that is coupled to the primary coil in an electromagnetic coupling, and is formed of a second conductor having a predetermined length and including a first end and a second end for outputting a signal, wherein the second conductor is formed as a second loop, wherein the primary coil and the secondary coil are stacked while crossing each other. Accordingly, power transformer efficiency may be increased.

A CMOS power amplifier includes: a first MOS transistor connected between a first power terminal and a first output stage and having a gate connected to an input stage; a second MOS transistor connected between the first output stage and a ground and having a gate connected to the input stage; a switching circuit unit connecting or separating a feedback line between the input stage and the first output stage to select a linear amplifying operation or a non-linear amplifying operation; and a resistor formed at the feedback line between the input stage and the first output stage to determine a linear amplification gain when the feedback line is turned on.

There is provided a complementary metal oxide semiconductor (CMOS) power amplifier including: a load unit connected between an operating voltage supply terminal and an output terminal; an amplifying unit formed as a cascode structure between the load unit and a ground, amplifying a power of an input signal input through an input terminal and outputting the amplified signal through an output terminal; and a threshold voltage control unit varying a threshold voltage of the amplifying unit according to a magnitude of the input signal input through the input terminal.

The invention discloses a CMOS power amplifier matching circuit. The CMOS power amplifier matching circuit comprises a circuit board and an extra-chip matching network and a power amplification integrated chip which are arranged on the circuit board; the power amplification integrated chip comprises a high frequency power amplifier, a low frequency power amplifier and an intra-chip matching network, the high frequency power amplifier is connected with the intra-chip matching network, and the low frequency power amplifier is connected with the extra-chip matching network. The CMOS power amplifier matching circuit can integrate the advantages of the intra-chip matching network and the extra-chip matching network, and a PA is divided into a high frequency part and a low frequency part, wherein the high frequency part is achieved through the intra-chip matching network, and design difficulty of the PCB is decreased; the low frequency part is achieved through the extra-chip matching network, and good performance is achieved.

CMOS power amplifiers (PAs) are disclosed having one or more integrated one-time programming (OTP) memories that are utilized to control at least in part operation of the CMOS PAs. The integrated OTP memories within the CMOS power amplifiers (PAs) allow adjustments, such as one-time factory trimming, of CMOS PA integrated circuits to optimize or improve performance. With this capability, for example, the tuning and biasing of stages within a multi-stage amplifier within a CMOS PA can be measured during factory test and adjusted by setting one or more bits in the OTP memories, as desired. Further, the operation of other circuitry within the PA can also be controlled at least in part with parameter settings stored in the OTP memories.

The invention belongs to the technical field of millimeter wave communication, and particularly provides a V-band CMOS power amplifier which is used for solving the problems that in the prior art, thecircuit structure is complex, the chip area is large, and the design difficulty of an amplifier matching circuit is large. The amplifier comprises an input matching circuit, a first-stage amplification circuit, an inter-stage matching circuit, a second-stage amplification circuit and an output matching circuit which are connected in sequence, wherein the two stages of amplification circuits are formed by stacking transistors M1 (or M3) and M2 (or M4) respectively; the transistor stacking mode is simple in structure, the breakdown risk of the transistors can be effectively reduced, and the optimal power amplifier saturation output power is obtained; meanwhile, the transistor stacking structure can greatly improve the stability of the millimeter wave power amplification circuit; in addition, the input and output matching circuits in a grounding coplanar waveguide form can further improve the gain and the output power of the millimeter wave amplifier while realizing good input and outputmatching of the stacked transistors in a millimeter wave frequency band.

The invention relates to a radio frequency module integration technology applied to mobile equipment, and discloses an on-chip CMOS power amplifier with a temperature compensation function. The power amplifier comprises a multi-path band-gap reference current source, a first-stage amplifying circuit, a second-stage amplifying circuit, a third-stage amplifying circuit, a first biasing circuit, a second biasing circuit and a third biasing circuit; the multi-channel band-gap reference current source provides current for the three bias circuits, the radio frequency signal input total port is connected with the input end of the first-stage amplification circuit, the output end of the first-stage amplification circuit is connected with the input end of the second-stage amplification circuit, the output end of the second-stage amplification circuit is connected with the input end of the third-stage amplification circuit, and the output end of the third-stage amplification circuit is connected with the radio frequency signal output total port. A three-stage amplification circuit structure is adopted, gain fluctuation and output power fluctuation in high and low temperature states are compensated, and the requirements of a system can be well met.

The invention discloses an overvoltage protection circuit and an overvoltage protection method of a CMOS power amplifier. The circuit comprises a stack tube circuit, a voltage sensor, a voltage amplitude limiter and a subtracter, one end of the tube stacking circuit is connected with the voltage sensor and the voltage amplitude limiter, and the other end of the tube stacking circuit is connected with the subtracter. According to the circuit, a voltage limiter and a subtracter of a voltage sensor are additionally arranged on the basis of an original stack tube circuit; the two MOS tubes in thestacked tube circuit are protected against breakdown under the limit working condition, the voltage of the whole CMOS power amplifier circuit under the limit condition can be adjusted to be within thesafety range according to the negative feedback adjustment principle, and the circuit is simple and reasonable in design, safe and reliable. Meanwhile, the method can improve the safety and reliability of the CMOS power amplifier, and guarantees that the CMOS power amplifier can still work safely under the overvoltage condition.