0.1-5GHz CMOS (complementary metal oxide semiconductor) power amplifier

Abstract

The invention discloses a 0.1-5GHz ultra-wideband CMOS (complementary metal oxide semiconductor) power amplifier which comprises an input matching circuit, an ultra-wideband driving-stage amplifying circuit, an ultra-wideband power amplifying circuit and an output direct-current blocking circuit. A first ultra-wideband driving stage is used for acquiring preceding-stage gain and guaranteeing ultra-wideband input matching of the integral circuits; an ultra-wideband driving power stage is used for guaranteeing high power output of the integral circuits and an excellent ultra-wide output matching characteristic of the integral circuits. The 0.1-5GHz ultra-wideband CMOS power amplifier has the advantages that a double-stage stacking structure is combined with a compensation capacitive circuit, so that a chip is small in area and wide in bandwidth; parameters of the amplifier can be determined after various indexes such as the gain, bandwidths and output power of the integral circuits are integrated in the integral circuits, so that requirements on high gain, linearity and driving power and flatness at the bandwidth of 0.1-1.5GHz can be met.

Description

technical field [0001] The invention relates to the field of complementary metal oxide semiconductor (CMOS) radio frequency power amplifiers and integrated circuits, in particular to an ultra-wideband CMOS radio frequency power amplifier covering the application of industry-specific network frequency bands. Background technique [0002] The rapid development of wireless communication markets such as mobile phones, cordless phones, radio frequency tags (RFID), and wireless local area networks (WLAN) has continuously promoted the development of RF front-end transceivers in the direction of high integration, low power consumption, compact structure, and low price. More and more single-chip radio frequency transceiver communication systems are designed and implemented using cheap and relatively mature and reliable CMOS technology, which requires more and more communication system sub-modules to be designed with CMOS technology while ensuring high performance, so that A highly in...

AI Technical Summary

Problems solved by technology

Compared with the GaAs process, the transistor of the CMOS process has a lower breakdown voltage and a higher knee voltage, which limits the output voltage swing of the drain of the transistor, thereby limiting the power capacity of a single transistor

In order to obtain higher power output, a typical solution will arrange multiple CMOS transistors in parallel (parallel configuration) to improve power tolerance, but this increases the gate-source capacitance, which reduces the input impedance and increases the input impedance. It is difficult to design the impedance matching of the circuit. At the same time, the optimal output load impedance of the transistor amplifier with this structure is very small, and an additional output impedance matching network is required for the impedance matching design of the output circuit, so the impedance of the output circuit is also increased. Match Design

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