14 results about "Driver amplifier" patented technology

An apparatus, including: a first amplifier including: a flipped voltage follower, and a source follower coupled in parallel with the flipped voltage follower; and a load coupled to an output of the first amplifier.

The invention discloses an ORU radio frequency gain adjusting system suitable for ORAN equipment. The system comprises a hardware platform, field programmable gate array logic and gain control software running on a main controller. The hardware platform comprises a digital radio frequency unit which is integrated in field programmable gate array logic, comprises a digital up-conversion module, a rest factor reduction module, a digital pre-distortion module and a digital down-conversion module, and provides a digital gain adjustment point; the radio frequency transceiving link comprises a digital-to-analog converter, an analog gain controller and a driving amplifier of the transmitting link; the receiving link comprises a low noise amplifier, a variable gain amplifier and an analog-to-digital converter; and a feedback link ADC; and the power amplifier unit comprises a final power amplifier and a bias control circuit thereof. According to the invention, high-precision and self-adaptive control of downlink (DL) and uplink (UL) gains can be realized, so that performance fluctuation caused by frequency and temperature changes and device batch differences can be compensated.

An acoustic noise reduction (ANR) headphone described herein has current detection circuitry that detects current consumed by an acoustic driver amplifier as a result of pressure changes due to a tapping of the headphone. Tapping may be performed to change an audio feature or operating mode of the audio system for the headphone. The current detection circuitry senses a characteristic of the current consumed by the acoustic driver amplifier that can be used to determine an occurrence of a tap event. Examples of a characteristic include an amplitude, waveform or duration of the sensed current. Advantageously, the ANR headphones avoid the need for control buttons to initiate the desired changes to the audio feature or operating mode.

This application relates to a radio communication system employing a Ku-band continuous wave power amplifier, belonging to the technical field of radio communication systems. The radio communication system includes a transmitter and a receiver. The transmitter includes an information input module, a first signal processing module, a modulator module, a power amplifier module, and a transmitting antenna. The power amplifier module includes a driver amplifier, a power divider, a waveguide combiner, and several final-stage power amplifiers. The driver amplifier is electrically connected to the modulator module and the power divider. Each of the final-stage power amplifiers is electrically connected to the power divider and the waveguide combiner. The output of the waveguide combiner is electrically connected to the transmitting antenna. This application reduces the possibility of power amplifier module burnout while ensuring normal operation of the power amplifier module, thereby ensuring the normal use of the radio communication system.

Aspects of the subject disclosure may include, for example, a common emitter stage having a differential input configured to receive an input signal from an input transmission line, a common base stage coupled with the common emitter stage and having a differential output configured to provide a differential output signal to an output transmission line, and a biasing network to bias the common base stage, the biasing network including components selected to limit common mode gain of the common base stage at relatively high frequencies of interest without affecting a differential mode gain of the common base stage. Other embodiments are disclosed.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.

A high-frequency amplifier includes: an asymmetric Doherty amplifier that amplifies an input high-frequency signal of a wavelength λ, and includes a carrier amplifier and a peaking amplifier that starts an amplification operation when an output of the carrier amplifier reaches a saturation region and has a saturation output different from that of the carrier amplifier; a driver amplifier that drives the asymmetric Doherty amplifier; a branching circuit that branches the high-frequency signal amplified by the driver amplifier into an input path to the peaking amplifier side and an input path to the carrier amplifier side; a phase adjustment circuit that is provided on either of the path to the peaking amplifier side and the path to the carrier amplifier side and delays either of a phase of an input signal of the peaking amplifier and a phase of an input signal of the carrier amplifier; a first substrate on which the carrier amplifier and the peaking amplifier are mounted; and a second substrate on which the driver amplifier, the branching circuit, and the phase adjustment circuit are mounted, wherein, when the second substrate is stacked on the first substrate in an overlapping manner, an input terminal of the driver amplifier and an input terminal of the carrier amplifier are located at positions that project onto each other, and, when n is set to an integer of 0 or more, an electrical length from the input terminal of the driver amplifier to an output terminal of the carrier amplifier is set in such a manner that a phase becomes (2n+1)π.

An apparatus, comprising: a driver amplifier (DA) circuit, comprising: a driver amplifier (DA) including a differential output; a balun including a primary winding and a secondary winding, wherein the differential output of the DA is coupled to the primary winding of the balun, and wherein the secondary winding includes a first portion and a second portion, the second portion being coupled to ground; a first programmable resistor coupled between the first portion of the secondary winding and an output of the DA circuit; and a control circuit configured to adjust a resistance of the first programmable resistor to set a voltage standing wave ratio (VSWR) at a load coupled to the output of the DA circuit.

An apparatus for implementing a Darlington circuit with a driver amplifier to provide power clamping is disclosed. In an example aspect, an apparatus includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, a power amplifier, and a Darlington circuit. The driver amplifier includes a driver amplifier output and a transistor, wherein the driver amplifier is coupled between the input port and the output port. The power amplifier includes a power amplifier input, and the power amplifier is coupled between the driver amplifier output and the output port. The Darlington circuit is coupled to the driver amplifier via a node coupled between the input port and the power amplifier input.

In some aspects, a buffer may interface an up-converter and a driver amplifier in a wireless transmitter. The buffer may comprise one or more branches that each include a first p-channel metal-oxide-semiconductor (PMOS) transistor having a source coupled to an output node, a gate coupled to an input voltage and to a first bias voltage, and a drain coupled to ground and a second PMOS transistor having a source coupled to a supply voltage, a gate coupled to an input voltage and to a second bias voltage, and a drain coupled to the output node. Accordingly, the buffer may include one or more PMOS transistor pairs in a common source and source follower configuration to provide low swing at an output from the up-converter, higher swing at an input to the driver amplifier, filter common mode noise and / or harmonics, and / or reduce undesired amplitude-to-phase modulation (AM / PM) effects.

A high-frequency amplifier includes a driver amplifier that amplifies a high-frequency signal inputted, and a Doherty amplifier including a carrier amplifier and a peak amplifier that further amplify a signal outputted from the driver amplifier, the high-frequency amplifier having a first multilayer substrate, a second multilayer substrate stacked in coincidence with the first multilayer substrate, and a base member that mounts the first multilayer substrate and the second multilayer substrate, the driver amplifier being mounted on the second multilayer substrate, the carrier amplifier and the peak amplifier being mounted on the first multilayer substrate, the driver amplifier, the carrier amplifier, and the peak amplifier each having a surface on which a prescribed circuit is formed and a back surface on an opposite side of the surface, the surface of the driver amplifier facing the first multilayer substrate, the back surface of the driver amplifier being configured to be separated from the first multilayer substrate, the back surfaces of the carrier amplifier and the peak amplifier each being in contact with the base member, the back surface of the driver amplifier being connected to a wiring layer configured on a surface of the second multilayer substrate, the wiring layer being connected to one end of a first via hole that penetrates the second multilayer substrate and the first multilayer substrate, the other end of the first via hole being connected to the base member.

In some aspects, a buffer may interface an up-converter and a driver amplifier in a wireless transmitter. The buffer may comprise one or more branches that each include a first p-channel metal-oxide-semiconductor (PMOS) transistor having a source coupled to an output node, a gate coupled to an input voltage and to a first bias voltage, and a drain coupled to ground and a second PMOS transistor having a source coupled to a supply voltage, a gate coupled to an input voltage and to a second bias voltage, and a drain coupled to the output node. Accordingly, the buffer may include one or more PMOS transistor pairs in a common source and source follower configuration to provide low swing at an output from the up-converter, higher swing at an input to the driver amplifier, filter common mode noise and / or harmonics, and / or reduce undesired amplitude-to-phase modulation (AM / PM) effects.

The utility model discloses a double-ridge waveguide and microstrip bridge combined synthesizer and a solid-state power amplifier thereof, comprising a driving amplifier for driving and amplifying an input signal; the double-ridge waveguide distributor is connected with the driving amplifier and is used for uniformly distributing the input signal which is driven and amplified into a plurality of paths of distribution signals; the first 90-degree bridge assembly is connected with the double-ridge waveguide distributor and is used for carrying out 90-degree phase conversion on the distributed signals; the final-stage synthesis amplifier assembly is connected with the first 90-degree bridge assembly and is used for amplifying the distribution signal subjected to 90-degree phase conversion to obtain a second amplification signal; the second 90-degree bridge assembly is connected with the final-stage synthesis amplifier assembly and is used for carrying out 90-degree phase conversion on the second amplification signal; the double-ridge waveguide synthesizer and the second 90-degree bridge assembly are used for synthesizing the second amplified signal subjected to 90-degree phase conversion to obtain a synthesized signal; and the waveguide port is connected with the double-ridge waveguide synthesizer.

An apparatus, comprising: a driver amplifier (DA) circuit, comprising: a driver amplifier (DA) including a differential output; a balun including a primary winding and a secondary winding, wherein the differential output of the DA is coupled to the primary winding of the balun, and wherein the secondary winding includes a first portion and a second portion, the second portion being coupled to ground; a first programmable resistor coupled between the first portion of the secondary winding and an output of the DA circuit; and a control circuit configured to adjust a resistance of the first programmable resistor to set a voltage standing wave ratio (VSWR) at a load coupled to the output of the DA circuit.