140 results about "Power-added efficiency" patented technology

A novel apparatus and method of improving the power efficiency of a digital transmitter for non-constant-amplitude modulation schemes. The power efficiency improvement mechanism of the invention leverages the high efficiency of a switched-mode power supply (SMPS) that supplies the high DC current to the transmitter's power amplifier, while compensating for its limitations using predistortion. The predistortion may be achieved using any suitable technique such as digital signal processing, hardware techniques, etc. A switched mode power supply (i.e. switching regulator) is used to provide a slow form (i.e. reduced bandwidth) of envelope tracking (based on a narrower bandwidth distorted version of the envelope waveform) such that the switching regulator can use a lower switching rate corresponding to the lower bandwidth, thereby obtaining high efficiency in the switching regulator. The resulting AM-AM and AM-PM distortions in the power amplifier are compensated through predistortion of the digital amplitude modulating signal which dictates the envelope at the PA input. Similarly, the phase modulation is also compensated prior to the PA, such that once it undergoes the distortion in the PA, the end result is sufficiently close to the desired phase.

Field effect transistors having a power density of greater than 25 W / mm when operated at a frequency of at least 4 GHz are provided. The power density may be at least 30 W / mm when operated at 4 GHz. The power density of at least 30 W / mm may be provided at a drain voltage of 120 V. Transistors with a power density of at least 30 W / mm when operated at 8 GHz are also provided. The power density of at least 30 W / mm may be provided at a drain voltage of 120 V. Field effect transistors having a power density of greater than 20 W / mm when operated at a frequency of at least 10 GHz are also provided. Field effect transistors having a power density of at least 2.5 W / mm and a two tone linearity of at least −30 dBc of third order intermodulation distortion at a center frequency of at least 4 GHz and a power added efficiency (PAE) of at least 40% are also provided.

A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by the narrowband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, the present invention could compensate the nonlinearities as well as memory effects of the power amplifier systems and also improve performances, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.

A predistortion circuit for a microwave amplifier and more particularly to predistortion circuit configured as a Doherty amplifier. The predistortion circuit is adapted to be coupled to a downstream Doherty amplifier to precompensate for the gain compression and phase expansion of the downstream Doherty amplifier as the input power level is increased while simultaneously reducing the intermodulation (IM) distortion. In order to provide precompensation, the precompensation circuit is operated at bias level to provide gain expansion and phase compression to cancel out the gain compression and phase expansion of the downstream Doherty amplifier to provide a higher overall linear power added efficiency (PAE).

A remote radio head unit (RRU) system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier inside the RRU. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by a wideband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, embodiments of the present invention can compensate for the nonlinearities as well as memory effects of the power amplifier systems and also improve performance, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers, multi-frequency bands and multi-channels. As a result, the remote radio head system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems.

A power amplifier configuration including power amplifier circuitry and power control circuitry and having improved Power Added Efficiency (PAE) is provided. The power amplifier circuitry includes one or more input amplifier stages in series with a final amplifier stage. The power control circuitry provides a variable supply voltage to the input amplifier stages based on an adjustable power control signal. The final amplifier stage is powered by a fixed supply voltage. In operation, as output power of the power amplifier is reduced from its highest power level, the variable supply voltage is reduced. Accordingly, RF power of an amplified signal provided to the final amplifier stage from the input amplifier stages decreases, and the final amplifier stage transitions from saturation to linear operation, thereby increasing the gain of the final amplifier stage. Thus, a desired output level can be maintained while operating at lower current levels.

A radio frequency amplifier system is disclosed in which the amplifier bias supply and power supply voltages are >instantaneously modulated with signals derived from the envelope voltage of the input signal. Separate non-linear mapping functions are used to derive the supply and bias voltages. The two mapping functions are optimised jointly to achieve particular system performance goals, such as optimum efficiency, constant gain, constant phase, or minimum spectral spreading. An optimisation of >particular interest is that which achieves best RF amplifier power added efficiency subject to achieving constant amplifier gain. In this way the need for pre-distortion linearization may be reduced or eliminated.

A 90-degree phase delay power divider part PSPD is connected to an input side of a carrier amplifier Amp1 and a peak amplifier Amp2, and a variable electric length power combiner VTL2 is connected to an output side thereof. A control signal Sig is applied through a control terminal Ctrl of the variable electric length power combiner VTL2, and adjustment is performed in correspondence to a carrier frequency band of a carrier signal RFs so that an electric length of the variable electric length power combiner VTL2 becomes nearly 90 degrees. As a result, an electric length of an output power combining circuit of a Doherty type amplifier can be made variable, and a power-added efficiency can be enhanced for a multi-band or broad band.

The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

An RF transmitter (60) generates non-DC bias signals (104, 106) configured to improved power-added efficiency (PAE) in the operation of an RF amplifier (94). The RF amplifier (94) generates an amplified RF signal (126) which, due to the addition of the bias signals (104, 106), includes bias-signal-induced RF distortion (48, 50). The bias signals (104, 106) drive a bias-induced distortion cancellation circuit (152) that adjusts the bias signals to compensate for the influence of impedances experienced by the bias signals (104, 106) before being applied to the RF amplifier (94). After mixing with a baseband communication signal (64), adjusted bias signals (186, 188) are combined into a composite baseband signal (76), upconverted to RF in an upconversion section 84, and applied to the RF amplifier (94) where they cancel at least a portion of the bias-signal-induced RF distortion (48, 50).

Field effect transistors having a power density of greater than 25 W / mm when operated at a frequency of at least 4 GHz are provided. The power density may be at least 30 W / mm when operated at 4 GHz. The power density of at least 30 W / mm may be provided at a drain voltage of 120 V. Transistors with a power density of at least 30 W / mm when operated at 8 GHz are also provided. The power density of at least 30 W / mm may be provided at a drain voltage of 120 V. Field effect transistors having a power density of greater than 20 W / mm when operated at a frequency of at least 10 GHz are also provided. Field effect transistors having a power density of at least 2.5 W / mm and a two tone linearity of at least −30 dBc of third order intermodulation distortion at a center frequency of at least 4 GHz and a power added efficiency (PAE) of at least 40% are also provided.

The envelope tracking power supply includes a plurality of variable voltage supplies. A power supply controller of a power amplifier controls the plurality of variable voltage supplies so as to precisely divide the power supply voltage in a high frequency area, based on the voltage distribution of a received transmitted base band signal, in order to maximize the power added efficiency of the power amplifier. The power supply controller includes a threshold memory including a plurality of first zones, and a frequency memory including a plurality of second zones. The power supply controller changes the threshold held in the first zones so that each second zone approaches the average of the second zones.

The invention discloses a design method for a radio frequency ultra-wide band high-efficiency power amplifier and a circuit. The design method includes the steps of a multi-frequency point transistor input and output impedance test, design of a maximum power transmission output impedance matching network, design of a wide band input multi-section impedance matching network, design of an input harmonic suppression network and an output harmonic suppression network and design of a transistor offset network. The transistor input and output impedance test technology achieves precise calculation of transistor input and output impedance. The maximum power transmission output impedance matching network achieves transistor impedance matching and maximum power transmission. The wide band input multi-section impedance matching network achieves wide band transistor input impedance matching. The design of the input harmonic suppression network and the output harmonic suppression network eliminates higher harmonic influences at the input end and the output end of a transistor, reduce losses and improve power additional efficiency of the amplifier. The design of the offset network provides working voltage of the transistor. The power amplifier can acquire higher frequency bandwidth, output power and power additional efficiency.

The RF power amplifier includes first and second amplifiers Q 1 and Q 2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q 1 and Q 2 are formed on one semiconductor chip. The first bias voltage Vg 1 of the amplifier Q 1 is set to be higher than the second bias voltage Vg 2 of the amplifier Q 2 so that the amplifier Q 1 is operational between Class B and AB, and Q 2 is operational in Class C. The first effective device size Wgq 1 of the amplifier Q 1 is intentionally set to be smaller than the second effective device size Wgq 2 of the amplifier Q 2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

High electron mobility transistors (HEMT) are provided having an output power of greater than 3.0 Watts when operated at a frequency of at least 30 GHz. The HEMT has a power added efficiency (PAE) of at least about 20 percent and / or a gain of at least about 7.5 dB. The total width of the HEMT is less than about 6.0 mm.

Disclosed are devices and methods for improving power added efficiency and linearity of radio-frequency power amplifiers implemented in flip-chip configurations. In some embodiments, a harmonic termination circuit can be provided so as to be separate from an output matching network configured to provide impedance matching at a fundamental frequency. The harmonic termination circuit can be configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. Such a configuration of separate fundamental matching network and harmonic termination circuit allows each to be tuned separately to thereby improve performance parameters such as power added efficiency and linearity.

To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the structure of an offset drain region existing between a gate electrode and an n+ type drain region of the power MOSFET into a double offset one. More specifically, this is accomplished by adjusting the impurity concentration of an n− type offset drain region, which is closest to the gate electrode, to be relatively low and adjusting the impurity concentration of an n type offset drain region, which is distant from the gate electrode, to be relatively high.

The present invention, generally speaking, provides an RF power amplifier that exhibits high PAE at high output powers. The design of the power amplifier is based on the observation that the switching transistor is controlled by either voltage (for a FET) or current (for bipolar transistors), but not both. Thus, it is not necessary to develop power from the driver amplifier in order to operate the final stage as a switch. This recognition runs exactly counter to conventional wisdom, i.e., the concept of impedance matching for interstage design of high efficiency power amplifiers. It is impossible to develop solely a voltage waveform or a current waveform in a passband (resonant) network such as an RF power amplifier—both voltages and current must exist. In accordance with one aspect of the invention, however, instead of maximizing power transfer, power consumption is reduced while maintaining the magnitude of the voltage (or current) waveform. In accordance with another aspect of the invention, the driver is designed to, along with the final stage, operate in switch mode. In this instance, the design of the interstage network is similar to that of a Class E output stage. In the case of the interstage network, however, the objective is not to develop maximum power across the load (as in the case of the Class E output stage). Rather, the objective is to develop the maximum voltage across the driver's load (which is the switch input). In this arrangement, the input drive of the switch may be sufficiently high that the operating voltage of the driver stage may be reduced. This reduction further reduces the DC supply power to the driver, enhancing PAE.

The invention discloses a circuit structure capable of increasing the linearity and power added efficiency of a power amplifier. The power amplifier is provided with an input transistor and an output transistor which are in cascode to form the power amplifier with the Cascode structure; a second harmonic series resonant network used for inhibiting the output of second harmonic signals is connected between the collector of the output transistor and the ground; and a third harmonic parallel resonant network used for reflecting the third harmonic signals back to the collector is connected between the collector of the output transistor and an output matching network. The second harmonic series resonant network and the third harmonic parallel resonant network can both be used to increase the linearity and power added efficiency of the power amplifier with the common structure. The base of the output transistor is connected with a second harmonic parallel resonant network composed of a fundamental wave series resonant network and a capacitor. The resonant networks can be used to control harmonic signals, thus inhibiting the output of harmonic signals and increasing the linearity and power added efficiency of the power amplifier.

The invention discloses a radio frequency power amplifier supporting multi-mode and multi-frequency, a chip and a communication terminal. The radio frequency power amplifier comprises a control and bias unit and at least two amplified emission paths, and the control and bias unit is separately connected with the amplified emission paths; and the control and bias unit controls the corresponding amplified emission path to locate in a turn-on state according to the frequency band of inputting a radio frequency signal and locating the rest amplified emission paths in a closed state. According to the radio frequency power amplifier disclosed by the invention, the optimal amplified emission path can be selected according to different frequency bands, the turn-on and turn-off of a corresponding amplification unit and a switching unit are controlled by the control and bias unit so as to amplify the radio frequency signals of different frequency bands, on one hand, the design principle of the F type power amplifiers is satisfied as much as possible to consider both of the output power and the power additional efficiency, on the other hand, corresponding harmonic waves of the amplified emission paths are filtered, so the demands of the carrier aggregation technology can be met, and the loss of the radio frequency signals on the output paths is reduced.

A multi-mode RF amplifier is disclosed having high and low output power modes and two power paths. A first RF amplifier delivers power to both paths. When the multi-mode RF amplifier is biased into the high power, HP, mode, substantial power is delivered via both (first and second) paths. While in the low power, LP, mode, an RF switch is turned off, creating a high input impedance, open circuit for the first path, and effectively isolating the two paths. Therefore, power is delivered by the first RF amplifier to the second path only. The impedance presented to the output of the first RF amplifier is equal to the input impedance of the second path which may be optimally set for maximizing power added efficiency or output power in LP mode. Note that, in a preferred embodiment, even in the HP mode more power is delivered to the second power path than to the first power path.