137 results about "Power-added efficiency" patented technology

A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by the narrowband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, the present invention could compensate the nonlinearities as well as memory effects of the power amplifier systems and also improve performances, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.

A predistortion circuit for a microwave amplifier and more particularly to predistortion circuit configured as a Doherty amplifier. The predistortion circuit is adapted to be coupled to a downstream Doherty amplifier to precompensate for the gain compression and phase expansion of the downstream Doherty amplifier as the input power level is increased while simultaneously reducing the intermodulation (IM) distortion. In order to provide precompensation, the precompensation circuit is operated at bias level to provide gain expansion and phase compression to cancel out the gain compression and phase expansion of the downstream Doherty amplifier to provide a higher overall linear power added efficiency (PAE).

A power amplifier configuration including power amplifier circuitry and power control circuitry and having improved Power Added Efficiency (PAE) is provided. The power amplifier circuitry includes one or more input amplifier stages in series with a final amplifier stage. The power control circuitry provides a variable supply voltage to the input amplifier stages based on an adjustable power control signal. The final amplifier stage is powered by a fixed supply voltage. In operation, as output power of the power amplifier is reduced from its highest power level, the variable supply voltage is reduced. Accordingly, RF power of an amplified signal provided to the final amplifier stage from the input amplifier stages decreases, and the final amplifier stage transitions from saturation to linear operation, thereby increasing the gain of the final amplifier stage. Thus, a desired output level can be maintained while operating at lower current levels.

A radio frequency amplifier system is disclosed in which the amplifier bias supply and power supply voltages are >instantaneously modulated with signals derived from the envelope voltage of the input signal. Separate non-linear mapping functions are used to derive the supply and bias voltages. The two mapping functions are optimised jointly to achieve particular system performance goals, such as optimum efficiency, constant gain, constant phase, or minimum spectral spreading. An optimisation of >particular interest is that which achieves best RF amplifier power added efficiency subject to achieving constant amplifier gain. In this way the need for pre-distortion linearization may be reduced or eliminated.

A 90-degree phase delay power divider part PSPD is connected to an input side of a carrier amplifier Amp1 and a peak amplifier Amp2, and a variable electric length power combiner VTL2 is connected to an output side thereof. A control signal Sig is applied through a control terminal Ctrl of the variable electric length power combiner VTL2, and adjustment is performed in correspondence to a carrier frequency band of a carrier signal RFs so that an electric length of the variable electric length power combiner VTL2 becomes nearly 90 degrees. As a result, an electric length of an output power combining circuit of a Doherty type amplifier can be made variable, and a power-added efficiency can be enhanced for a multi-band or broad band.

The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.

Field effect transistors having a power density of greater than 25 W/mm when operated at a frequency of at least 4 GHz are provided. The power density may be at least 30 W/mm when operated at 4 GHz. The power density of at least 30 W/mm may be provided at a drain voltage of 120 V. Transistors with a power density of at least 30 W/mm when operated at 8 GHz are also provided. The power density of at least 30 W/mm may be provided at a drain voltage of 120 V. Field effect transistors having a power density of greater than 20 W/mm when operated at a frequency of at least 10 GHz are also provided. Field effect transistors having a power density of at least 2.5 W/mm and a two tone linearity of at least −30 dBc of third order intermodulation distortion at a center frequency of at least 4 GHz and a power added efficiency (PAE) of at least 40% are also provided.

The envelope tracking power supply includes a plurality of variable voltage supplies. A power supply controller of a power amplifier controls the plurality of variable voltage supplies so as to precisely divide the power supply voltage in a high frequency area, based on the voltage distribution of a received transmitted base band signal, in order to maximize the power added efficiency of the power amplifier. The power supply controller includes a threshold memory including a plurality of first zones, and a frequency memory including a plurality of second zones. The power supply controller changes the threshold held in the first zones so that each second zone approaches the average of the second zones.

The present invention, generally speaking, provides an RF power amplifier that exhibits high PAE at high output powers. The design of the power amplifier is based on the observation that the switching transistor is controlled by either voltage (for a FET) or current (for bipolar transistors), but not both. Thus, it is not necessary to develop power from the driver amplifier in order to operate the final stage as a switch. This recognition runs exactly counter to conventional wisdom, i.e., the concept of impedance matching for interstage design of high efficiency power amplifiers. It is impossible to develop solely a voltage waveform or a current waveform in a passband (resonant) network such as an RF power amplifier—both voltages and current must exist. In accordance with one aspect of the invention, however, instead of maximizing power transfer, power consumption is reduced while maintaining the magnitude of the voltage (or current) waveform. In accordance with another aspect of the invention, the driver is designed to, along with the final stage, operate in switch mode. In this instance, the design of the interstage network is similar to that of a Class E output stage. In the case of the interstage network, however, the objective is not to develop maximum power across the load (as in the case of the Class E output stage). Rather, the objective is to develop the maximum voltage across the driver's load (which is the switch input). In this arrangement, the input drive of the switch may be sufficiently high that the operating voltage of the driver stage may be reduced. This reduction further reduces the DC supply power to the driver, enhancing PAE.