2808 results about "High electron" patented technology

A fast low voltage ballistic program, ultra-short channel, ultra-high density, dual-bit multi-level flash memory is described with a two or three polysilicon split gate side wall process. The structure and operation of this invention is enabled by a twin MONOS cell structure having an ultra-short control gate channel of less than 40nm, with ballistic injection which provides high electron injection efficiency and very fast program at low program voltages of 3~5V. The cell structure is realized by (i) placing side wall control gates over a composite of Oxide-Nitride-Oxide (ONO) on both sides of the word gate, and (ii) forming the control gates and bit diffusion by self-alignment and sharing the control gates and bit diffusions between memory cells for high density. Key elements used in this process are: 1) Disposable side wall process to fabricate the ultra short channel and the side wall control gate with or without a step structure, and 2) Self-aligned definition of the control gate over the storage nitride and the bit line diffusion, which also runs in the same direction as the control gate. The features of fast program, low voltage, ultra-high density, dual-bit, multi-level MONOS NVRAM of the present invention include: 1) Electron memory storage in nitride regions within an ONO layer underlying the control gates, 2) high density dual-bit cell in which there are two nitride memory storage elements per cell, 3) high density dual-bit cell can store multi-levels in each of the nitride regions, 4) low current program controlled by the word gate and control gate, 5) fast, low voltage program by ballistic injection utilizing the controllable ultra-short channel MONOS, and 6) side wall control poly gates to program and read multi-levels while masking out memory storage state effects of the unselected adjacent nitride regions and memory cells. The ballistic MONOS memory cell is arranged in the following array: each memory cell contains two nitride regions for one word gate, and ½ a source diffusion and ½ a bit diffusion. Control gates can be defined separately or shared together over the same diffusion. Diffusions are shared between cells and run in parallel to the side wall control gates, and perpendicular to the word line.

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

A Group III nitride based high electron mobility transistors (HEMT) is disclosed that provides improved high frequency performance. One embodiment of the HEMT comprises a GaN buffer layer, with an AlyGa1−yN (y=1 or y 1) layer on the GaN buffer layer. An AlxGa1−xN (0≦x≦0.5) barrier layer on to the AlyGa1−yN layer, opposite the GaN buffer layer, AlyGa1−yN layer having a higher Al concentration than that of the AlxGa1−xN barrier layer. A preferred AlyGa1−yN layer has y=1 or y˜1 and a preferred AlxGa1−xN barrier layer has 0≦x≦0.5. A 2DEG forms at the interface between the GaN buffer layer and the AlyGa1−yN layer. Respective source, drain and gate contacts are formed on the AlxGa1−xN barrier layer. The HEMT can also comprising a substrate adjacent to the buffer layer, opposite the AlyGa1−yN layer and a nucleation layer between the AlxGa1−xN buffer layer and the substrate.

A plasma processing apparatus includes an antenna unit for generating plasma by using microwaves as a plasma source in such a way that a first region having a relatively high electron temperature of plasma, and a second region having a lower electron temperature of plasma than the first region are formed in a chamber, a first arranging means for arranging a semiconductor substrate W in the first region, a second arranging means for arranging the semiconductor substrate in the second region, and a plasma generation stopping means for stopping the generation of plasma of a plasma generating means, while the semiconductor substrate is arranged in the second region.

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

A fluorine treatment that can shape the electric field profile in electronic devices in 1, 2, or 3 dimensions is disclosed. A method to increase the breakdown voltage of AlGaN / GaN high electron mobility transistors, by the introduction of a controlled amount of dispersion into the device, is also disclosed. This dispersion is large enough to reduce the peak electric field in the channel, but low enough in order not to cause a significant decrease in the output power of the device. In this design, the whole transistor is passivated against dispersion with the exception of a small region 50 to 100 nm wide right next to the drain side of the gate. In that region, surface traps cause limited amounts of dispersion, that will spread the high electric field under the gate edge, therefore increasing the breakdown voltage. Three different methods to introduce dispersion in the 50 nm closest to the gate are described: (1) introduction of a small gap between the passivation and the gate metal, (2) gradually reducing the thickness of the passivation, and (3) gradually reducing the thickness of the AlGaN cap layer in the region close the gate.

An organic light-emitting element having high efficiency and long lifetime is provided. An organic light-emitting body is provided which includes a host having a high electron-transport property (n-type host), a host having a high hole-transport property (p-type host), and a guest such as an iridium complex and in which the n-type host and the p-type host are located so as to be adjacent to each other. When an electron and a hole are injected to such a light-emitting body, the electron is trapped by the n-type host and the hole is trapped by the p-type host. Then, both the electron and the hole are injected to the guest, and thus the guest is brought into an excited state. In this process, less thermal deactivation occurs and the working rate of the guest is high; thus, highly efficient light emission can be obtained.

To provide a highly efficient organic light-emitting element. An extremely thin layer (a monomolecular film or the like) containing an organic light-emitting material such as an iridium complex is provided between a layer of an n-type organic material (an organic material having a high electron-transport property) and a layer of a p-type organic material (an organic material having a high hole-transport property). In a structure described above, in a layer of the organic light-emitting material, electrons are injected from the LUMO of the n-type organic material to the LUMO of the organic light-emitting material, and holes are injected from the HOMO of the p-type organic material to the HOMO of the organic light-emitting material, whereby the organic light-emitting material is brought into an excited state and emits light.

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

A dispersion-free high electron mobility transistor (HEMT), comprised of a substrate; a semi-insulating buffer layer, comprised of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), deposited on the substrate, an AlGaN barrier layer, with an aluminum (Al) mole fraction larger than that of the semi-insulating buffer layer, deposited on the semi-insulating buffer layer, an n-type doped graded AlGaN layer deposited on the AlGaN barrier layer, wherein an Al mole fraction is decreased from a bottom of the n-type doped graded AlGaN layer to a top of the n-type doped graded AlGaN layer, and a cap layer, comprised of GaN or AlGaN with an Al mole fraction smaller than that of the AlGaN barrier layer, deposited on the n-type doped graded AlGaN layer.

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 10<5>, nitrogen source material partial pressure in a range of from about 1 to about 10<3 >torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 10<2 >microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain semiconductor region to provide high breakdown voltage and low on-state resistance. In embodiments, self-alignment techniques are applied to form a dielectric liner in trenches and over an intervening mandrel to independently define a gate length, gate-source length, and gate-drain length with a single masking operation. In embodiments, III-N HEMTs include fluorine doped semiconductor barrier layers for threshold voltage tuning and / or enhancement mode operation.

Aluminum free high electron mobility transistors (HEMTs) and methods of fabricating aluminum free HEMTs are provided. In some embodiments, the aluminum free HEMTs include an aluminum free Group III-nitride barrier layer, an aluminum free Group III-nitride channel layer on the barrier layer and an aluminum free Group III-nitride cap layer on the channel layer.

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

The invention discloses a method for preparing a graphene-doped anode material for lithium-ion batteries. The main component of the anode material is lithium iron phosphate nanoparticles. The method comprises the following steps of: firstly preparing the graphene, graphene oxide, and intercalation graphene respectively; secondly, doping the mixture of the graphene, the graphene oxide and the intercalation graphene in the synthetic material of the lithium iron phosphate nanoparticles or directly mixing the lithium iron phosphate nanoparticles and the intercalation graphene, the graphene oxide,or chemically reduced graphene after the preparation of lithium iron phosphate nanoparticles; and finally, synthesizing the graphene or graphene oxide bridged or lithium iron phosphate nanoparticle-clad material after the treatment of drying, filtering, eluting, re-drying, and annealing. The lithium iron phosphate nanoparticles prepared by the method of the invention are characterized by the capability of greatly improving electron conductivity and providing the lithium-ion batteries anode material having the advantages of simple processing technique, low cost, high capacity and safety for lithium-ion batteries.

An electron-emitting device disclosed has stable electron emission characteristics with little variation, in high electron emission efficiency, in high definition, and at low driving voltage. The electron-emitting device disclosed is constructed in such structure that on a substrate there are a lower electrode, an insulating layer having pores, and an upper electrode stacked in this order, the insulating layer is an anodic oxide layer, and a carbon deposit is formed in the pores.

Aluminum free high electron mobility transistors (HEMTs) and methods of fabricating aluminum free HEMTs are provided. In some embodiments, the aluminum free HEMTs include an aluminum free Group III-nitride barrier layer, an aluminum free Group III-nitride channel layer on the barrier layer and an aluminum free Group III-nitride cap layer on the channel layer.

An active matrix LED display apparatus and a fabrication method thereof are provided. The active matrix LED display apparatus enables to miniaturize pixel by a formation of wiring on bottom layer and an assembly of each block through each eutectic layer into each transistor block receptor and / or each LED block receptor formed according to each color element unit, and to be embodied with high luminance, low power consumption, high reliability and superior optical property by assembling a transistor block having high electron mobility. And the fabricating method of the present invention enables to make efficiently an AM-LED display apparatus at room temperature in a short time by using different shapes of receptor and block depending on the function of a transistor and / or on the color of an LED.

A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

Methods and devices for fabricating AlGaN / GaN normally-off high electron mobility transistors (HEMTs). A fluorine-based (electronegative ions-based) plasma treatment or low-energy ion implantation is used to modify the drain-side surface field distribution without the use of a field plate electrode. The off-state breakdown voltage can be improved and current collapse can be completely suppressed in LDD-HEMTs with no significant degradation in gains and cutoff frequencies.

A method of synthesizing a doped carbonaceous material includes mixing a carbon precursor material with at least one dopant to form a homogeneous / heterogeneous mixture; and subjecting the mixture to pyrolysis in an inert atmosphere to obtain the doped carbonaceous material. A method of purifying water includes providing an amount of the doped carbonaceous material in the water as a photocatalyst; and illuminating the water containing the doped carbonaceous material with visible light such that under visible light illumination, the doped carbonaceous material generates excitons (electron-hole pairs) and has high electron affinity, which react with oxygen and water adsorbed on its surface forming reactive oxygen species (ROS), such as hydroxyl radicals and superoxide radicals, singlet oxygen, hydrogen peroxide, that, in turn, decompose pollutants and micropollutants.

A method for improving image resolution of a three dimensional structure of at least one molecule conformation includes: determining a three dimensional structure of at least one conformation of a molecule in a sample from a first data set obtained from a series of 2D measurements of different geometrical projections of the molecule at a low electron beam dose in an electron microscope; producing a second data set including calculated two dimensional projections of the determined three dimensional structure of the at least one conformation of the same molecule; correlating data from a third data set obtained from at least one measurement of the same molecule using a higher electron beam dose with the second data set; and using the correlated data to improve the resolution of the three dimensional structure of the at least one conformation of the molecule by increasing the first data set with the correlated data and re-determining a three dimensional structure.

We disclose targets for generating x-rays using electron beams, along with their method of fabrication. The targets comprise a number of microstructures fabricated from an x-ray target material arranged in close thermal contact with a substrate such that the heat is more efficiently drawn out of the x-ray target material. This in turn allows irradiation of the x-ray generating substance with higher electron density or higher energy electrons, which leads to greater x-ray brightness, without inducing damage or melting.The microstructures may comprise conventional x-ray target materials (such as tungsten) that are patterned at micron-scale dimensions on a thermally conducting substrate, such as diamond. The microstructures may have any number of geometric shapes to best generate x-rays of high brightness and efficiently disperse heat.In some embodiments, the target comprising microstructures may be incorporated into a rotating anode geometry, to enhance x-ray generation in such systems.

Binary Group III-nitride high electron mobility transistors (HEMTs) and methods of fabricating binary Group III-nitride HEMTs are provided. In some embodiments, the binary Group III-nitride HEMTs include a first binary Group III-nitride barrier layer, a binary Group III-nitride channel layer on the first barrier layer; and a second binary Group III-nitride barrier layer on the channel layer. In some embodiments, the binary Group III-nitride HEMTs include a first AIN barrier layer, a GaN channel layer and a second AlN barrier layer.