45 results about "Ultra high density" patented technology

The invention discloses a preparation method and structure of an interposer embedded with a silicon bridge and a high-density silicon capacitor, and belongs to the field of advanced packaging of integrated circuits. The method can be used for 2.5 D advanced packaging high-density interconnection; the interposer structure comprises an interposer back RDL rewiring layer, an intermediate layer which is formed by embedding a silicon bridge and a high-density silicon capacitor by using a high-molecular epoxy resin material EMC, and an RDL rewiring layer on the front side of the interposer. High-density vertical interconnection between the upper RDL layer and the lower RDL layer is achieved through an electroplating ultrahigh copper column penetrating through the resin material, micron-level and submicron-level ultrahigh-density interconnection can be achieved through a silicon bridge embedded in the EMC resin, and high-performance packaging-level power supply decoupling can be achieved through a high-density silicon capacitor embedded in the resin. The preparation method of the structure is easy to implement, the cost is greatly reduced compared with that of the TSV silicon adapter plate interposer, and the method can be used for large-scale mass production of 2.5 D interposers.

The application discloses a high-reliability high-power three-dimensional heterogeneous integrated radio frequency antenna integrated microsystem, comprising a DPC substrate, a copper-based three-dimensional structure, a two-stage SiC adapter plate, a bare chip, a radio frequency circuit, a passive device and an antenna interface; wherein the DPC substrate is used for realizing integrated three-dimensional heterogeneous integration of the microsystem; the copper-based three-dimensional structure comprises a three-dimensional coaxial transmission structure and a three-dimensional packaging frame structure, and is used for realizing vertical transmission of high-power radio frequency signals and air-tight packaging of the microsystem; the two-stage SiC adapter plate is used for realizing a 2.5D*2 five-layer ultra-high-density mixed three-dimensional stacking architecture; the bare chip comprises a silicon-based Fan-out multifunctional bare chip, a power management bare chip, a power amplifier bare chip and a receiving bare chip; the radio frequency circuit comprises a radio frequency transmitting circuit and a radio frequency receiving circuit. The application forms a complete integrated air-tight packaging microsystem, and simultaneously realizes high reliability, high-density integration and high-power heat dissipation.

The invention provides a semiconductor device and a manufacturing method, and relates to the technical field of semiconductors. According to the invention, after a groove structure is formed on a long polycrystalline silicon channel, a high-aspect-ratio region with an extremely high aspect ratio is formed in a shoulder region of the groove structure according to an etching-back process of side wall oxide layers on two sides of the groove structure, and the aspect ratio of the high-aspect-ratio region is far away from the working range of an ultra-high-density plasma oxide deposition process; an oxide filling structure formed in a groove structure based on a high-density plasma oxide deposition process may have bubble defects, and the performance of a device is affected. For the situation, before the high-density plasma oxide deposition process is executed, the oxide interface and the polycrystalline silicon interface in the groove structure are adjusted to be flush to eliminate the high aspect ratio region, so that the aspect ratio of the groove structure meets the working range of the high-density plasma oxide deposition process; therefore, a compact oxide filling structure is formed, and the electrical isolation performance is ensured.

A unit cell for an ultra-dense multiband antenna comprises a reflector; a first frequency dipole disposed on the reflector, the first frequency dipole having four first frequency dipole arms; a plurality of second frequency dipoles disposed on the reflector, each of second frequency dipoles having four second frequency dipole arms; and a plurality of third frequency radiators disposed on the reflector, each third frequency radiator having a patch antenna element that is disposed above the reflector and a cavity cup frame disposed below the reflector, wherein each of the first frequency dipole arms is disposed above a second frequency dipole, and wherein each of the second frequency dipole arms is disposed above a third frequency radiator.

The present disclosure relates to ultra-high density, low profile edge card connectors. The present disclosure increases interconnect density by using a different technology approach than currently used in the industry (stamping and molding). By using a microelectromechanical system (MEMS) technology approach, better geometry and impedance control is achieved to reduce impedance discontinuities and feature sizes. In addition, the present disclosure also includes low connector insertion force, no contact wiping, and precise alignment mechanisms between the connector contacts and the connector contacts on the mating substrate.

The invention discloses a high-density packaged TGV gradient material filling interconnection structure and a filling method thereof, and relates to the technical field of semiconductor packaging. The TGV gradient material filling interconnection structure comprises a glass through hole located in a glass substrate, and the glass through hole is filled with a conductive metal body. A micro-nano anchor structure layer, a molecular bridging layer and a conductive metal seed layer are sequentially arranged between the inner wall of the glass through hole and the conductive metal main body, and a metal bridging structure is arranged in the middle of the interior of the glass through hole; the micro-nano anchor structure layer is located on the surface of the inner wall of the glass through hole and is of a concave-convex dot matrix arrangement structure. According to the method, the micro-nano anchor nail structure and the molecular bridging layer are formed on the surface of the glass, so that the copper-glass interface bonding strength is remarkably improved, and void-free electroplating filling of the TGV through hole with the depth-diameter ratio larger than or equal to 10: 1 is achieved. The glass bridge is embedded in the glass substrate, ultra-high-density interconnection with local interconnection line width / line distance smaller than or equal to 1 m is achieved, and the 2.5 D integration requirement of more than 16 silicon-based core particles is met.

The invention relates to the field of blind slot laminated modules, in particular to a blind slot laminated module based on a multistage vertical interconnection device and a process method. A mother board module; the copper pin part is vertically connected with the copper pin part; the fixed supporting part is provided with a first tooth groove and a through hole; the adjusting support part is provided with a second tooth groove and a first threaded hole, the second tooth groove and the first tooth groove are embedded in a staggered mode, the copper pin part is clamped and fixed in an embedding gap of the second tooth groove and the first tooth groove, and the first threaded hole is aligned to the through hole and is perpendicular to the extending plane of the stepped teeth of the second tooth groove; and the clamping force of the second tooth groove on the copper pin part is controlled by the second screw arranged in a penetrating manner. The problem that high-reliability welding quality is affected due to the fact that the ultrahigh-density copper pins of the laminated module are skewed due to uneven temperature loads and inconsistent thermal deformation degrees of materials in the multiple welding processes of the vertical interconnection technology is solved, and the requirements of remote sensing satellites are met.

Provided are methods for the creation of ultra-high density cryopreserved cell banks. In certain embodiments, these methods employ altered perfusion culture techniques that allow for production of ultra-high density cell cultures that can be cryopreserved at unexpectedly high cell densities without the need for any cell concentration steps, while retaining excellent cell viability and quality.

Apparatus and methods employing wormhole structures supporting ultra-high density optical routing systems. Microstructures comprising wormhole tunnels are formed in optical looms with wormhole openings arranged in patterns, such as a high-density XY grid. Optical fibers are inserted into respective wormhole tunnels, and sleeves are used to precisely align fiber ends. A rack loom comprising a wormhole backplane is fabricated in a similar manner, with wormhole openings arrayed in the same patterns. The sleeves comprise plug-receptacle sleeve pairs, where when an optical loom (or connector bar of the optical loom) face urged toward the front face of the rack loom, the plug and receptacle sleeves are mated, resulting in precise alignment of the optical fiber ends in the pairs of sleeves. Palpebral structures may also be fabricated to provide a self-cleaning function with optional lubrication. The solutions provide more than an order of magnitude improvement over current fiber connector densities, while substantially reducing costs.

This utility model relates to the technical field of automotive brake component processing equipment, specifically to a high-density barbed steel backing mechanism and equipment, and more particularly to a high-density barbed steel backing mechanism and equipment for surface treatment of brake disc steel backing, especially suitable for scenarios where high-density barbs are processed on the surface of steel backing to enhance adhesion with friction materials. A high-density barbed steel backing mechanism includes: a cylinder seat; a tool holder connected to the cylinder seat, the tool holder having a tool holder shaft; at least five tool sleeves arranged along the tool holder shaft and rotatably engaged with it; a cutting tool disposed in each tool sleeve; a cylinder (corresponding to each tool sleeve) disposed on the cylinder seat; and a spring connecting the tool holder and the tool sleeves. The number of tool sleeves in this application can be selected from 5, 7, 11, 13, or 15 according to actual processing needs, enabling high-density or even ultra-high-density processing, achieving a barbed density of 5-7 points / cm².

The application provides a nanometer memory for ultra-high density data storage and a preparation method thereof, wherein a receptor group is reasonably introduced into an amphiphilic block copolymer, micelles are self-assembled to form storage units, and the preparation of the nanometer memory is realized by arraying the micelles through the induction of a nanometer array substrate. The application has the advantages that the micelles self-assembled by the amphiphilic block copolymer are uniform in size, the obtained micelles can be regularly arrayed under the induction of the substrate, and the micelles in the substrate have good semiconductor characteristics and can be applied to the development of memory devices as nanometer storage units. Compared with traditional storage devices, the innovative method greatly reduces the size of the storage units and opens up a new way for the further development of ultra-high density data storage.

The invention relates to an ultra-high density low edge card connector. The present disclosure increases interconnect density by using technical means different from those currently used in the industry (stamping and molding). By using micro-electro-mechanical system (MEMS)-based technical means, better geometry and impedance control is achieved to reduce impedance discontinuity and feature size. In addition, the present disclosure also includes low connector insertion forces, contactless wiping, and precise alignment mechanisms between connector contacts and connector contacts on a mating substrate.

This invention discloses a coffin, belonging to the field of funeral supplies structural design technology. The coffin includes an outer coffin, inner partitions, a soil-filled chamber enclosed by the inner partitions, and compartments for burial goods. The outer coffin is a hollow box structure. The inner partition assembly is located inside the outer coffin and connected by slots to form an enclosed structure. The central space enclosed by the inner partitions is used to place the urn. The space below and around the urn forms a soil-filled chamber, which can be filled with symbolic soil. The compartments for burial goods are located in the four corner areas between the outer coffin and the inner partitions, and are used to place burial goods. This invention, in a non-burial storage mode, physically satisfies the cultural symbolism of "burial for peace," providing strong cultural and psychological comfort. Simultaneously, the standardized structure is suitable for automated handling, and the partitioned design protects the urn itself. This design solves the technical problem of balancing land-saving technology and cultural heritage, providing key support for the social acceptance of ultra-high-density storage systems.

The invention discloses an ultrahigh-density server case system based on liquid cooling heat dissipation, and relates to the technical field of server cases. A track mounting piece is fixedly arranged on the inner wall of the mainframe box, the track mounting piece is specifically composed of a track fixedly mounted on the inner wall of the mainframe box and a supporting plate mounted on the track, absolute parallelism of an optical transmission interface is ensured through a magnetic force self-adaptive attaching technology, a high-speed and wear-free free space optical path is established, and the optical transmission interface is more stable. The cold plate and the chip can be actively pressed, tight heat conduction is achieved, the flow of cooling liquid is dynamically adjusted according to the real-time load and temperature, accurate on-demand heat dissipation is achieved, the cold plate can be automatically separated from the chip, operation safety is guaranteed, standby energy consumption of a system is effectively reduced, and therefore the operation and maintenance efficiency, reliability and the energy efficiency level of the data center are overall improved.

The application discloses a multifunctional integrated interposer and a photoelectricity collaborative packaging module, and belongs to the technical field of integrated circuits.The multifunctional integrated interposer is characterized in that a first embedded interconnection unit of an integrated super-high-density and super-low-loss physical wiring channel circuit and a second embedded interconnection unit with photoelectric conversion function are co-planarly embedded in a dielectric body, and the upper surfaces of the two units are flush with the upper surface of the dielectric body, thereby realizing high integration of the two functional units in structure, effectively shortening the interconnection path of high-speed electrical signals and optical signals between chips, and reducing transmission loss and delay.The embedded physical wiring channel circuit can directly provide super-high-speed physical signal direct through in the first embedded interconnection unit, and the USR super-high-speed interface protocol processing function is transferred to an acceleration computing core, thereby significantly improving signal integrity, saving external special DSP chips, and simplifying system architecture, reducing overall power consumption and packaging complexity.

Various embodiments of the present technology provide for the ultra-high density heterogenous integration, enabled by nano-precise pick-and-place assembly. For example, some embodiments provide for the integration of modular assembly techniques with the use of prefabricated blocks (PFBs). These PFBs can be created on one or more sources wafers. Then using pick-and-place technologies, the PFBs can be selectively arranged on a destination wafer thereby allowing Nanoscale-aligned 3D Stacked Integrated Circuit (N3-SI) and the Microscale Modular Assembled ASIC (M2A2) to be efficiently created. Some embodiments include systems and techniques for the construction of construct semiconductor devices which are arbitrarily larger than the standard photolithography field size of 26×33 mm, using pick-and-place assembly.

The invention belongs to the technical field of vacuum belt dehydrators, and particularly relates to a vacuum belt dehydrator skirt blocking device which comprises a main support assembly, the main support assembly comprises a transverse support and a longitudinal support, and the main support assembly is a wear-resistant lining plate assembly made of a carbon steel lining plastic anti-corrosion material and matched with an ultra-high density polyethylene wear-resistant layer. The whole body is designed according to the maintenance cycle of 3-5 years, and the service life is far longer than the service life of 1-2 years of a traditional rubber skirt; the reinforcing rib plates enhance the structural strength of the support, reduce deformation abrasion in operation, and greatly reduce replacement frequency and maintenance cost. A long elliptical adjusting hole of the transverse support can adjust the left-right position, a height adjusting groove of the longitudinal support is matched with an adjusting sliding block to achieve height adjustment, fixing is achieved through a locking bolt, and the vacuum belt dehydrator can be accurately matched with vacuum belt dehydrators of different specifications; the arc-shaped guide face guides the filter cloth to make stable contact, it is ensured that the ultra-high-density polyethylene wear-resisting layer is tightly attached to the filter cloth, slurry is effectively prevented from splashing out or crossing an adhesive tape to enter a vacuum box, and the sealing reliability is improved.

The application provides a hypersonic scramjet cooling channel optical fiber sensor fixing and integrated installation structure and belongs to the technical field of sensors; wall embedded measurement array is used to realize in-situ distributed measurement of internal temperature, pressure and strain parameters of the cooling channel; the fourth group of optical fibers and the fifth group of optical fibers are arranged on four edges of the rectangular channel outlet of the outlet integrated measurement array, eight optical fibers are used to realize ultra-high density monitoring of the outlet area, the optical fiber lead is provided with a redundant length and is protected by a heat insulation sleeve, and the reliability in an extreme environment is ensured. The application comprises a wall embedded measurement array, micro grooves or micro through holes are formed on the inner wall of the rectangular cooling channel and the outer wall of the rectangular cooling channel, and the packaged optical fiber sensor is fixed in a flush or slightly convex manner; an outlet integrated measurement array is arranged in the outlet area of the rectangular cooling channel; and the wall embedded measurement array and the outlet integrated measurement array are connected through optical fiber leads.

The invention relates to the technical field of high-speed data cables, in particular to a manufacturing method of an ultrahigh-density high-speed data cable, which comprises the following steps of: S1, processing and forming an upper shielding shell; s2, processing and forming a lower shielding shell; s3, processing and forming a plurality of differential signal pairs; s4, the differential signal pairs are arranged in the lower shielding grooves of the lower shielding shell in a one-to-one correspondence mode; s5, the upper shielding shell and the lower shielding shell are aligned and jointed to form a rigid shielding shell, each upper shielding groove of the upper shielding shell and each lower shielding groove of the lower shielding shell form a plurality of closed shielding cavities in a surrounding mode, and each differential signal pair is located in each closed shielding cavity in a one-to-one mode. Each upper partition wall of the upper shielding shell is in butt joint with each lower partition wall of the lower shielding shell to form a plurality of shielding walls; the manufactured ultrahigh-density high-speed data cable is better in structural consistency and precision and better in shielding integrity and stability, and ultrahigh conductor density layout can be achieved.

This invention provides a WSi sputtering target material, its preparation method, and its application, relating to the field of sputtering target technology. The method includes: ball milling tungsten powder and silicon powder to obtain a tungsten-silicon mixed powder; passivating the surface of the silicon mixed powder to form a Si3N4 passivation layer on the silicon powder surface, resulting in a surface-passivated tungsten-silicon mixed powder; subjecting the surface-passivated tungsten-silicon mixed powder to cold isostatic pressing to obtain a green compact; and hot-pressing the green compact for the first time at a temperature of 800-1200℃ and a pressure of 20-25 MPa under an inert reducing gas atmosphere, continuing to raise the temperature until it exceeds 1200℃, then switching the atmosphere to argon and hot-pressing for the second time at a temperature of 1420-1480℃ and a pressure of 30-40 MPa, thus obtaining the WSi sputtering target material. The preparation method of the WSi sputtering target material of this invention achieves extreme anti-carburization, effectively suppresses the formation of coarse Si phases, achieves ultra-high density, and significantly reduces oxygen content.

An apparatus comprising an integrated circuit (IC) package having at least one solder joint pad; a die having at least one solder joint pad, wherein the die is joined to the IC package by at least one solder joint between the at least one solder joint pad of the die and the at least one solder joint pad of the IC package; and an underfill material between the IC package and the die, wherein the at least one solder joint is embedded in the underfill material, and wherein the at least one solder joint comprises a first metallurgy and a second metallurgy.

A package structure includes: a first redistribution layer; the second re-wiring layer and the first re-wiring layer are arranged in a stacked mode, and the second re-wiring layer and the second re-wiring layer are electrically connected; the first chip is electrically connected with the first rewiring layer; the second chip is electrically connected with the second rewiring layer; and the bridge chip is embedded in the first rewiring layer, the bridge chip is electrically connected with the first rewiring layer, and the bridge chip is electrically connected with I / O connection points of high-speed signals in the first chip and the second chip. A bridge chip is embedded in a first rewiring layer, and the bridge chip is used for connecting I / O connection points of high-speed signals in a first chip and a second chip. The bridge chip does not need to cover the whole chip area, and ultra-high density interconnection is only provided locally, so that the preparation cost of the whole large-size silicon interposer is reduced, the system manufacturing cost can be remarkably reduced, and meanwhile, the process complexity and the signal integrity risk caused by the through silicon vias are avoided.

The invention provides a WSi target material and a preparation method and application thereof, and relates to the technical field of sputtering target materials, the method comprises the following steps: carrying out ball milling on tungsten powder and silicon powder to obtain tungsten-silicon mixed powder; the surface of the silicon mixed powder is passivated, a Si3N4 passivation layer is generated on the surface of the silicon powder, and surface-passivated tungsten-silicon mixed powder is obtained; performing cold isostatic pressing on the surface-passivated tungsten-silicon mixed powder to obtain a green body; in an inert reducing gas atmosphere, carrying out first hot pressing sintering on the green body under the conditions that the temperature is 800-1200 DEG C and the pressure is 20-25 MPa, and continuing to heat until the temperature is gt; and after the temperature is 1,200 DEG C, the atmosphere is switched into argon, secondary hot pressing sintering is conducted at the temperature of 1,420-1,480 DEG C and the pressure of 30-40 MPa, and the WSi target material is obtained. According to the preparation method of the WSi target material, the effects of extreme carburization prevention, effective inhibition of generation of a coarse Si phase, ultrahigh density and remarkable reduction of the oxygen content can be achieved.

The present invention relates to a priority-based channel access system and method for low-power wide-area communication networks in ultra-high density sensor environments, the system comprising: a sensor unit for sensing a surrounding environment; a node terminal unit that is connected to the sensor unit and transmits sensing data to a network controller through a gateway unit; the gateway unit for relaying communication between the node terminal unit and the network controller; the network controller unit that controls the node terminal unit and the gateway unit and transmits and receives data through communication; and a management server unit for providing a service on the basis of the data collected in the network controller.

The invention discloses a preparation and use method of an ultra-high-density moxa product and a radial adjustable moxibustion device, and belongs to the technical field of moxibustion products. The core of the method is that a pipe body with a pipe wall capable of moving in the radial direction and a radial restraining mechanism arranged outside the pipe body in a sleeving mode are provided; firstly, the mechanism is locked, the inner diameter of the pipe body is reduced to the pressing diameter, the pipe body is filled with moxa, axial high pressure is applied, and an integral ultra-high-density moxa rod is directly pressed and formed; during use, the radial restraining mechanism is loosened, the inner diameter of the pipe body is increased to the release diameter larger than the pressing diameter, and therefore static friction force between the moxa stick and the pipe wall is fundamentally eliminated, and easy movement is achieved. The corresponding device comprises the pipe body and the radial restraining mechanism. The technical bottlenecks that a high-compactness moxa stick cannot be pushed and is demoulded and rebounded are broken through according to the principle of'radial adjustment '.

The invention discloses a transistor-memristor (1T1R) unit based on a graphene / molybdenum sulfide vertical transistor, and the 1T1R unit is of a full-vertical stacked structure, and sequentially comprises a substrate, a graphene / molybdenum sulfide vertical field effect transistor and a mortise and tenon structure memristor from bottom to top. The 1T1R unit has ultra-high density integration and high uniformity, the channel area of the 1T1R unit can be miniaturized to be within 10 mu m < 2 >, and the dependence on the advanced photoetching technology is effectively overcome; the resistance switching characteristic shows excellent uniformity, the variable coefficient in a high resistance state is 3.4%, the variable coefficient in a low resistance state is 6.2%, the pulse switching frequency can reach 106, and the resistance state stabilization time is gt; and 104 s, modulation of six discrete quasi-linear conductivity states can be realized through grid regulation and control of a vertical transistor.

The invention provides a three-dimensional (3D) memory architecture using hybrid bonding and a method of manufacturing the same. Methods and apparatus employ an ultra high density (defined herein as sub-1 micron pitch) hybrid bonding interface (HBI) to stack dies / chiplets at a bank level. Various configurations are described for distributing memory banks and peripheral logic between a bottom die and a top die, which are applied to further die stacking. The apparatus provided may also implement dedicated vias for power delivery from the main bottom die to the top die.

This invention provides a suspension, intelligent system, and application for testing the density uniformity of cemented carbide, relating to the field of nondestructive testing technology for cemented carbide. The suspension comprises a solid phase and a liquid phase; the solid phase is an inorganic powder with a true density of 15.0 g / cm³. 3 Up to 16.0 g / cm 3 The inorganic powder is selected from ceramic powder, tungsten carbide powder, or composite powder; the composite powder is a mixture of tungsten carbide and titanium carbide and / or tantalum carbide powder; the liquid phase is a chemically inert liquid medium for suspending and dispersing the inorganic powder; by adjusting the volume fraction of the solid phase in the suspension, the apparent density of the suspension can be adjusted to not less than 12.5 g / cm³. 3 The suspension for testing the density uniformity of cemented carbide in this invention, by mixing a high-density solid phase with a low-density liquid phase, can achieve a suspension apparent density that completely covers the testing requirements of all common cemented carbides, solving the technical problem that ultra-high density materials cannot be non-destructively tested using the liquid flotation method.

A forming method of a packaging structure comprises the following steps: forming a first rewiring layer; a second rewiring layer is formed, the second rewiring layer and the first rewiring layer are arranged in a stacked mode, and the second rewiring layer and the second rewiring layer are electrically connected; electrically connecting the first chip with the first rewiring layer; electrically connecting the second chip with the second rewiring layer; and a bridge chip is embedded in the first rewiring layer, the bridge chip is electrically connected with the first rewiring layer, and the bridge chip is electrically connected with I / O connection points of high-speed signals in the first chip and the second chip. A bridge chip is embedded in a first rewiring layer, and the bridge chip is used for connecting I / O connection points of high-speed signals in a first chip and a second chip. The bridge chip does not need to cover the whole chip area, and ultra-high density interconnection is only provided locally, so that the preparation cost of the whole large-size silicon interposer is reduced, the system manufacturing cost can be remarkably reduced, and meanwhile, the process complexity and the signal integrity risk caused by the through silicon vias are avoided.