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62results about How to "Adjustment" patented technology

System for optimizing the production performance of a milk producing animal herd

A system for optimising the production performance of a milk producing animal herd is provided. The system comprises a milk sampling apparatus, an analytical apparatus comprising separate equipment for analyzing compounds or parameters that in the presence of compounds indicative of the physiological or nutritional condition of the herd member, generates detectable signals, and apparatus directing a part of the milk sample (directing apparatus) to each separate equipment, which is controlled by data for the physiological and nutritional state of a herd member, so that the directing apparatus is only activated at pre-selected points in time or at pre-selected time intervals in the production and / or lactation cycles. Specific compounds are compounds indicative of mastitis, including beta-N-acetylhexosaminidase (NAGase) E.C. 3.2.1.52 and lactate dehydrogenase (LDH), protein balance, including milk urea nitrogen (MUN) and total protein, ketosis, including acetolactate, beta-hydroxybutyrate, acetone and lipids, fat and state in reproduction cycle, including a steroid or peptide hormone, e.g., progesterone. Furthermore, the system comprises equipment for signal detection to record and process the signals, equipment to store data and equipment to produce data output. Methods for optimizing the production performance of a milk producing animal herd and an apparatus therefor.
Owner:LATTEC

Game Apparatus

InactiveUS20080300040A1Enhancement of game attractivenessAdjustmentBoard gamesApparatus for meter-controlled dispensingObject storeEngineering
The present invention provides a game apparatus that enables game progression control for increasing game attractiveness and adjusting the payout ratio.
A game apparatus includes: a winning-object selecting unit for selecting winning-objects from a plurality of selection-objects; a game control unit for controlling progression of a game, which carries out selections a predetermined number of times using the winning-object selecting unit during one game term; an array information generating unit for generating array information defining a selection-object-array using part or all of the plurality of selection-objects; an array image displaying unit for displaying an array image in which a plurality of selection-object-images corresponding to the respective selection-objects included in the selection-object-array defined by the array information generated by the array information generating unit are arrayed based on the array information; a winning-object storage unit for storing the winning-objects selected by the winning-object selecting unit during the one game term; and a decision unit for deciding, based on the winning-objects stored in the winning-object storage unit, whether or not an array of the winning-objects on the selection-object-array defined by the array information is a specified-pattern, wherein the winning-object selecting unit carries out part or all of the selections, the predetermined number of times, which is executed during the one game term, before generating the array information by the array information generating unit; the array information generating unit determines the selection-object-array based on pre-winning-objects that the winning-object selecting unit selects before generating the array information, and generates the array information defining the determined selection-object-array; and the winning-object storage unit stores the pre-winning-objects as the winning-objects at a predetermined probability.
Owner:KONAMI DIGITAL ENTERTAINMENT CO LTD

Switch level circuit with dead time self-adapting control

A switch level circuit (110) with dead time self-adapting control, which minimizes the switching loss in a switching power supply converter with synchronous rectification by changing a dead time between a high-side control transistor (10) and a low-side synchronous rectifying transistor (11). The switch level circuit (110) includes the high-side control transistor (10) and the low-side synchronous rectifying transistor (11) which are controlled to be on and off by external control signals, and a waveform with a given duty cycle is outputted at a node (LX) between the two transistors. The switch level circuit (110) also includes a control module for adjusting the dead time. The control module comprises a sampling circuit (16) for detecting the current dead time at the node (LX), an adjusting circuit (17) for buffering and converting the sampling voltage sampled by the sampling circuit (16), and a controlled delay unit (15) equipped with an external control input terminal, wherein the controlled delay unit (15) delays an external control signal and outputs the delayed signal to a controlled terminal of the low-side synchronous rectifying transistor (11) as a control signal. The switch level circuit (110) has simple structure, better performance and wide application range.
Owner:SOUTHEAST UNIV
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