3 results about "Doherty amplifier" patented technology

A Doherty amplifier according to the present disclosure comprises a main amplifier, an auxiliary amplifier, a distribution circuit that distributes signals to the main amplifier and the auxiliary amplifier, and a phase compensation circuit. The main amplifier has a first input matching circuit and a plurality of main amplification stages. The auxiliary amplifier has a second input matching circuit and a plurality of auxiliary amplification stages. The distribution circuit has a first line connected to the first input matching circuit and a second line connected to the second input matching circuit. The electrical length of the first line is such that the input impedance of the first line is higher than the characteristic impedance of the first line and the imaginary component is less than 10% of the real component when a small signal is input. The electrical length of the second line is such that the input impedance of the second line is higher than the characteristic impedance of the second line and the imaginary component is less than 10% of the real component when a small signal is input. The phase compensation circuit is provided in an inter-stage matching circuit of the plurality of main amplification stages or the plurality of auxiliary amplification stages.

The Doherty amplifier includes a carrier amplifier and a peak amplifier. The carrier amplifier is provided with bias by a carrier amplifier bias circuit. The peak amplifier is provided with bias by a peak amplifier bias circuit. A tap circuit taps a portion of the bias current provided from the peak amplifier bias circuit to the peak amplifier. The tap circuit includes a cascode circuit formed by cascading a base grounded transistor with an emitter grounded transistor. The collector of the base grounded transistor is connected to the peak amplifier, and the base of the emitter grounded transistor is connected to an input node of the carrier amplifier.

A multi-path amplifier (e.g., a Doherty amplifier) includes a first transistor (e.g., a main amplifier FET), a second transistor (e.g., a peak amplifier FET), a combining node, and a shunt inductive circuit. The first and second amplifiers and the combining node structure are formed integral with a semiconductor die, and the shunt inductive circuit is integrated with the die. Outputs of the first and second transistors are electrically coupled to the combining node structure. The shunt inductive circuit is electrically coupled between the combining node structure and a ground reference node. The shunt inductive circuit includes a shunt inductance (e.g., including one or more wire bonds and / or one or more spiral inductors) integrated with the semiconductor die. The multi-path amplifier can also include an integrated phase shifter / impedance inverter coupled between the outputs of the first and second transistors, and the integrated phase shifter / impedance inverter is configured to apply a 90 degree phase delay between intrinsic drains of the first and second transistors.