56 results about "Doherty amplifier" patented technology

A Doherty amplifier circuit includes a carrier amplifier that amplifies a radio-frequency signal, a peak amplifier that amplifies a radio-frequency signal, and a bias circuit that supplies a bias current or a bias voltage to the peak amplifier. The peak amplifier includes one or more amplifier transistors that amplify a radio-frequency signal, and a state control circuit that controls the operating state of the one or more amplifier transistors on the basis of an input control signal.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A Doherty amplifier includes: a carrier amplifier to amplify a first high frequency signal having a first higher harmonic and a second higher harmonic; a peak amplifier to amplify a second high frequency signal having the first higher harmonic and the second higher harmonic; a first series resonant circuit connected between an output end of the carrier amplifier and a ground, and configured to resonate at the frequency of the first higher harmonic; a second series resonant circuit connected between an output end of the peak amplifier and the ground, and configured to resonate at the frequency of the first higher harmonic; a first parallel resonant circuit configured to resonate at the frequency of the second higher harmonic; and a second parallel resonant circuit configured to resonate at the frequency of the second higher harmonic.

A Doherty amplifier according to the present disclosure comprises a main amplifier, an auxiliary amplifier, a distribution circuit that distributes signals to the main amplifier and the auxiliary amplifier, and a phase compensation circuit. The main amplifier has a first input matching circuit and a plurality of main amplification stages. The auxiliary amplifier has a second input matching circuit and a plurality of auxiliary amplification stages. The distribution circuit has a first line connected to the first input matching circuit and a second line connected to the second input matching circuit. The electrical length of the first line is such that the input impedance of the first line is higher than the characteristic impedance of the first line and the imaginary component is less than 10% of the real component when a small signal is input. The electrical length of the second line is such that the input impedance of the second line is higher than the characteristic impedance of the second line and the imaginary component is less than 10% of the real component when a small signal is input. The phase compensation circuit is provided in an inter-stage matching circuit of the plurality of main amplification stages or the plurality of auxiliary amplification stages.

An amplifier device, such as a Doherty amplifier device, may include an extra lead and decoupling capacitor coupled to radio frequency (RF) cold points of output impedance matching circuitry of multiple amplification paths, such as a carrier path and peaking path, of the amplifier device. The extra lead and the decoupling capacitor are configured to provide low frequency resonance decoupling for the multiple amplification paths. A drain bias voltage may be provided to the drain terminals of transistors of amplifiers of the amplifier device via the extra lead. An integrated passive device (IPD) including a wire fence and one or more conductive pads may be disposed between a carrier amplifier die and a peaking amplifier. The extra lead may be coupled to the RF cold points via the IPD. The wire fence may mitigate RF interference between the carrier amplifier die and the peaking amplifier die.

The utility model discloses a packaging carrier and a Doherty amplifier comprising the packaging carrier. The packaging carrier comprises a first input interface and a second input interface, a first output interface and a second output interface; a substrate; the first transistor is located on the substrate, the control end of the first transistor is coupled to the first input interface, and the output end of the first transistor is coupled to the first output interface; the second transistor is located on the substrate, the control end of the second transistor is coupled to the second input interface, the output end of the second transistor is coupled to the second output interface, the first transistor comprises a silicon carbide-based transistor, and the second transistor comprises a silicon-based transistor; and the bias circuit is configured to provide corresponding bias voltages for the first transistor and the second transistor.

A Doherty power amplifier compression compensation circuit is disclosed. A power amplifier chain may include a Doherty amplifier having a main power amplifier path and a peaking power amplifier path, where both paths have a driver stage and an output stage. One or more compression detection circuits may be associated with an output of the main output stage. Responsive to detecting compression at this output, an adjustment is made to one or more knobs in the power amplifier chain. In a first aspect, a variable gain control circuit may adjust the gain of an earlier amplifier (e.g., the driver stage) for either (or both) of the main path or the peaking path. In further aspects, one or more bias circuits may have bias signals adjusted. Both amplitude and phase compression may be addressed by aspects of the present disclosure.

Embodiments of a method and apparatus are disclosed. In embodiments, a Doherty amplifier module includes a substrate including a mounting surface and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output faces a side of the second amplifier die including a second output. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first signal path and the second signal path.

To provide a Doherty amplifier circuit capable of suppressing an influence of intermodulation distortion while suppressing a circuit scale.SOLUTION: A Doherty amplifier circuit includes: a 90-degree hybrid coupler including an input terminal to which a first input signal is input, a first output terminal that outputs a first output signal based on the first input signal, a second output terminal that outputs a second output signal having a phase different from that of the first output signal by 90 degrees based on the first input signal, and an isolation terminal that ensures isolation with the input terminal; a carrier amplifier that amplifies the first output signal and outputs a first amplified signal; and a peak amplifier that amplifies the second output signal and outputs a second amplified signal. The isolation terminal is a terminal to which a second harmonic of a frequency band of a second harmonic of the first input signal is input.SELECTED DRAWING: Figure 1

A Doherty amplifier circuit includes a 90° hybrid coupler that includes an input terminal receiving a first input signal, a first output terminal outputting a first output signal on the basis of the first input signal, a second output terminal outputting, on the basis of the first input signal, a second output signal different in phase by 90° from the first output signal, and an isolation terminal whose isolation from the input terminal is ensured; a carrier amplifier that amplifies the first output signal to output a first amplified signal; and a peak amplifier that amplifies the second output signal to output a second amplified signal. The isolation terminal is a terminal which receives a second harmonic in the second harmonic frequency band of the first input signal.

A variable power distributor (10) comprises a fixed power distributor (4) which is connected to an input terminal (1) and which outputs a high-frequency signal with power distributed at a ratio of N:1 (N is a real number of 1 or more) from a Port 1 and a Port 2, the Port 1 being connected to a first distribution output terminal (2), and a power amplifier (5) which is connected between the Port 2 and a second distribution output terminal (3), wherein: the maximum gain of the power amplifier (5) with respect to the high-frequency signal is greater than 10 x log (N) [dB]; when the input power to the input terminal (1) is equal to or less than a first switching power, the output power from the first distribution output terminal (2) is greater than or equal to the output power from the second distribution output terminal (3); and when the input power to the input terminal (1) is greater than the first switching power, the output power from the second distribution output terminal (3) is greater than the output power from the first distribution output terminal (2).

Disclosed are an output network of a Doherty amplifier, a Doherty amplifier including the output network, and a design method of the Doherty amplifier. The output network of a Doherty amplifier including a main amplifier and an auxiliary amplifier, and the output network includes a combination node; a main output network connected between an output port of the main amplifier and the combination node; an auxiliary output network connected between an output port of the auxiliary amplifier and the combination node; and a merging matching network connected between the combination node and a radio frequency output port of the Doherty amplifier; the merging matching network is configured for the node impedance at the combination node being a complex impedance, and the main output network and the auxiliary output network are configured for the node impedance being matching with the goal load impedances of the main amplifier and the auxiliary amplifier.

A Doherty amplifier includes a distributor, a first amplifier, a second amplifier, a third node, an impedance conversion circuit having a first end connected to a first node and a second end connected to the third node, and rotating an impedance viewed from the first amplifier to the third node with respect to an impedance viewed from the first amplifier to the first node within a range of 360°±45° on a Smith chart in a second harmonic wave, and a harmonic tuning circuit having a third end connected to a line connecting the first amplifier and the third node at the first node, and making an absolute value of an impedance with respect to a reference potential at the third end in the second harmonic wave smaller than an absolute value of an impedance with respect to the reference potential at the third end in the fundamental wave.

A Doherty amplifier circuit having a tunable impedance and phase (“TIP”) circuit to provide an adjustable alpha factor, which allows for a selection of power added efficiency (PAE) curves that are useful for applications having different modulations or to meet other criteria. Embodiments include a Doherty amplifier having a TIP circuit that provides for tunability of the impedance ZINV (resulting in an adjustable alpha factor) while maintaining the phase of the output of the carrier amplifier at 90° (for a selected polarity)±a low phase variation. Embodiments of the TIP circuit include one or more series-connected TIP cells comprising at least one TIP circuit combined with a tunable phase adjustment circuit. In operation, when the impedance of a TIP cell is adjusted, adjustments within the cell are also made to provide a phase shift correction back towards 90° (at the selected polarity).

A Doherty amplification circuit (10) to which a D-ET mode or an SPT mode is applied comprises: a power amplifier (11) used as a carrier amplifier; a power amplifier (12) used as a peak amplifier; and a synthesizer (22) including an input terminal (221) connected to an output terminal of the power amplifier (11), an input terminal (222) connected to an output terminal of the power amplifier (12), and an output terminal (223). The size of the power amplifier (12) is smaller than the size of the power amplifier (11).

The utility model relates to a kind of circuit structure for improving the linearity of Doherty amplifier, it is characterized in that, the Doherty amplifier includes main amplifier and at least one peak amplifier;Resistance structure is connected in series in the input end of the peak amplifier.The utility model reduces the gain expansion of peak amplifier by connecting resistance in series in the input end of peak amplifier, resistance-driven peak amplifier.The input power transmitted to peak amplifier is reduced by resistance-driven, and control mechanism of amplifier overall gain expansion is generated.By appropriately selecting the series resistance / resistance network of peak amplifier input end, the gain shape of entire power amplifier can be controlled and smoothed, so as to improve the linear operation of Doherty amplifier.

An electronic device may be provided with an antenna fed using a Doherty amplifier. The Doherty amplifier may include a main amplifier path with a main amplifier and an auxiliary amplifier path with an auxiliary amplifier. An adaptive biasing circuit may be coupled to the main amplifier path around the main amplifier. The adaptive biasing circuit may include a first voltage detector coupled to an input of the main amplifier, a second voltage detector coupled to an output of the main amplifier, and a subtractor. The first voltage detector may measure an input voltage of the main amplifier. The second voltage detector may measure an output voltage of the main amplifier. The subtractor may generate a difference voltage between the input and output voltages. The auxiliary amplifier may be biased using the difference voltage.

Comprises: a carrier amplifier and a peak amplifier, each of which is a differential amplifier comprising a first phase amplifier and a second phase amplifier; and a balun that synthesizes the output signal of the carrier amplifier and the output signal of the peaking amplifier. A carrier amplifier and a peaking amplifier are formed in a semiconductor device. A balun is formed on a printed wiring board on which a semiconductor device is mounted. A first wiring electrically connecting the output terminal of the first phase amplifier of the carrier amplifier and the output terminal of the first phase amplifier of the peak amplifier; and a second wiring that electrically connects the output terminal of the second phase amplifier of the carrier amplifier and the output terminal of the second phase amplifier of the peak amplifier is formed on the printed wiring board, and the other is formed on the semiconductor device.

The Doherty amplifier comprises: a first filter circuit (6a) that, when an input signal of the first frequency band is input, outputs a first input signal that attenuates the input signal by a first attenuation amount, and when an input signal of the second frequency band different from the first frequency band is input, outputs a second input signal that allows the input signal to pass; and a second filter circuit (6b) that, when an input signal of the first frequency band is input, outputs a third input signal that attenuates the input signal by a second attenuation amount smaller than the first attenuation amount, and when an input signal of the second frequency band is input, outputs a third input signal that attenuates the input signal by an attenuation amount greater than the first attenuation amount. The fourth input signal of attenuation; the first amplifier (8a), whose gate bias voltage is fixed, operates as an auxiliary amplifier when input to the first input signal from the first filter circuit (6a), and operates as a main amplifier when input to the second input signal from the first filter circuit (6a); and the second amplifier (8b), whose gate bias voltage is fixed, operates as a main amplifier when input to the third input signal from the second filter circuit (6b), and operates as an auxiliary amplifier when input to the fourth input signal from the second filter circuit (6b).

The utility model discloses a packaging carrier and a Doherty amplifier comprising the packaging carrier, the packaging carrier comprises a first input interface, a second input interface, a first output interface, a second output interface, a substrate, a first transistor, a second transistor, a third transistor, a fourth transistor and an interstage matching circuit, the first transistor, the second transistor, the third transistor and the fourth transistor are located on the substrate, control ends of the first transistor and the third transistor are respectively coupled to the first input interface and the second input interface, output ends of the first transistor and the third transistor are respectively coupled to control ends of the second transistor and the fourth transistor, and output ends of the second transistor and the fourth transistor are respectively coupled to the first output interface and the second output interface; and wherein each of the first and third transistors includes a silicon-based transistor, and at least one of the second and fourth transistors includes a silicon carbide-based transistor; and the inter-stage matching circuit is configured to provide an impedance matching function for the first and second transistors, and to provide an impedance matching function for the third and fourth transistors.

An amplifier module includes a Doherty amplifier circuit, and the Doherty amplifier circuit includes a first transistor chip constituting a carrier amplifier, a first output signal line configured to transmit a first amplified signal outputted from the carrier amplifier, a second transistor chip constituting a peak amplifier, and a second output signal line configured to transmit a synthetic signal of the first amplified signal and a second amplified signal outputted from the peak amplifier. A direction from a drain terminal of the second transistor chip to a connection, of the first conductor of the first output signal line, with the first bonding wire is the same direction as a direction from the drain terminal of the second transistor chip to a connection, of the second conductor of the second output signal line, with the second bonding wire.

Broadband characteristics are implemented even when an impedance is low on an output side when seen from output ends of a carrier amplifier and a peak amplifier included in a Doherty amplifier. A power amplification circuit includes: a carrier amplifier and a peak amplifier included in a Doherty amplifier circuit; a first transformer including a primary winding connected to an output end of the carrier amplifier; a second transformer including a primary winding connected to an output end of the peak amplifier; a signal line connecting one end of a secondary winding included in the first transformer and one end of a secondary winding included in the second transformer to one another; a first capacitor; and second and third capacitors connected to the respective primary windings of the first and second transformers.

Example embodiments relate to Doherty amplifiers. One Doherty amplifier includes a packaged main amplifier that includes a main input lead for receiving a main RF signal, a main power transistor for amplifying the main RF signal, and a main output lead for outputting the main RF signal amplified by the main power transistor. The Doherty amplifier also includes a packaged peak amplifier that includes a peak input lead assembly for receiving a peak RF signal, a first peak power transistor configured for amplifying a part of the peak RF signal, a second peak power transistor configured for amplifying a remaining part of the peak RF signal, and a peak output lead for combining the part of the peak RF signal amplified by the first peak power transistor and the remaining part of the peak RF signal amplified by the second peak power transistor into an amplified peak RF signal.

The purpose of the present invention is to achieve broadband characteristics even when the impedance is low when the output side is viewed from the output ends of a carrier amplifier and a peak amplifier constituting a Doherty amplifier. The power amplifier circuit includes: a carrier amplifier and a peak amplifier constituting a Doherty amplifier circuit; a primary winding of the first transformer is connected to the output end of the carrier amplifier; a primary winding of the second transformer is connected to the output end of the peak amplifier; a signal line connecting one end of the secondary winding of the first transformer and one end of the secondary winding of the second transformer; a first capacitor; a second capacitor connected to the primary winding of the first transformer; and a third capacitor connected to the primary winding of the second transformer, one end of the first capacitor is connected to the signal line, the other end of the first capacitor is connected to a reference potential, and formula (1) is satisfied when the sum of capacitance values of the first capacitor and the signal line is denoted by CT, the angular frequency is denoted by [omega] 0, and the load impedance is denoted by ZM. .

Example embodiments relate to Doherty amplifiers. One example includes a radiofrequency (RF) power amplifier. The RF power amplifier includes an input lead. The RF power amplifier also includes a first output lead. Additionally, the RF power amplifier includes a first semiconductor die arranged in between the input lead and the first output lead. The first semiconductor die includes a first edge arranged adjacent to the input lead and an opposing second edge arranged adjacent to the first output lead. Further, the RF power amplifier includes a field-effect transistor integrated on the first semiconductor die. The field-effect transistor includes a gate bondpad assembly and a drain bondpad assembly. The field-effect transistor also includes a plurality of gate bondwires and a plurality of drain bondwires. In addition, the field-effect transistor includes a plurality of gate fingers extending in a first direction and a plurality of drain fingers extending in a second direction.

The Doherty amplifier is provided with a lumped element combiner including a first capacitor and an inductor. If the inductor is coupled between the output terminal of the main amplifier and the output node of the Doherty amplifier, the first capacitor is coupled between the output terminal of the auxiliary amplifier and the output node. Instead, if the first capacitor is coupled between the output terminal of the main amplifier and the output node, the inductor is coupled between the output terminal of the auxiliary amplifier and the output node. The current scaling ratio of the Doherty amplifier is in the range of 0.4 to 0.6 to enhance the bandwidth.

A semiconductor device for a Doherty amplifier includes a main amplifier including a first field effect transistor, and includes a peak amplifier including a second field effect transistor. A first drain conductance of the first field effect transistor when applying a gate voltage obtained by adding a predetermined voltage to a pinch-off voltage and a predetermined drain voltage is larger than a second drain conductance of the second field effect transistor when applying both a gate voltage and the predetermined drain voltage, such that when measuring the first drain conductance, a drain current having a same value as a drain current flowing through the first field effect transistor flows through the second field effect transistor.

The present invention provides a radio frequency power amplification circuit suitable for a mobile terminal, said circuit comprising: an input balun module configured to receive a single-ended radio frequency input and output two differential radio frequency signals; a main power amplifier module configured to receive one of the two differential radio frequency signals from the input balun module and output a first amplified signal; an auxiliary power amplifier module configured to receive the other one of the two differential radio-frequency signals from the input balun module and output a second amplified signal; and an output balun module configured as a balun in the form of a single transformer and used for receiving the first amplified signal outputted by the main power amplifier module and the second amplified signal outputted by the auxiliary power amplifier module, and generating a single-ended radio frequency output signal.

A high-frequency amplifier includes: an asymmetric Doherty amplifier that amplifies an input high-frequency signal of a wavelength λ, and includes a carrier amplifier and a peaking amplifier that starts an amplification operation when an output of the carrier amplifier reaches a saturation region and has a saturation output different from that of the carrier amplifier; a driver amplifier that drives the asymmetric Doherty amplifier; a branching circuit that branches the high-frequency signal amplified by the driver amplifier into an input path to the peaking amplifier side and an input path to the carrier amplifier side; a phase adjustment circuit that is provided on either of the path to the peaking amplifier side and the path to the carrier amplifier side and delays either of a phase of an input signal of the peaking amplifier and a phase of an input signal of the carrier amplifier; a first substrate on which the carrier amplifier and the peaking amplifier are mounted; and a second substrate on which the driver amplifier, the branching circuit, and the phase adjustment circuit are mounted, wherein, when the second substrate is stacked on the first substrate in an overlapping manner, an input terminal of the driver amplifier and an input terminal of the carrier amplifier are located at positions that project onto each other, and, when n is set to an integer of 0 or more, an electrical length from the input terminal of the driver amplifier to an output terminal of the carrier amplifier is set in such a manner that a phase becomes (2n+1)π.