135 results about "Doherty amplifier" patented technology

Disclosed are an output network of a Doherty amplifier, a Doherty amplifier including the output network, and a design method of the Doherty amplifier. The output network includes a combination node, a main output network connected between an output port of the main amplifier and the combination node, an auxiliary output network connected between an output port of the auxiliary amplifier and the combination nod, and a merging matching network connected between the combination node and a radio frequency output port of the Doherty amplifier, where the merging matching network is configured for the node impedance at the combination node being a complex impedance, and the main output network and the auxiliary output network are configured for the node impedance matching with goal load impedances of the main amplifier and the auxiliary amplifier.

Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

A dual-T network configured as a three-port combiner provides signal paths from two input ports to an output port, with near 0° insertion phase along one path, near ±90° insertion path along the other path, and impedance step-up along both paths. Disclosed combiners provide superior loss and impedance matching characteristics over wide (15%) bandwidth, and are suitable for use in Doherty amplifiers, which can provide high efficiency over about 10 dB output power levels, the power levels being adjusted dynamically or under switched control. Single-ended and differential Doherty amplifiers are disclosed. The combiners and Doherty amplifiers are suitable for mobile phones and other modern RF products, including battery powered products. The combiners can also serve as general-purpose quadrature couplers. Variations and performance graphs are presented.

A Doherty amplifier circuit includes a carrier amplifier that amplifies a radio-frequency signal, a peak amplifier that amplifies a radio-frequency signal, and a bias circuit that supplies a bias current or a bias voltage to the peak amplifier. The peak amplifier includes one or more amplifier transistors that amplify a radio-frequency signal, and a state control circuit that controls the operating state of the one or more amplifier transistors on the basis of an input control signal.

An amplifier is disclosed having a carrier amplifier and a peaking amplifier coupled in parallel with the carrier amplifier, wherein the peaking amplifier has peaking output transistors. A peaking power supply adaptive bias generator is coupled to bias control terminals of the peaking output transistors. The peaking power supply adaptive bias generator is configured to sense supply voltage to the peaking amplifier and increase bias currents to the peaking output transistors as the supply voltage decreases.

A Doherty amplifier circuit includes a carrier amplifier that amplifies a radio frequency signal; a peak amplifier that amplifies the radio frequency signal; and a control circuit including a first variable bandpass characteristic circuit configured such that a bandpass characteristic for passing the radio frequency signal is variable according to a supply voltage and a detector that detects the radio frequency signal passing through the first variable bandpass characteristic circuit. The control circuit controls the bias of the peak amplifier according to a detection result of the detector.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A Doherty amplifier according to an aspect of the present disclosure includes a heat sink; a resin substrate mounted on the heat sink, and having a cavity formed to expose the heat sink, the resin substrate being formed by stacking a plurality of resin layers and a plurality of metal layers; a main amplifier mounted in the cavity; a peak amplifier mounted in the cavity; and an inductor, wherein the resin substrate has a partition wall part that separates at least a portion of the main amplifier from at least a portion of the peak amplifier, the plurality of metal layers of the partition wall part are electrically connected to the heat sink, and the inductor is mounted on the partition wall part, and electrically connected to the plurality of metal layers.

A Doherty amplifier includes: a carrier amplifier to amplify a first high frequency signal having a first higher harmonic and a second higher harmonic; a peak amplifier to amplify a second high frequency signal having the first higher harmonic and the second higher harmonic; a first series resonant circuit connected between an output end of the carrier amplifier and a ground, and configured to resonate at the frequency of the first higher harmonic; a second series resonant circuit connected between an output end of the peak amplifier and the ground, and configured to resonate at the frequency of the first higher harmonic; a first parallel resonant circuit configured to resonate at the frequency of the second higher harmonic; and a second parallel resonant circuit configured to resonate at the frequency of the second higher harmonic.

A power amplifier includes a substrate, first and second transistor amplifiers, and at least one matching circuit. Respective output terminals of the first and second transistor amplifiers are coupled to a combining node, and the matching circuit includes one or more passive electrical components coupled between one of the respective output terminals and the combining node. At least one of the first and second transistor amplifiers or the one or more passive electrical components is mounted on the substrate in a flip chip configuration. The matching circuit may include a shunt inductance that is coupled to the one of the respective drain terminals by a conductive bump. Related devices are also discussed.

A Doherty amplifier according to the present disclosure comprises a main amplifier, an auxiliary amplifier, a distribution circuit that distributes signals to the main amplifier and the auxiliary amplifier, and a phase compensation circuit. The main amplifier has a first input matching circuit and a plurality of main amplification stages. The auxiliary amplifier has a second input matching circuit and a plurality of auxiliary amplification stages. The distribution circuit has a first line connected to the first input matching circuit and a second line connected to the second input matching circuit. The electrical length of the first line is such that the input impedance of the first line is higher than the characteristic impedance of the first line and the imaginary component is less than 10% of the real component when a small signal is input. The electrical length of the second line is such that the input impedance of the second line is higher than the characteristic impedance of the second line and the imaginary component is less than 10% of the real component when a small signal is input. The phase compensation circuit is provided in an inter-stage matching circuit of the plurality of main amplification stages or the plurality of auxiliary amplification stages.

A Doherty amplifier includes a first amplifier that includes first output fingers and a first output electrode connected to the first output fingers, a second amplifier that includes second output fingers and a second output electrode connected to the second output fingers, a first bonding wire connected between a first region in the first output electrode and a second region in the second output electrode, a second bonding wire connected between a third region in the first output electrode and a fourth region in the second output electrode, and at least one of a first capacitor connected in series with the first bonding wire, and a second capacitor connected in parallel with the second bonding wire, wherein the first and the third regions are regions to which the first output fingers are connected, and the second and the fourth regions are regions to which second output fingers are connected.

An amplifier device, such as a Doherty amplifier device, may include an extra lead and decoupling capacitor coupled to radio frequency (RF) cold points of output impedance matching circuitry of multiple amplification paths, such as a carrier path and peaking path, of the amplifier device. The extra lead and the decoupling capacitor are configured to provide low frequency resonance decoupling for the multiple amplification paths. A drain bias voltage may be provided to the drain terminals of transistors of amplifiers of the amplifier device via the extra lead. An integrated passive device (IPD) including a wire fence and one or more conductive pads may be disposed between a carrier amplifier die and a peaking amplifier. The extra lead may be coupled to the RF cold points via the IPD. The wire fence may mitigate RF interference between the carrier amplifier die and the peaking amplifier die.

The present disclosure relates to an amplifier configured to amplify signals within a given operational frequency, and further relates to an amplifier system, and to a Doherty amplifier. Examples include one or more resonance networks connected to an input terminal of a transistor of the amplifier that each include a first inductor arranged in between the input terminal and an intermediate node, a first capacitor arranged in between the intermediate node and ground, and a series network arranged in between the intermediate node and ground that includes a second inductor and a second capacitor. A susceptance presented by the one or more resonance networks at the input terminal cancels the input susceptance of the transistor at a frequency within an operational frequency band. In addition, an RF short is presented by each resonance network at a second harmonic of which the corresponding fundamental lies within the operational frequency band.

To suppress deterioration of output characteristics.SOLUTION: A semiconductor device comprises: a first terminal connected to an output terminal of a first-phase amplifier of a carrier amplifier; a second terminal connected to an output terminal of a second-phase amplifier of the carrier amplifier; a third terminal connected to an output terminal of a first-phase amplifier of a peak amplifier; a fourth terminal connected to an output terminal of a second-phase amplifier of the peak amplifier; a fifth terminal connected to the output terminal of the first-phase amplifier of a peak amplifier; and a sixth terminal connected to the output terminal of the second-phase amplifier of the peak amplifier. A Doherty amplifier comprises: a first metallic component connecting one end of first wiring and the first terminal; a second metallic component connecting one end of second wiring and the second terminal; a third metallic component connecting the other end of the first wiring and the fifth terminal; and a fourth metallic component connecting the other end of the second wiring and the sixth terminal.SELECTED DRAWING: Figure 3

The utility model discloses a packaging carrier and a Doherty amplifier comprising the packaging carrier. The packaging carrier comprises a first input interface and a second input interface, a first output interface and a second output interface; a substrate; the first transistor is located on the substrate, the control end of the first transistor is coupled to the first input interface, and the output end of the first transistor is coupled to the first output interface; the second transistor is located on the substrate, the control end of the second transistor is coupled to the second input interface, the output end of the second transistor is coupled to the second output interface, the first transistor comprises a silicon carbide-based transistor, and the second transistor comprises a silicon-based transistor; and the bias circuit is configured to provide corresponding bias voltages for the first transistor and the second transistor.

A Doherty power amplifier compression compensation circuit is disclosed. A power amplifier chain may include a Doherty amplifier having a main power amplifier path and a peaking power amplifier path, where both paths have a driver stage and an output stage. One or more compression detection circuits may be associated with an output of the main output stage. Responsive to detecting compression at this output, an adjustment is made to one or more knobs in the power amplifier chain. In a first aspect, a variable gain control circuit may adjust the gain of an earlier amplifier (e.g., the driver stage) for either (or both) of the main path or the peaking path. In further aspects, one or more bias circuits may have bias signals adjusted. Both amplitude and phase compression may be addressed by aspects of the present disclosure.

An amplifying circuit includes a transistor that includes an input terminal receiving a high frequency signal and an output terminal outputting an amplified high frequency signal, an inductor connected in parallel to the transistor between the input terminal and the output terminal, and a capacitor connected in parallel to the transistor and connected in series to the inductor between the input terminal and the output terminal.

The invention relates to a transmission and reception device with a broadband HF power amplifier, in particular an N-way Doherty amplifier with active load modulation. The object of the invention is to provide a high-power transmission and reception device suitable for high-power and broadband applications and having a transmission power of more than 10 Watts to approximately 2000 Watts by means of appropriate design measures in combination with electronic components, starting from a transmission and reception device with a module (GSZ) having a configurable HF high-power amplifier (HPA) that operates between and below two power back-off points and comprises a main power amplifier (DM) with an amplifier core and at least one peak power amplifier (DP1) with an amplifier core, wherein a digital input signal distributor (ET) is provided, which is connected to the input of the main power amplifier (DM) and to the input of the at least one peak power amplifier (DP1) and has a plurality of outputs, and an output combiner connected to the output of the amplifier core of the main power amplifier and the output of the at least one peak power amplifier is provided. This object is achieved according to the invention, in which an additional multiharmonic transformation line (LAH) is provided at the amplifier core output of a main power amplifier (DM) and at the amplifier core output of at least one peak power amplifier (DP1) and a circulator (Z1) connected to the output of an impedance converter (AN1) or an output combiner (C). By means of the circulator (Z1), the upstream main power amplifier (DM) and at least one peak power amplifier (DP1) are protected from overvoltage and overcurrent on the output side, because the circulator (Z1) transfers energy to a collecting resistor (W1) connected to the circulator (Z1). The invention belongs to the field of broadband amplifiers, in particular broadband Doherty amplifier circuits.

The invention provides a Doherty amplifier circuit and a semiconductor device. A Doherty amplifier circuit is provided with: a distributor that distributes an input signal that is input into a first signal and a second signal; a circuit board; a first amplifier which is provided on the circuit board, amplifies the first signal, and outputs the amplified signal as a fourth signal; a second amplifier which is provided on the circuit board, amplifies the second signal, and outputs the amplified signal as a fifth signal; a combining node combining the fourth signal and the fifth signal, and outputting the combined signal as an output signal to an output terminal; an open stub, an end of which is electrically connected to a path between the distributor and the first amplifier; the first end of the first impedance transformer is electrically connected to the second amplifier, and the second end of the first impedance transformer is electrically connected to the synthesis node.

Embodiments of a method and apparatus are disclosed. In embodiments, a Doherty amplifier module includes a substrate including a mounting surface and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output faces a side of the second amplifier die including a second output. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first signal path and the second signal path.

To provide a Doherty amplifier circuit capable of suppressing an influence of intermodulation distortion while suppressing a circuit scale.SOLUTION: A Doherty amplifier circuit includes: a 90-degree hybrid coupler including an input terminal to which a first input signal is input, a first output terminal that outputs a first output signal based on the first input signal, a second output terminal that outputs a second output signal having a phase different from that of the first output signal by 90 degrees based on the first input signal, and an isolation terminal that ensures isolation with the input terminal; a carrier amplifier that amplifies the first output signal and outputs a first amplified signal; and a peak amplifier that amplifies the second output signal and outputs a second amplified signal. The isolation terminal is a terminal to which a second harmonic of a frequency band of a second harmonic of the first input signal is input.SELECTED DRAWING: Figure 1

This Doherty amplifier includes a carrier amplifier and a peak amplifier. A carrier amplifier bias circuit supplies a bias to the carrier amplifier. A peak amplifier bias circuit supplies a bias to the peak amplifier. A current-drawing circuit draws out a portion of the bias current supplied to the peak amplifier from the peak amplifier bias circuit. The current-drawing circuit includes a cascode circuit in which a base ground transistor and an emitter ground transistor are cascode-connected. The collector of the base ground transistor is connected to the peak amplifier, and the base of the emitter ground transistor is connected to an input node of the carrier amplifier.

Adaptive bias networks include small transistors connected to adjust gate bias voltage of one or more transistors of an amplifier or amplifier stage, or in a main or auxiliary path of a compound amplifier such as a Doherty amplifier. The small transistors are sized to avoid additional loading of the input. The adaptive bias circuits of preferred embodiments adjust the gate bias to produce a boost in gate bias voltage of an nFET transistor when the input power is in an upper portion of the amplifier or amplifier stage's input power range, thereby increasing the gain, and reduce gate bias voltage of a pFET transistor in the upper portion of the amplifier's input power range, thereby also increasing the gain. The adaptive bias networks can be implemented with varactors to vary DC voltage across the varactor to change its capacitance and compensate changing input capacitance of the amplifier input FET.

To provide a Doherty amplifier circuit capable of suppressing deterioration in characteristics.SOLUTION: A Doherty amplifier circuit includes: a distributor 16 that distributes a received input signal into a first signal, a second signal and a third signal; a main amplifier 10 that amplifies the first signal and outputs the amplified signal as a fourth signal; a first peak amplifier 12 that amplifies the second signal and outputs the amplified signal as a fifth signal; a second peak amplifier 14 that amplifies the third signal and outputs the amplified signal as a sixth signal; a combiner 18 that combines the fourth signal, the fifth signal and the sixth signal and outputs the combined signal to an output terminal as an output signal; and a semiconductor chip 20 on which the main amplifier, the first peak amplifier and the second peak amplifier are mounted. Input power of the input signal at which the second peak amplifier is turned on is larger than input power at which the first peak amplifier is turned on, and the main amplifier and the first peak amplifier are adjacent to each other.SELECTED DRAWING: Figure 1

A Doherty amplifier circuit includes a 90° hybrid coupler that includes an input terminal receiving a first input signal, a first output terminal outputting a first output signal on the basis of the first input signal, a second output terminal outputting, on the basis of the first input signal, a second output signal different in phase by 90° from the first output signal, and an isolation terminal whose isolation from the input terminal is ensured; a carrier amplifier that amplifies the first output signal to output a first amplified signal; and a peak amplifier that amplifies the second output signal to output a second amplified signal. The isolation terminal is a terminal which receives a second harmonic in the second harmonic frequency band of the first input signal.

The high-frequency amplifier includes: a drive amplifier that amplifies an input high-frequency signal; and an asymmetric Doherty amplifier that amplifies the high-frequency signal output from the drive amplifier, the high-frequency amplifier having: a first laminated structure; a second laminated structure body laminated on the first laminated structure body; and a third laminated structure laminated on the second laminated structure, the asymmetric Doherty amplifier having: a carrier amplifier; a peak amplifier that starts an amplification operation when the output of the carrier amplifier reaches a saturation region, and has a saturation output different from that of the carrier amplifier; a branch circuit to which the high-frequency signal output from the drive amplifier is input; a first signal path; a second signal path; and a phase adjustment circuit. The second laminated structure has a first wiring layer, a second wiring layer, a dielectric layer, and one or more capacitors.

The invention provides a Doherty amplifier circuit and a semiconductor device. A Doherty amplifier circuit is provided with: a distributor that distributes an input signal that is input into a first signal and a second signal; the main amplifier is used for amplifying the first signal and outputting the amplified signal as a fourth signal; the first peak amplifier is used for amplifying the second signal and outputting the amplified signal as a fifth signal; a synthesizer which synthesizes the fourth signal and the fifth signal and outputs the synthesized signal as an output signal to an output terminal; the first matching circuit is connected between the distributor and the main amplifier; and a second matching circuit connected between the distributor and the first peak amplifier, the absolute value of the return loss when viewed from the distributor to the second matching circuit being greater than the absolute value of the return loss when viewed from the distributor to the first matching circuit in the operating band.

An electronic device includes an N-way Doherty power amplifier with an amplifier input and an amplifier output, wherein N is an integer larger than or equal to two, a number of transformers for the Doherty output network, wherein the number of transformers is N-l; and a high-speed adaptive biasing circuit. A transmit / receive front-end module that integrates the N-way Doherty amplifier with a low-noise amplifier and a transmit / receive switch, occupying a compact area.