82 results about "Doherty amplifier" patented technology

Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

A Doherty amplifier circuit includes a carrier amplifier that amplifies a radio-frequency signal, a peak amplifier that amplifies a radio-frequency signal, and a bias circuit that supplies a bias current or a bias voltage to the peak amplifier. The peak amplifier includes one or more amplifier transistors that amplify a radio-frequency signal, and a state control circuit that controls the operating state of the one or more amplifier transistors on the basis of an input control signal.

An amplifier is disclosed having a carrier amplifier and a peaking amplifier coupled in parallel with the carrier amplifier, wherein the peaking amplifier has peaking output transistors. A peaking power supply adaptive bias generator is coupled to bias control terminals of the peaking output transistors. The peaking power supply adaptive bias generator is configured to sense supply voltage to the peaking amplifier and increase bias currents to the peaking output transistors as the supply voltage decreases.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A Doherty amplifier includes: a carrier amplifier to amplify a first high frequency signal having a first higher harmonic and a second higher harmonic; a peak amplifier to amplify a second high frequency signal having the first higher harmonic and the second higher harmonic; a first series resonant circuit connected between an output end of the carrier amplifier and a ground, and configured to resonate at the frequency of the first higher harmonic; a second series resonant circuit connected between an output end of the peak amplifier and the ground, and configured to resonate at the frequency of the first higher harmonic; a first parallel resonant circuit configured to resonate at the frequency of the second higher harmonic; and a second parallel resonant circuit configured to resonate at the frequency of the second higher harmonic.

A power amplifier includes a substrate, first and second transistor amplifiers, and at least one matching circuit. Respective output terminals of the first and second transistor amplifiers are coupled to a combining node, and the matching circuit includes one or more passive electrical components coupled between one of the respective output terminals and the combining node. At least one of the first and second transistor amplifiers or the one or more passive electrical components is mounted on the substrate in a flip chip configuration. The matching circuit may include a shunt inductance that is coupled to the one of the respective drain terminals by a conductive bump. Related devices are also discussed.

A Doherty amplifier according to the present disclosure comprises a main amplifier, an auxiliary amplifier, a distribution circuit that distributes signals to the main amplifier and the auxiliary amplifier, and a phase compensation circuit. The main amplifier has a first input matching circuit and a plurality of main amplification stages. The auxiliary amplifier has a second input matching circuit and a plurality of auxiliary amplification stages. The distribution circuit has a first line connected to the first input matching circuit and a second line connected to the second input matching circuit. The electrical length of the first line is such that the input impedance of the first line is higher than the characteristic impedance of the first line and the imaginary component is less than 10% of the real component when a small signal is input. The electrical length of the second line is such that the input impedance of the second line is higher than the characteristic impedance of the second line and the imaginary component is less than 10% of the real component when a small signal is input. The phase compensation circuit is provided in an inter-stage matching circuit of the plurality of main amplification stages or the plurality of auxiliary amplification stages.

A Doherty amplifier includes a first amplifier that includes first output fingers and a first output electrode connected to the first output fingers, a second amplifier that includes second output fingers and a second output electrode connected to the second output fingers, a first bonding wire connected between a first region in the first output electrode and a second region in the second output electrode, a second bonding wire connected between a third region in the first output electrode and a fourth region in the second output electrode, and at least one of a first capacitor connected in series with the first bonding wire, and a second capacitor connected in parallel with the second bonding wire, wherein the first and the third regions are regions to which the first output fingers are connected, and the second and the fourth regions are regions to which second output fingers are connected.

An amplifier device, such as a Doherty amplifier device, may include an extra lead and decoupling capacitor coupled to radio frequency (RF) cold points of output impedance matching circuitry of multiple amplification paths, such as a carrier path and peaking path, of the amplifier device. The extra lead and the decoupling capacitor are configured to provide low frequency resonance decoupling for the multiple amplification paths. A drain bias voltage may be provided to the drain terminals of transistors of amplifiers of the amplifier device via the extra lead. An integrated passive device (IPD) including a wire fence and one or more conductive pads may be disposed between a carrier amplifier die and a peaking amplifier. The extra lead may be coupled to the RF cold points via the IPD. The wire fence may mitigate RF interference between the carrier amplifier die and the peaking amplifier die.

The utility model discloses a packaging carrier and a Doherty amplifier comprising the packaging carrier. The packaging carrier comprises a first input interface and a second input interface, a first output interface and a second output interface; a substrate; the first transistor is located on the substrate, the control end of the first transistor is coupled to the first input interface, and the output end of the first transistor is coupled to the first output interface; the second transistor is located on the substrate, the control end of the second transistor is coupled to the second input interface, the output end of the second transistor is coupled to the second output interface, the first transistor comprises a silicon carbide-based transistor, and the second transistor comprises a silicon-based transistor; and the bias circuit is configured to provide corresponding bias voltages for the first transistor and the second transistor.

A Doherty power amplifier compression compensation circuit is disclosed. A power amplifier chain may include a Doherty amplifier having a main power amplifier path and a peaking power amplifier path, where both paths have a driver stage and an output stage. One or more compression detection circuits may be associated with an output of the main output stage. Responsive to detecting compression at this output, an adjustment is made to one or more knobs in the power amplifier chain. In a first aspect, a variable gain control circuit may adjust the gain of an earlier amplifier (e.g., the driver stage) for either (or both) of the main path or the peaking path. In further aspects, one or more bias circuits may have bias signals adjusted. Both amplitude and phase compression may be addressed by aspects of the present disclosure.

Embodiments of a method and apparatus are disclosed. In embodiments, a Doherty amplifier module includes a substrate including a mounting surface and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output faces a side of the second amplifier die including a second output. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first signal path and the second signal path.

To provide a Doherty amplifier circuit capable of suppressing an influence of intermodulation distortion while suppressing a circuit scale.SOLUTION: A Doherty amplifier circuit includes: a 90-degree hybrid coupler including an input terminal to which a first input signal is input, a first output terminal that outputs a first output signal based on the first input signal, a second output terminal that outputs a second output signal having a phase different from that of the first output signal by 90 degrees based on the first input signal, and an isolation terminal that ensures isolation with the input terminal; a carrier amplifier that amplifies the first output signal and outputs a first amplified signal; and a peak amplifier that amplifies the second output signal and outputs a second amplified signal. The isolation terminal is a terminal to which a second harmonic of a frequency band of a second harmonic of the first input signal is input.SELECTED DRAWING: Figure 1

A Doherty amplifier circuit includes a 90° hybrid coupler that includes an input terminal receiving a first input signal, a first output terminal outputting a first output signal on the basis of the first input signal, a second output terminal outputting, on the basis of the first input signal, a second output signal different in phase by 90° from the first output signal, and an isolation terminal whose isolation from the input terminal is ensured; a carrier amplifier that amplifies the first output signal to output a first amplified signal; and a peak amplifier that amplifies the second output signal to output a second amplified signal. The isolation terminal is a terminal which receives a second harmonic in the second harmonic frequency band of the first input signal.

The high-frequency amplifier includes: a drive amplifier that amplifies an input high-frequency signal; and an asymmetric Doherty amplifier that amplifies the high-frequency signal output from the drive amplifier, the high-frequency amplifier having: a first laminated structure; a second laminated structure body laminated on the first laminated structure body; and a third laminated structure laminated on the second laminated structure, the asymmetric Doherty amplifier having: a carrier amplifier; a peak amplifier that starts an amplification operation when the output of the carrier amplifier reaches a saturation region, and has a saturation output different from that of the carrier amplifier; a branch circuit to which the high-frequency signal output from the drive amplifier is input; a first signal path; a second signal path; and a phase adjustment circuit. The second laminated structure has a first wiring layer, a second wiring layer, a dielectric layer, and one or more capacitors.

An electronic device includes an N-way Doherty power amplifier with an amplifier input and an amplifier output, wherein N is an integer larger than or equal to two, a number of transformers for the Doherty output network, wherein the number of transformers is N-l; and a high-speed adaptive biasing circuit. A transmit / receive front-end module that integrates the N-way Doherty amplifier with a low-noise amplifier and a transmit / receive switch, occupying a compact area.

A variable power distributor (10) comprises a fixed power distributor (4) which is connected to an input terminal (1) and which outputs a high-frequency signal with power distributed at a ratio of N:1 (N is a real number of 1 or more) from a Port 1 and a Port 2, the Port 1 being connected to a first distribution output terminal (2), and a power amplifier (5) which is connected between the Port 2 and a second distribution output terminal (3), wherein: the maximum gain of the power amplifier (5) with respect to the high-frequency signal is greater than 10 x log (N) [dB]; when the input power to the input terminal (1) is equal to or less than a first switching power, the output power from the first distribution output terminal (2) is greater than or equal to the output power from the second distribution output terminal (3); and when the input power to the input terminal (1) is greater than the first switching power, the output power from the second distribution output terminal (3) is greater than the output power from the first distribution output terminal (2).

Disclosed are an output network of a Doherty amplifier, a Doherty amplifier including the output network, and a design method of the Doherty amplifier. The output network of a Doherty amplifier including a main amplifier and an auxiliary amplifier, and the output network includes a combination node; a main output network connected between an output port of the main amplifier and the combination node; an auxiliary output network connected between an output port of the auxiliary amplifier and the combination node; and a merging matching network connected between the combination node and a radio frequency output port of the Doherty amplifier; the merging matching network is configured for the node impedance at the combination node being a complex impedance, and the main output network and the auxiliary output network are configured for the node impedance being matching with the goal load impedances of the main amplifier and the auxiliary amplifier.

A Doherty amplifier includes a distributor, a first amplifier, a second amplifier, a third node, an impedance conversion circuit having a first end connected to a first node and a second end connected to the third node, and rotating an impedance viewed from the first amplifier to the third node with respect to an impedance viewed from the first amplifier to the first node within a range of 360°±45° on a Smith chart in a second harmonic wave, and a harmonic tuning circuit having a third end connected to a line connecting the first amplifier and the third node at the first node, and making an absolute value of an impedance with respect to a reference potential at the third end in the second harmonic wave smaller than an absolute value of an impedance with respect to the reference potential at the third end in the fundamental wave.

Power supply system (2) with a power converter (3) generating a high-frequency power signal, which can be connected to a load (6) to supply a plasma or gas laser process with power, wherein the power converter (3) comprises at least one amplifier stage (40) with a first and a second amplifier path (42, 43) each having an amplifier unit (42a, 43a), wherein the first amplifier path (42) is configured to output a first amplifier path output signal and the second amplifier path (43) is configured to output a second amplifier path output signal having a phase shifted relative to the first amplifier path output signal, which is unequal to, in particular greater than, 0° and unequal to, in particular less than, 180°, wherein the amplifier paths (42, 43) are connected to a phase-shifting coupler unit (47) which couples the output signals of the amplifier paths (42, 43) to a high-frequency power signal, characterized in that the first and second amplifier units (42a, 43a) are designed as Doherty amplifiers, each having the following components: i. a base load amplifier (103) configured to provide base load amplifier power; ii. a peak load amplifier (104) configured to provide peak load amplifier power; and iii. a power coupler (107) for combining the base load amplifier power and the peak load amplifier power at the output of the respective first and second amplifier units (42a, 43a) to form an amplifier output power (P out ).

A Doherty amplifier circuit having a tunable impedance and phase (“TIP”) circuit to provide an adjustable alpha factor, which allows for a selection of power added efficiency (PAE) curves that are useful for applications having different modulations or to meet other criteria. Embodiments include a Doherty amplifier having a TIP circuit that provides for tunability of the impedance ZINV (resulting in an adjustable alpha factor) while maintaining the phase of the output of the carrier amplifier at 90° (for a selected polarity)±a low phase variation. Embodiments of the TIP circuit include one or more series-connected TIP cells comprising at least one TIP circuit combined with a tunable phase adjustment circuit. In operation, when the impedance of a TIP cell is adjusted, adjustments within the cell are also made to provide a phase shift correction back towards 90° (at the selected polarity).

A Doherty amplification circuit (10) to which a D-ET mode or an SPT mode is applied comprises: a power amplifier (11) used as a carrier amplifier; a power amplifier (12) used as a peak amplifier; and a synthesizer (22) including an input terminal (221) connected to an output terminal of the power amplifier (11), an input terminal (222) connected to an output terminal of the power amplifier (12), and an output terminal (223). The size of the power amplifier (12) is smaller than the size of the power amplifier (11).

The invention relates to a power supply system (2) comprising a power converter (3) which generates a high-frequency power signal and which can be connected to a load (6) in order to supply a plasma or gas laser process with power, wherein: the power converter (3) comprises at least one amplifier stage (40) having a first and a second amplifier path (42, 43) each having an amplifier unit (42a, 43a); the first amplifier path (42) is configured to output a first amplifier-path output signal and the second amplifier path (43) is configured to output a second amplifier-path output signal which has a phase that is shifted relative to the first amplifier-path output signal, said phase being not equal to, in particular greater than, 0° and being not equal to, in particular less than, 180°; the amplifier paths (42, 43) are connected to a phase-position-shifting coupler unit (47) which couples the output signals of the amplifier paths (42, 43) to form a high-frequency power signal, the power supply system being characterized in that the first and second amplifier units (42a, 43a) are in the form of Doherty amplifiers each having the following components: i. a base-load amplifier (103) which is designed to provide a base-load amplifier power; ii. a peak-load amplifier (104) which is designed to provide a peak-load amplifier power; and iii. a power coupler (107) for combining the base-load amplifier power and the peak-load amplifier at the output of the particular first or second amplifier unit (42a, 43a) to form an amplifier output power (Pout).

The utility model relates to a kind of circuit structure for improving the linearity of Doherty amplifier, it is characterized in that, the Doherty amplifier includes main amplifier and at least one peak amplifier;Resistance structure is connected in series in the input end of the peak amplifier.The utility model reduces the gain expansion of peak amplifier by connecting resistance in series in the input end of peak amplifier, resistance-driven peak amplifier.The input power transmitted to peak amplifier is reduced by resistance-driven, and control mechanism of amplifier overall gain expansion is generated.By appropriately selecting the series resistance / resistance network of peak amplifier input end, the gain shape of entire power amplifier can be controlled and smoothed, so as to improve the linear operation of Doherty amplifier.

An electronic device may be provided with an antenna fed using a Doherty amplifier. The Doherty amplifier may include a main amplifier path with a main amplifier and an auxiliary amplifier path with an auxiliary amplifier. An adaptive biasing circuit may be coupled to the main amplifier path around the main amplifier. The adaptive biasing circuit may include a first voltage detector coupled to an input of the main amplifier, a second voltage detector coupled to an output of the main amplifier, and a subtractor. The first voltage detector may measure an input voltage of the main amplifier. The second voltage detector may measure an output voltage of the main amplifier. The subtractor may generate a difference voltage between the input and output voltages. The auxiliary amplifier may be biased using the difference voltage.

Comprises: a carrier amplifier and a peak amplifier, each of which is a differential amplifier comprising a first phase amplifier and a second phase amplifier; and a balun that synthesizes the output signal of the carrier amplifier and the output signal of the peaking amplifier. A carrier amplifier and a peaking amplifier are formed in a semiconductor device. A balun is formed on a printed wiring board on which a semiconductor device is mounted. A first wiring electrically connecting the output terminal of the first phase amplifier of the carrier amplifier and the output terminal of the first phase amplifier of the peak amplifier; and a second wiring that electrically connects the output terminal of the second phase amplifier of the carrier amplifier and the output terminal of the second phase amplifier of the peak amplifier is formed on the printed wiring board, and the other is formed on the semiconductor device.

The Doherty amplifier comprises: a first filter circuit (6a) that, when an input signal of the first frequency band is input, outputs a first input signal that attenuates the input signal by a first attenuation amount, and when an input signal of the second frequency band different from the first frequency band is input, outputs a second input signal that allows the input signal to pass; and a second filter circuit (6b) that, when an input signal of the first frequency band is input, outputs a third input signal that attenuates the input signal by a second attenuation amount smaller than the first attenuation amount, and when an input signal of the second frequency band is input, outputs a third input signal that attenuates the input signal by an attenuation amount greater than the first attenuation amount. The fourth input signal of attenuation; the first amplifier (8a), whose gate bias voltage is fixed, operates as an auxiliary amplifier when input to the first input signal from the first filter circuit (6a), and operates as a main amplifier when input to the second input signal from the first filter circuit (6a); and the second amplifier (8b), whose gate bias voltage is fixed, operates as a main amplifier when input to the third input signal from the second filter circuit (6b), and operates as an auxiliary amplifier when input to the fourth input signal from the second filter circuit (6b).

The utility model discloses a packaging carrier and a Doherty amplifier comprising the packaging carrier, the packaging carrier comprises a first input interface, a second input interface, a first output interface, a second output interface, a substrate, a first transistor, a second transistor, a third transistor, a fourth transistor and an interstage matching circuit, the first transistor, the second transistor, the third transistor and the fourth transistor are located on the substrate, control ends of the first transistor and the third transistor are respectively coupled to the first input interface and the second input interface, output ends of the first transistor and the third transistor are respectively coupled to control ends of the second transistor and the fourth transistor, and output ends of the second transistor and the fourth transistor are respectively coupled to the first output interface and the second output interface; and wherein each of the first and third transistors includes a silicon-based transistor, and at least one of the second and fourth transistors includes a silicon carbide-based transistor; and the inter-stage matching circuit is configured to provide an impedance matching function for the first and second transistors, and to provide an impedance matching function for the third and fourth transistors.

A Doherty amplifier includes first and second input terminals, first and second amplifiers, and an output combiner circuit. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output. The output combiner circuit is coupled between the first amplifier output, the second amplifier output, and a final summing node. The output combiner circuit includes a first inductive element, a first capacitor integrated within an integrated passive device (IPD), and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the first capacitor, and the second inductive element is coupled between a combining node and the first terminal of the first capacitor. A second terminal of the first capacitor is coupled to ground.