94results about How to "Improve power added efficiency" patented technology

A predistortion circuit for a microwave amplifier and more particularly to predistortion circuit configured as a Doherty amplifier. The predistortion circuit is adapted to be coupled to a downstream Doherty amplifier to precompensate for the gain compression and phase expansion of the downstream Doherty amplifier as the input power level is increased while simultaneously reducing the intermodulation (IM) distortion. In order to provide precompensation, the precompensation circuit is operated at bias level to provide gain expansion and phase compression to cancel out the gain compression and phase expansion of the downstream Doherty amplifier to provide a higher overall linear power added efficiency (PAE).

A radio comprises a power amplifier for amplifying a signal to be transmitted; a distortion compensation table storing distortion compensation coefficients for compensating a distortion of the power amplifier; a computing unit for updating the distortion compensation coefficient based on a difference between a transmission input signal and a transmission output signal; a bias voltage controller for applying a bias voltage to the power amplifier, said bias voltage determined based on a transmit control signal so as to maximize a power efficiency of the power amplifier.

In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a source region 10, a drain region 9 and leach-through layers 3 (4), to which a first layer wirings 11a, 11d (M1) are connected and, further, backing second layer wirings 12a to 12d are connected on the conductor plugs 13 (P1) to the first layer wirings 11s, 11d (M1).

In a distortion compensation device which uses distortion compensation coefficients to subject distortion compensation processing to an input signal and supply the result of the distortion compensation processing to a distorting device, calculates the distortion compensation coefficients based on the input signal before distortion compensation and the feedback signal fed back from the output side of the distorting device, and stores the calculated distortion compensation coefficients in association with the input signal, (1) the feedback signal is AD-converted; (2) the AD-converted output is subjected to fast Fourier transform (FFT) processing; (3) the FFT calculation result is used to calculate the value of either the signal-to-noise ratio SNR, or the adjacent channel leakage power ratio ACLR, or the noise level; (4) the delay time occurring in the distorting device and feedback loop is adjusted such that the difference between the above calculated value at the current time and the above calculated value at the immediately preceding time is either zero, or is equal to or less than a threshold value; and, (5) this adjustment processing is repeated to determine the accurate delay time, and based on this delay time the timing of each of the portions of the distortion compensation device is adjusted.

An amplifier system is provided that includes a first balun with an input and an output. A second balun has an input and an output. An amplifier assembly is provided and has at least a first amplifier in parallel to a second amplifier. The first amplifier provides the input to the first balun and the second amplifier provides the input to the second balun. A power combining circuit is provided. The first and second baluns are coupled to a common node of the power combining circuit. A first lumped element circuit is coupled between the output of the first balun and the power combining circuit. A second lumped element circuit is coupled between the output of the second balun and the power combing circuit. The outputs are coupled to the common node.

There is provided a semiconductor device capable of ensuring a complete enhancement-mode operation and realizing a power transistor excellent in the low-distortion, high-efficiency performance. On a surface of a substrate (1) composed of single crystal GaAs, a second barrier layer (3) composed of AlGaAs, a channel layer (4) composed of InGaAs, a third barrier layer (12) composed of InGaP and a first barrier layer (11) composed of AlGaAs are stacked in this order, while placing in between a buffer layer (2). Relation of χ₁−χ₃≦0.5*(Eg₃-Eg₁), where χ₁ is electron affinity of the first barrier layer (11), Eg₁ is a band gap of the same, χ₃ is electron affinity of the third barrier layer (12), and Eg₃ is a band gap of the same, is satisfied between the first barrier layer (11) and the third barrier layer (12).

An adaptive bias circuit is provided for an amplifier module including a RF power amplifier for amplifying an input signal to generate an output signal, wherein the bias circuit receives the input signal to adjust a driving current to control a quiescent current of the RF power amplifier. The adaptive bias circuit includes means for providing the driving current to the bias circuit and means for drawing a bypass current from the providing means to reduce the driving current in response to the input signal, wherein the quiescent current is reduced when the driving current is reduced and the bypass current increases when the input signal is reduced.

The invention discloses a push-pull radio-frequency power amplifier with improved linearity and efficiency, comprising an input matching network, an output matching network and a power amplification circuit, wherein the power amplification circuit comprises a first-stage amplification circuit and a second-stage amplification circuit, the first-stage amplification circuit is connected with the input matching network, the second-stage amplification circuit is connected between the first-stage amplification circuit and the output matching network, and the second-stage amplification circuit is an NPN-NPN push-pull amplification circuit composed of a second common collector amplifying tube and a second common-emitter amplifying tube. The output matching network is an output filter matching network which comprises a secondary harmonic series resonance network, a third harmonic series resonance network and a stopping condenser, wherein the secondary harmonic series resonance network is connected between the output end of the second-stage amplification circuit and the ground, the third harmonic series resonance network is connected between the output end of the secondary harmonic series resonance network and the stopping condenser, and the stopping condenser is connected between the third harmonic series resonance network and the power amplifier. The invention improves the additional efficiency of the radio-frequency power amplifier and improves the linearity of the radio-frequency power amplifier.

A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in RF applications such as mobile telephones. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units, impedance transformer, and a power stage.

An amplifier system is provided,with a first balun that has an input and an output. A second balun has an input and an output. An amplifier assembly is provided with at least a first amplifier in parallel to a second amplifier. The first amplifier provides the input to the first balun, and the second amplifier provides the input to the second balun. The outputs of the first and second baluns add constructively and substantially in series.

An amplifier system is provided that has a first balun with an input and an output, and a second balun with an input and an output. A first set of amplifiers is coupled in series and to the output of the first balun. A second set of amplifiers is coupled in series and to the output of the second balun. The first and second sets of amplifiers are in series or parallel. A load impedance of the first and second sets of amplifiers does not substantially change at an output of any amplifier that is switched on when another amplifier is switched off.

A heterojunction bipolar transistor, having a structure in which a subcollector layer of a first conductive type having a higher doping concentration than a collector layer, a collector layer of the first conductive type, a base layer of the second conductive type, and an emitter layer of the first conductive type are deposited, in order, on a semi-insulating semiconductor substrate, and in which a hole barrier layer of semiconductor material with a band gap wider than that of the base layer is inserted between the base layer and the collector layer, so as to be in direct contact with the base layer.

A high-frequency power amplifier with a temperature compensation function for power amplifying a high-frequency signal, includes: a power amplifying transistor having an emitter grounded; a high power output bias circuit that supplies a high power output current corresponding to a high power output of the high-frequency power amplifier to the power amplifying transistor; and a low power output bias circuit that supplies a low power output current corresponding to a low power output of the high-frequency power amplifier to the power amplifying transistor.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

A radio frequency power amplifier having a transistor 104 that amplifies a radio frequency signal of a first frequency; an input matching circuit 102 connected to an input terminal of the transistor 104; an output matching circuit 105 connected to an output terminal of the transistor 104; and a reactance control circuit 107 with one end connected to the output terminal of the transistor 104, and the other end connected to an input terminal of an output matching circuit 105 and a bias terminal 103. The reactance control circuit 107 has a reactance which resonates at a second frequency with a parasitic capacitance of the transistor 104 at the output terminal of the transistor 104. The second frequency is identical or close to the first frequency.

A high electron mobility transistor comprises a GaN-based electron accumulation layer formed on a substrate, an electron supply layer formed on the electron accumulation layer, a source electrode and a drain electrode formed on the electron supply layer and spaced from each other, a gate electrode formed on the electron supply layer between the source and drain electrodes, and a hole absorption electrode formed on the electron accumulation layer so as to be substantially spaced from the electron supply layer. Since the hole absorption electrode is formed on the electron absorption layer in order to prevent holes generated by impact ionization from being accumulated on the electron accumulation layer, a kink phenomenon is prevented. Good drain-current/voltage characteristics are therefore obtained. A high power/high electron mobility transistor is provided with a high power-added efficiency and good linearity.