41 results about "Multistage amplifier" patented technology

Described is a system for modulating power to one or more radio frequency (RF) amplifiers to suppress undesired output signal components, improve linearity and reduce noise. The described systems and techniques enable shaping of spectral components introduced via an amplifier bias voltage owing to transitions among bias discrete states. The systems and techniques facilitate operation of multilevel, RF amplifiers under a wider range of operating conditions. In embodiments, the system includes modulators coupled to a supply terminal port of each of the one or more amplifiers to modulate the voltage levels supplied to the one or more amplifiers. The outputs of the modulators may be combined to provide a combined signal coupled to the amplifiers. A delay circuit delays switching of at least one of the power modulators relative to other modulator, by a variable time delay. This results in suppression of undesired output signal components of the amplifier output.

The invention relates to a multi-stage amplifier, an analog-to-digital converter and electronic equipment, and the multi-stage amplifier comprises a first-stage amplifier which comprises a first step-down charge pump and is used for carrying out the first-stage amplification of a to-be-amplified signal and outputting a first amplified signal; the second-stage amplifier comprises a second step-down charge pump and a second amplifier and is used for carrying out second-stage amplification on the first amplification signal and outputting a second amplification signal; and the third-stage amplifier comprises a boost charge pump and a third amplifier and is used for carrying out third-stage amplification on the second amplification signal and outputting a third amplification signal. According to the multi-stage amplifier, low-power-consumption, high-gain and large-swing output can be achieved in the multi-stage amplifier, voltage rising and falling adjustment is achieved among different amplification stages through a multi-stage dynamic power supply framework, and therefore balance among gain, speed and power consumption is achieved.

The invention relates to a method for realizing radio frequency path power calibration processing for a large-scale MIMO multi-stage amplifier. The method comprises the following steps: acquiring a single-stage amplifier temperature compensation coefficient Ki at the same frequency point and different temperatures based on single-stage amplifier temperature and power data; multi-stage amplifier temperature compensation coefficients Kj of different frequency points are obtained based on the multi-stage amplifier temperature and power data; searching a temperature compensation coefficient Kp closest to the temperature compensation coefficient Kj of the multi-stage amplifier at different frequency points; and performing power compensation by using a power interval corresponding to the temperature compensation coefficient Kp at a certain frequency point. By adopting the method, the system, the device, the processor and the computer readable storage medium for realizing the radio frequency path power calibration processing for the large-scale MIMO multi-stage amplifier, the problem of rapid output power calibration of the large-scale MIMO multi-radio frequency path can be solved, and the accuracy of the output power in the radio frequency path is further improved. The calibration precision of the output power of the radio frequency path is high, the calibration granularity is accurate and controllable, and the captured power compensation value is close to the optimum.

A multi-stage amplifier includes a plurality of single-stage differential amplifiers that are connected in a cascade arrangement. The single-stage differential amplifiers include a first single-stage differential amplifier and a second single-stage differential amplifier. The first single-stage differential amplifier has a first output network. The second single-stage differential amplifier has a second output network. A common-mode (CM) node of the second output network is shorted to a CM node of the first output network.

Various examples relate to a frequency-compensated amplifier circuit including a first multi-stage amplifier including a first amplifier input node, a first amplifier output node, and a first amplifier intermediate node. A first feedback path between the first amplifier input node and the first amplifier output node includes a feedback resistor. A second feedback path between the first amplifier output node and the first amplifier intermediate node includes a first capacitor and a portion of the feedback resistor. A first switch circuit can be electrically coupled to the first capacitor and the feedback resistor. The first switch circuit can have a first state in which the first capacitor is coupled to a first tap point of the feedback resistor and the portion of the feedback resistor has a first value. The first switch circuit can also have a second state in which the first capacitor is coupled to a second tap point of the feedback resistor and the portion of the feedback resistor has a second value different from the first value.

Power amplifier assemblies and multiple-stage amplifier systems include first and second semiconductor dies, each of which includes an integrated transistor. The second semiconductor die is physically and electrically coupled to a die-mounting interface at a mounting surface of the first semiconductor die in a "flip-chip" orientation. This arrangement provides a multiple-stage amplifier that includes the integrated transistor of the first semiconductor die coupled in a cascade arrangement with the integrated transistor of the second semiconductor die. The first and second semiconductor dies may be formed from different semiconductor materials.

The utility model relates to an analog integrated circuit. The utility model discloses a low-voltage integrated circuit operational amplifier, and aims to solve the problem of higher working voltage of an operational amplifier in the prior art by improving a circuit structure and reducing the number of inter-electrode voltage drops of transistors of a direct current channel of the amplifier. The low-voltage integrated circuit operational amplifier comprises a multi-stage amplifier formed by transistors, and is characterized in that a direct current channel of the amplifier only comprises a transistor base-emitter voltage drop. According to the integrated circuit operational amplifier, the number of inter-electrode voltage drops of transistors of a direct-current channel of the amplifier is reduced by improving the circuit structure, and the integrated circuit operational amplifier has the characteristics of low power consumption and high gain while meeting low-voltage work and can be applied to systems such as power management, portable equipment, sensors and communication equipment.

An amplifier device may include at least one two-stage amplifier package, where an amplifier of a first amplification stage of the amplifier package may be aligned opposite to amplifiers of a second amplification stage of the amplifier package. The amplifier device may be a three-stage amplifier device, where the second stage of the two-stage amplifier package is coupled to amplifiers of a final (third) stage, which may be in a Doherty configuration. The amplifiers of the second stage may be arranged in any of a class AB configuration, a Doherty configuration, a multi-stage Doherty configuration (with amplifiers of the final amplification stage), or a multi-driver, multi-stage Doherty configuration. One or more passive components used for inter-stage impedance matching may be disposed outside of the two-stage amplifier package. Amplifiers of the first, second, and third amplification stages may each be gallium nitride (GaN) amplifiers, in some embodiments.

Power amplifier assemblies and multiple-stage amplifier systems include first and second semiconductor dies, each of which includes an integrated transistor. The second semiconductor die is physically and electrically coupled to a die-mounting interface at a mounting surface of the first semiconductor die in a “flip-chip” orientation. This arrangement provides a multiple-stage amplifier that includes the integrated transistor of the first semiconductor die coupled in a cascade arrangement with the integrated transistor of the second semiconductor die. The first and second semiconductor dies may be formed from different semiconductor materials.

The application discloses a light source device, a system and a water window band full-coherent free electron laser generating method. The device comprises: a harmonic generation unit for connecting an electron beam and a seed laser and generating low-order harmonics; at least two cascaded amplifier units connected with the harmonic generation unit, for connecting the low-order harmonic radiation and generating coherent harmonic radiation, and for tuning the coherent harmonic laser to high-order harmonic radiation to obtain water window band full-coherent free electron laser pulses. The application constructs a multi-stage amplifier unit in the rear stage of the harmonic generation unit, and each subsequent amplifier unit is configured to resonate on a high-order harmonic of the radiation output by the previous amplifier unit, so that the harmonic radiation of the previous stage is used as the effective seed of the subsequent stage, the frequency is up-converted stage by stage, the frequency of the coherent radiation is converted to the target high-order harmonic stage by stage, and the water window band full-coherent free electron laser is obtained.

The present invention discloses a K-band radio frequency front-end transceiver processing module, comprising a main cavity disposed within a housing, wherein a plurality of signal transceiver transmission link channels are disposed within the main cavity, each signal transceiver transmission link channel comprising a connected radio frequency receiving channel provided with a radio frequency receiving microwave circuit and a radio frequency transmitting channel provided with a radio frequency transmitting microwave circuit, the radio frequency receiving channel comprising a plurality of mutually connected branch channels, wherein two connected branch channels are mutually connected vertically, and the radio frequency receiving microwave circuit comprises a multi-stage amplifier connected in series, wherein an amplifier is disposed on each branch channel. By disposing mutually vertically connected branch channels, the cavity in which the amplifier is disposed is spatially isolated, and even if the use of amplifiers is increased in the circuit, isolation between the amplifiers can be well achieved, thereby improving gain while avoiding the occurrence of self-excitation.

A power amplifier circuit includes a first amplifier transistor, a first nonlinear element, and a current control circuit. The first amplifier transistor has a base or a gate into which a first signal is input, a collector or a drain from which a signal resulting from amplification of the first signal is output, and an emitter or a source that is grounded. The first nonlinear element is connected between the collector or the drain of the first amplifier transistor and the base or the gate of the first amplifier transistor. The current control circuit is connected between the ground and the base or the gate of the first amplifier transistor and controls current flowing through the first nonlinear element.

The invention discloses a phase-locked amplifier and a resistance determination method of the phase-locked amplifier. The lock-in amplifier comprises an input signal channel, a multi-stage amplifier and an output signal channel; the multi-stage amplifier comprises a first amplifier, a second amplifier and a third amplifier; the high-pass filter is arranged between the first amplifier and the second amplifier; the third amplifier is arranged between the second amplifier and the output signal channel; the first amplifier is used for converting the obtained current signal to be measured into a voltage signal to be measured and amplifying the voltage signal to obtain a first amplified signal; the high-pass filter carries out filtering processing on the first amplification signal to obtain an AC voltage signal; the second amplifier and the third amplifier sequentially amplify the AC voltage signal to obtain a third amplified signal; and the output signal channel is used for outputting the third amplified signal for signal measurement. According to the phase-locked amplifier, the accuracy of an alternating current signal measurement result in a weak signal can be improved.

The invention discloses a control circuit and device of a Gamma driving circuit, and generally relates to the technical field of display panels. The Gamma driving circuit comprises a multi-stage amplifier and a plurality of signal lines, wherein the amplifier is used for controlling the signal lines to output different gray-scale signals; the control circuit comprises a signal input control circuit, a logic control circuit and a bleeder circuit. The signal input control circuit is connected with the first input end and the logic control circuit and outputs a first control signal to the logic control circuit; the logic control circuit is connected with the signal input control circuit, the bleeder circuit and the amplifier, generates a second control signal and a third control signal according to the first control signal, transmits the second control signal to the amplifier, and transmits the third control signal to the bleeder circuit; and the bleeder circuit is connected with the signal line and the logic control circuit, and releases the residual signal in the signal line under the control of the third control signal.

A multistage amplifier (10) according to the present invention comprises, in order, a first amplification unit (11) having a first amplification circuit (111), and a second amplification unit (12) having a second amplification circuit (121). At a frequency that gives an extreme value of a normalized transfer function of the first amplification unit, a normalized transfer function of the second amplification unit has an opposite extreme value. The first amplification unit includes a first amplification circuit, a first inductor connected in parallel to the first amplification circuit, a first resistor, and a second inductor connected in series to the first resistor. The second amplification unit includes a second amplification circuit, a third inductor connected in parallel to the second amplification circuit, and a second resistor.　As a result, the present invention can provide a multistage amplifier capable of suppressing deterioration in frequency characteristics.

An amplifier circuit includes a multi-stage amplifier, a first feedback circuit, and a second feedback circuit. The multi-stage amplifier includes a first-stage amplifier, a last-stage amplifier, and at least one intermediate-stage amplifier cascaded between the first-stage amplifier and the last-stage amplifier. The first feedback circuit is used to couple the positive output terminal of the last-stage amplifier back to the positive input terminal of the at least one intermediate-stage amplifier, or to couple the negative output terminal of the last-stage amplifier back to the negative input terminal of the at least one intermediate-stage amplifier. The second feedback circuit is used to couple the positive output terminal of the last-stage amplifier back to the positive input terminal of the last-stage amplifier, or to couple the negative output terminal of the last-stage amplifier back to the negative input terminal of the last-stage amplifier.

The application discloses a low-noise amplifier structure adopting multi-inductive coupling and current multiplexing, comprising a multi-inductive coupling network and a full nmos current multiplexing technology network, wherein the multi-inductive coupling network and the full nmos current multiplexing technology network are connected, the full nmos current multiplexing technology network is used for making multi-stage amplifiers flow through the same current and making the multi-stage amplifiers share the same power voltage, and the multi-inductive coupling network is used for realizing wideband maximum power transmission matching and noise coefficient matching at an input node, so that high power transmission and low noise coefficient are realized. By using the application, wideband input matching and noise matching can be realized simultaneously. The application can be widely applied to the field of radio frequency receiver front ends.

Power amplifier assemblies and multi-stage amplifier systems include a first semiconductor die and a second semiconductor die, each semiconductor die including an integrated transistor. The second semiconductor die is physically and electrically coupled to a die mount interface at a mounting surface of the first semiconductor die in a "flip-chip" orientation. This arrangement provides a multi-stage amplifier including the integrated transistor of the first semiconductor die coupled in a cascaded arrangement with the integrated transistor of the second semiconductor die. The first semiconductor die and the second semiconductor die can be formed of different semiconductor materials.

An amplifier circuit comprises a multi-stage amplifier having a plurality of amplifiers cascaded between an input port Vin and an output port Vout to form a differential input stage and N subsequent gain stages, a capacitive load CL coupled to the output port Vout, and a compensation network coupled to the multi-stage amplifier and configured for positioning Pole-Zero pairs of each stage of the multi-stage amplifier below a unity gain frequency ωt of the multi-stage amplifier when compensated, with Zeros positioned lower than Poles so as to increase the unity gain frequency ωt.

An electroencephalogram signal acquisition circuit, a chip, and an electroencephalogram system, capable of realizing decoupling between a low-pass cut-off frequency and a gain of an acquisition circuit, and reducing the impact of a gain change on a working current, thereby improving the sampling accuracy of the acquisition circuit. The circuit comprises: a plurality of amplifying circuits, used for respectively filtering and amplifying a plurality of electroencephalogram signals to obtain a plurality of filtered and amplified signals, wherein each amplifying circuit comprises a multi-stage amplifier, the multi-stage amplifier includes a first amplifier and a second amplifier, the first amplifier is a programmable-gain amplifier, and the lower limit of the change range of a low-pass cut-off frequency is greater than a low-pass cut-off frequency of the second amplifier; a multiplexer, used for combining the plurality of filtered and amplified signals to obtain a combined signal; and an analog-to-digital converter, used for converting the combined signal into a digital signal.

A multi-stage amplifier includes a first stage and a second stage. The first stage includes a first common-source amplifier, a first inductive load network including a first load resistor and a first load inductor connected in series, and a first inter-stage inductor. The first inductive load network includes a first source network for receiving a first signal and outputting a first load signal. The first inter-stage inductor is configured to couple the first load signal to a second signal. The second stage includes a second common-source amplifier, a second inductive load network including a second load resistor and a second load inductor connected in series, and a second inter-stage inductor. The second inductive load network includes a second source network for receiving the second signal and outputting a second load signal. The second inter-stage inductor is configured to couple the second load signal to a third signal. The first load inductor and the second load inductor are arranged to enhance inter-stage inductive coupling.

The application discloses a kind of multistage amplifier, radio frequency circuit and electronic equipment, it is related to multistage amplifier design field, including output selector, first stage amplifier, second stage amplifier, third stage amplifier until N+1 stage amplifier.The first N stage amplifier includes amplifier, power detector and interstage selector, wherein, power detection switch can detect whether the signal that this stage amplifier outputs satisfies preset target power;If yes, then directly output signal is output to output selector by interstage selector and output signal is output by output selector;If not, then continue to transmit output signal to next stage amplifier until output signal satisfies preset target power.Therefore, the power of output signal can be amplified to different preset target power by using one multistage amplifier in the application, the number of multistage amplifier required by radio frequency circuit is reduced, so as to reduce the power consumption and volume of radio frequency circuit.

Amplifiers with bias control for DC coupled single-ended distributed amplifiers of multi-stage amplifiers are described herein. An example amplifier with input bias control includes a distributed amplifier cell having an input coupled to a first distributed transmission line and an output coupled to a second distributed transmission line, an input coupling network coupled between the first distributed transmission line and the input of the distributed amplifier cell, and a bias interface circuit coupled between the input coupling network and the input of the distributed amplifier cell. The amplifier can also include a bias control circuit configured to control an amplifier input bias generated by the bias interface circuit at the input of the distributed amplifier cell.

The present disclosure is directed to low noise amplifiers built as a monolithic millimeter or microwave integrated circuit (MMIC) that includes an amplification stage with two or more field effect transistors (FETS) connected in a parallel configuration. An amplifier may include two, three, or more amplification stages. Amplifiers consistent with the present disclosure may operate at frequencies in the range of 3 gigahertz (GHz) to 9 GHz. Each transistor or amplification stage may include their own series feedback element. A second amplification stage may include two parallel transistors, with one having a series feedback element and a feedback shunt spanning the second stage. A third stage may include a single transistor. Each of the transistors connected in a parallel configuration may be tuned to a different corner frequency in order to improve metrics of noise figure, gain, input return loss, and output return loss not possible with conventional amplifier designs.

Aspects of the present disclosure may include a power splitter. The power splitter may include a first splitter branch having a first amplifier with passive components and a second splitter branch having a second amplifier with passive components. By configuring the first splitter branch and the second splitter branch to have similar phase delays, the first splitter branch is substantially electrically isolated from the second splitter branch. The output of the power splitter may be electrically coupled to a multi-stage amplifier. The power splitter may be fabricated on a single semiconductor die or integrally formed on the same semiconductor die with other circuitry, such as the multi-stage amplifier. Other embodiments are disclosed.

A sub-nanosecond laser system is disclosed. The sub-nanosecond laser system may include: a pump laser source operable to generate a pump laser beam having a pump wavelength; a first pump beam splitter operable to receive the pump laser beam and split the pump laser beam into at least a first split pump laser beam and a second split pump laser beam; a passively Q-switched seed laser operable to receive the first split pump laser beam and generate a seed laser beam; and an amplifier assembly operable to receive the second split pump laser beam and the seed laser beam. The amplifier assembly may include one or more amplifiers arranged in series in a multi-stage configuration, arranged in a multi-pass configuration, or a combination thereof.

The utility model relates to an over-standard sun-tracking deviation correction sensor, and belongs to the field of medium-high temperature solar heat utilization or tracking type photovoltaic power generation or solar heat power generation. The device is composed of a slit groove, a sun shield, a solar cell, various light collecting mirrors, a dustproof plate and a frame. The upper edge of a U-shaped plate of a slit groove is connected with a sun shield, a solar cell is installed below the sun shield or on a frame bottom plate, a corresponding related light collecting mirror concentrates extremely weak inclined incident light onto the solar cell, and the solar cell can enable extremely weak deviation signals to pass through a light or electric multi-stage amplifier, so that the light or the electric multi-stage amplifier can be amplified. The strong signal is transmitted to a control system of the double-shaft automatic sun tracking machine, and extremely small tracking errors are corrected in time, so that the utilization rate of solar energy is improved to the maximum extent. The system has the advantages of high sensitivity, high reliability, ultra-precise sun tracking higher than general accuracy and the like.

A higher-speed operation of a power amplifier circuit is achieved. A power amplifier circuit includes multi-stage amplifier units, an ET terminal, and an APT terminal. The multi-stage amplifier units include a final-stage amplifier unit. The final-stage amplifier unit includes a first amplifier element and a second amplifier element that are connected in parallel with each other. The first amplifier element is connected to the ET terminal. The second amplifier element is connected to the APT terminal.

The utility model relates to an LED constant current driving controller with wide load response, which comprises a PWM control chip, a driving circuit 1, a power tube Q1, an inductor L1, a capacitor C1, a voltage detection circuit, a power tube Q2, a driving circuit 2, a load interface, a load detection circuit, a CPU, a digital point locator, a multistage amplifier and a current detection resistor R1, and is characterized in that the PWM control chip is electrically connected with the left end of the driving circuit 1. According to the technical scheme, the brightness adjustment range can be widened, the brightness response curve is close to linearity as much as possible, current adjustment is more accurate, and user experience is better; the controller of one model can drive loads of more models at the same time, and especially when multiple LED light sources are used by one device, the application cost of customers is reduced to a certain extent.