235 results about "Multistage amplifier" patented technology

There is disclosed a multi-stage amplifier comprising: a first amplifier stage; a second amplifier stage; a first voltage supply stage arranged to provide a supply voltage to the first amplifier in dependence on an average power of a signal to be amplified; and a second voltage supply stage arranged to provide a supply voltage to the second amplifier in dependence on an instantaneous power of a signal to be amplified.

There is disclosed a multi-stage amplifier comprising: a first amplifier stage; a second amplifier stage; a first voltage supply stage arranged to provide a supply voltage to the first amplifier in dependence on an average power of a signal to be amplified; and a second voltage supply stage arranged to provide a supply voltage to the second amplifier in dependence on an instantaneous power of a signal to be amplified.

A multi-stage amplifier circuit arranged to take advantage of the desirable characteristics of non-field-plate and field plate transistors when amplifying a signal. One embodiment of a multi-stage amplifier according to the present invention comprises a non-field-plate transistor and a field-plate transistor. The field-plate transistor has at least one field plate arranged to reduce the electric field strength within the field plate transistor during operation. The non-field plate transistor is connected to the field plate transistor, with the non-field-plate providing current gain and the field plate transistor providing voltage gain. In one embodiment the non-field-plate and field plate transistors are coupled together in a cascode arrangement.

A signal processing system and method utilizes a multi-stage amplifier to amplify an input signal. The multi-stage amplifier uses a mixed set of voltage rails to improve the operating efficiency of at least one of the amplification stages while allowing other amplification stages to operate in a predetermined operating mode. Efficiency of at least one of the stages is improved by supplying at least one variable voltage rail to an amplification stage of the multi-stage amplifier. The variable voltage rail varies in response to changes in an input signal voltage to the amplification stage. Accordingly, at least one amplification stage utilizes a variable voltage rail, and all amplification stages are supplied with a set of voltage rails that provides sufficient input signal headroom, thus, providing amplification stage efficiency and adequate voltage to allow operation of all amplification stages.

A three stage amplifier is disclosed provided with a novel frequency compensation technique. Only a single feedback loop with a single compensation capacitance is provided. Instead of a conventional nested compensation technique, damping factor control is provided by means of a fourth gain stage in order to stabilize the amplifier. The resulting amplifier is particularly useful to drive large capacitive loads for low-voltage low-power applications.

A programmable multi-stage amplifier includes a 1st programmable amplifier, a 2nd programmable amplifier, and a control module. The 1st and 2nd programmable amplifiers are coupled in series to amplify an input signal. Each of the 1st and 2nd programmable amplifiers is operably coupled to receive independent gain control signals from the control module. The control module generates the gain control signals by determining the overall gain desired for the programmable multi-stage amplifier and a corresponding gain for each of the 1st and 2nd programmable amplifiers. The factors in which the control module makes this determination are based on an optimization of at least one of the power level of the programmable multi-stage amplifier, the noise factor for the programmable multi-stage amplifier, and / or linearity of the programmable multi-stage amplifier.

An improved rescue device for locating persons buried by avalanches operates in either a transmit mode or a receive mode. A first belt terminator is lockably engagable with a first belt terminator receptor on a case, and is associated with a power switch. The power switch switches between a power on position and a power off position in response to the engagement and disengagement of the first belt terminator with the first belt terminator receptor, and preferably is also independently manually operable. A second belt terminator is lockably engagable with a second belt terminator receptor on the case, and is associated with a mode switch. The mode switch toggles between a transmit mode position and a receive mode position, and preferably is also independently manually operable. A signal processing system generates a visual display which provides graphic information to expedite searching. Prompt icons are displayed when a coarse search or a pin-point search should be conducted, when the stage of a multistage amplifier should be changed, or when the rescue device needs to be reoriented to obtain maximum signal strength. Preferably, the signal processing system also displays the signal strength as a bar graph and displays an estimated distance to the buried transmitter.

A resistive level-shifting biasing network is used with a capacitor in parallel to couple FET-based amplifier stages from DC to several GHz in a multi-stage amplifier. The output of the first amplifier stage is connected to the input of the second amplifier stage without a blocking capacitor or level-shifting diodes, allowing a portion of the drain current for the first amplifier stage to be supplied from the second amplifier stage. In a particular embodiment, a distributed amplifier achieved over 20 dB gain from DC to about 80 GHz using three traveling wave amplifier chips.

A compensation circuit is provided for an amplifier including at least first and second amplifier stage. The circuit includes a first capacitance including one end that communicates with an input of the first amplifier stage. An amplifier includes a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance includes a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of the second amplifier stage. A first impedence includes one end that communicates with the input of the first amplifier stage and an opposite end that communicates with an output of the second amplifier stage.

The present invention provides a power amplifier module featuring that: its output power characteristic smoothly changes as the input control voltage changes; and its control sensitivity is stable over a wide dynamic range. By same means, idling current for gain setting is supplied to a single amplifier element or all of multiple stages of amplifier elements of the power amplifier module. By making this idling current behave so as to exponentially change, relative to input control voltage, the invention enables output power control proportional to the input control voltage.

A method for correcting DC offsets in a multi-stage amplifier includes determining a DC offset imparted by a multi-stage amplifier to an input signal. The method further includes applying a correction voltage to a plurality of selected stages in the multi-stage amplifier. The total correction voltage applied substantially negates the DC offset imparted by the multi-stage amplifier.

The hybrid active combiner and circulators serves as a coupler and is a three port network that integrates a directional coupler topology with active devices placed in the coupling paths in order to synthesize a low-loss active combiner circuit or a circulator device with minimal insertion losses. The coupler can have multiple stage amplifiers with transconductance values set according the Pascal's triangle for improved performance, and can function as a low cost and low weight transceiver well suited for various communications systems.

A high power Doherty RF amplifier utilizes multi-stage amplifier modules for both the main amplifier and the peak amplifiers. In one embodiment of a two way two stage amplifier, the first stage of each amplifier module can include signal pre-distortion whereby the first stage compensates for distortion in both the first and second stages. The design is simple and results in a high efficiency amplifier with high gain. In one embodiment, a commercially available CREE PFM19030SM power module is used in both the main amplifier and the peak amplifier.

A Chirped pulse amplification (CPA) fiber laser system. The CPA fiber laser system includes a fiber mode-locking (ML) oscillator implemented as a cavity dumped ML oscillator including a cavity dumper for generating a seed laser at a reduced repetition rate to project to a pulse stretcher for stretching a pulse width of the laser. The CPA fiber laser system further includes a multistage amplifier chain for generating an amplified laser to project to a compressor for compressing the amplified laser. The multistage amplifier chain further includes a hybrid amplifier includes a solid-state amplifier to generate a laser of approximately 1˜10 mJ for a 10-100 KHz repetition rate.

A fiber Chirped Pulse Amplification (CPA) laser system includes a fiber mode-locking oscillator for generating a laser for projecting to a fiber stretcher for stretching a pulse width of the laser. The fiber CPA laser system further includes a multistage amplifier for amplifying the laser and a high-order dispersion compensating compressor for compensating high order dispersions and compressing the pulse width of the laser. The high-order dispersion compensating compressor further includes a pair of gratings coupled with a pair of prisms, a grating pair engraved on the surfaces of a pair of prisms, a chirped grating pair and a phase modulator consists of a grating and a deformable mirror, for generating a negative group velocity dispersion (GVD) and a negative third order dispersion (TOD) for the laser.

A fiber laser system includes a fiber mode-locking oscillator, a fiber stretcher, a multistage amplifier chain, a pulse picker, and a compressor wherein at least a device for performing a pulse shaping, a spectral shaping and a polarization shaping and a combination thereof is implemented in the fiber mode-locking oscillator, the fiber stretcher, the multistage amplifier chain, the pulse picker, and the compressor for managing and reducing nonlinear effects in the fiber laser system. The combinations of pulse shaping, spectral shaping and polarization shaping in different stages of the fiber laser system enables the fiber laser system to generate a short pulse of <200 fs and a high energy laser in a range between 1 uJ to over mJ and an average power from 1 W to 100 W.

The invention discloses a circuit structure which utilizes an adjustable inductor and improves linearity of a power amplifier as well as a method. The circuit structure contains an on-chip transformercoupling input network, a transistor amplifier circuit, an output network, a control and bias generating circuit and an envelope detection circuit; the transistor amplifier circuit is respectively connected with the on-chip transformer coupling input network and the output network; the transistor amplifier circuit is provided with a capacitor-inductor parallel resonance loop as well as a capacitor and the adjustable inductor connected in parallel in the capacitor-inductor parallel resonance loop; and the envelope detection circuit is connected with the control and bias generating circuit, detects an envelope signal of a radio frequency signal of the input network or output network and generates the required bias signal and a control signal for the adjustable inductor. The circuit structure disclosed by the invention realizes dynamic and adjustable low-resistance bias loop by adopting a parallel adjustable LC loop way, AM-AM nonlinearity is improved, and the adjustable inductor eliminates AM-PM nonlinearity; and the circuit structure can be conveniently used in an inter-stage matching and impedance transformer network of a multistage amplifier, and cascade connection of a multistage radio frequency power amplifier can be realized conveniently.

An optical amplifier control circuit and method controls transients and avoids the problems associated with measuring gain. The input power level is detected and amplified by a transient control setting to provide a desired gain value against which is compared the output power level. This transient control error may be used in conjunction with a constant power error and / or a constant current error such that the lowest of the error values is used to drive the pump laser. Current and power feedback signals and settings are used to derive the error values. Multiple pump lasers per stage may also be controlled and a multi-stage amp having a cascaded structure may be realized using the inventive techniques.

A multi-stage Doherty power amplifier (“PA”) circuit which achieves superior efficiency over broadband range of frequencies is disclosed. Conventional multi-stage amplifiers may offer potential for efficiency enhancement but may suffer from cost penalties and severe bandwidth limitation in practice. Embodiments may employ a driver in the peaking arm which is biased in class C which may alleviate such limitations. The amplifier topology and associated circuitry described in embodiments may achieve high efficiency, smooth PA gain, and enhanced phase characteristics over a 15% fractional bandwidth with reduced costs.

Method and system are disclosed for providing an improved linearity Gilbert mixer. The Gilbert mixer of the present invention includes a conventional mixer core coupled to a high linearity, multistage amplifier. The multistage amplifier includes two or more transistor stages connected together in a global feedback arrangement. The global feedback provides a greater loop gain for the amplifier than the local feedback arrangement, thereby increasing the linearity of the amplifier. In addition, having more than one transistor stage in the amplifier serves to increase the isolation of the RF input signal from the LO input signal. Furthermore, by providing parallel output stages in the multistage amplifier, several mixer cores may be driven from the same source while sharing the feedback mechanism.

The invention provides a cardiac mapping signal analyzing and processing device and method, in particular to a device and method for analyzing the rhythm state of cardiac mapping signals. The device of the invention comprises a mapping electrode, a multistage amplifier, a data acquisition card, an acquisition module, a signal analyzing and processing unit and an output device. The method of the invention is based on the autocorrelation function and is characterized in that the time interval between the maximum peak and the second submaximum peak in the autocorrelation function sequence is used to estimate the main rhythm activation time interval of the signal, and the amplitude value of the submaximum peak is used as an index for measuring the regularity of the signal. The method of the invention can be used for the site analysis of the electrical activity of the heart in animal experiments and can also be used to assist the clinical diagnosis. As the system adopts the integrated acquisition and analysis structure and the method of the device is simple and effective, the device is characterized by wide application range and high real-time.

The invention relates to a large-bandwidth continuous-time common-mode feedback circuit and a design method thereof. The method comprises the following steps of: designing an ideal common-mode signal; detecting the common-mode value of an operational amplification output signal through a common-mode detection circuit; comparing the detected common-mode value of the operational amplification output signal with that of the ideal common-mode signal; after amplifying an error signal through the common-mode feedback circuit, outputting two common-mode feedback control signals fed back to the drain electrode of a biasing tube of an operational amplification biasing circuit so that the whole common-mode feedback circuit forms a single-stage amplifier to ensure that the common-mode feedback circuit has enough phase margin; and finally stabilizing the operational-amplified output common-mode point on the ideal common-mode value according to the negative feedback function of common-mode feedback. The invention overcomes the defects that the traditional continuous-time common-mode feedback circuit is a multi-stage amplifier and has poor stability, and ensures that the common-mode feedback circuit is a one-stage common-source cathode-input amplifier through adjusting the feedback point of the common-mode feedback; and the common-mode feedback circuit has favorable stability and is suitable for large-bandwidth ultrahigh-speed full-differential analog circuits.

The invention provides a symmetrical coupling wave-guided wave power synthesis amplifier, which comprises an input waveguide, an output waveguide, multi-stage coupling structures connected with the input waveguide and the output waveguide respectively, and multi-stage amplifiers correspondingly connected with the multi-stage coupling structures one by one, wherein the multi-stage coupling structures are vertically arranged in a traveling-wave direction of the input waveguide and the output waveguide, and each stage of the coupling structure is provided with a plurality of coupling units; a matching element is arranged at each stage of coupling structure except for the final stage of the coupling structure; and the micro-wave power input from the input waveguide is orderly fed into the plurality of coupling units in the multi-stage coupling structures in certain proportion. The power synthesis amplifier can provide the high-power output of high-end and millimeter wave bands of the microwave, meet the requirements of various communication and electronic systems, and solve the problems that the conventional power synthesis amplifier has less synthesis approach, narrower bandwidth andthe like at high-end or millimeter wave bands of the microwave.

This invention provides a multi-stage amplifier incorporating DC offset cancellation. The amplifier has a plurality of series-connected gain stages each of which comprises a differential amplifier unit generating a pair of differential outputs from a pair of differential inputs. In particular, a trailing stage in the plurality of gain stages comprises a digital DC offset cancellation module configured to compensate for a DC offset of the trailing stage's differential amplifier unit. The digital DC offset cancellation module comprises a comparator coupled to the pair of differential outputs of the trailing stage's differential amplifier unit for receiving such differential outputs as inputs for the comparator. Preferably, the comparator has an inherent DC offset that is substantially small. It is preferable that a non-trailing stage of the amplifier comprises an analog DC offset cancellation module for compensating for a DC offset of the non-trailing stage.

A differential amplifier circuit includes: a first field-effect transistor being operable base on a non-inverted input; a first load circuit which is connected to the drain of the first field-effect transistor; a first current control circuit which is connected to the source of the first field-effect transistor; a second field-effect transistor being operable base on an inverted input; a second load circuit which is connected to the drain of the second field-effect transistor; a second current control circuit which is connected to the source of the second field-effect transistor; and a gain compensation circuit which is connected between the source of the first field-effect transistor and the source of the second field-effect transistor, thereby attaining a high-speed differential amplifier circuit with low jitters.

The hybrid active combiner and circulators serves as a coupler and is a three port network that integrates a directional coupler topology with active devices placed in the coupling paths in order to synthesize a low-loss active combiner circuit or a circulator device with minimal insertion losses. The coupler can have multiple stage amplifiers with transconductance values set according the Pascal's triangle for improved performance, and can function as a low cost and low weight transceiver well suited for various communications systems.

A multi-stage amplifier includes first and second amplifier stages, and first and second capacitors. The first amplifier stage includes a input line having a first input end and a second input end; an input terminal block connected to the second input end; an amplifier circuit amplifying a first signal input to the first input end; an output line having a first output end where the first signal amplified is output, and a second output end; and an output terminal block connected to the second output end. The second amplifier stage includes components similar to that of the first amplifier stage. The first capacitor is connected between the first output end of the first amplifier stage and the first input end of the second amplifier stage. The second capacitor is connected to any one of the input and output terminal blocks of the first and second amplifier stages.