132results about "Amplifiers wit coupling networks" patented technology

An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

A Doherty power amplifier (PA) includes a main amplifier, an auxiliary amplifier, a first inductor coupled between an output of the main amplifier and a first node, a second inductor coupled between an output of the auxiliary amplifier and the first node, and a third inductor coupled between a supply rail and the first node. The Doherty PA also includes a first capacitor coupled between the output of the main amplifier and a ground, a second capacitor coupled between the output of the auxiliary amplifier and the ground, and an impedance matching circuit coupled between the output of the auxiliary amplifier and an output of the Doherty PA.

A load modulation amplifier is disclosed having a first amplifier and a second amplifier. An input quadrature coupler and an output quadrature coupler are coupled between the first amplifier and the second amplifier. A splitter has a first splitter output, a splitter input coupled to a signal input, and a second splitter output coupled to a second port of the input quadrature coupler, and a variable attenuator is coupled between the first splitter output and a first port of the input quadrature coupler. An attenuation controller has a controller output that is coupled to an attenuation control input of the variable attenuator, wherein the attenuation controller autonomously generates a control signal in response to a power sample signal in proportion to a radio frequency signal received at the radio frequency signal input.

A Differential Input, Single-ended Output Quadrature Hybrid Coupler (DISO-QHC) is based on baluns, one or two phase shifters, and a Wilkinson combiner. The DISO-QHC is configured to receive two differential, quadrature RF signals from differential PAs and output a combined, single-ended RF signal to drive an antenna element or subarray. Impedance matching transformers configured as baluns perform the differential-to-single-ended conversion and PA output impedance matching, without any requirement on coupling factor. One or two phase shifting circuits align the single-ended, quadrature RF signals in phase. A Wilkinson combiner circuit combines the power of the outputs of the phase shifting circuits. Area and losses are reduced by combining components from the phase shifting circuits with the baluns, and with the Wilkinson combiner circuit (which is implemented with lumped-reactance components rather than transmission lines). The DISO-QHC does not have a specific isolation port, but the isolation resistor within the Wilkinson combiner dissipates the differential and reflected signal from the PAs resulting from the incoming wave reflected from the antenna. The DISO-QHC is compatible with a LMBA functionality. By injecting a current at the center point of the isolation resistor in the Wilkinson combiner, the impedance at PA ports can be modulated.

A full duplex carrier aggregation, RF, wireless transceiver (100) is disclosed. The RF wireless transceiver (100) comprises: a single transmit and receive antenna (110) for: performing an RF transmit based on a transmit signal and generating a receive signal based on an RF receive; the invention relates to a power amplifier (100) comprising a plurality of cascaded quadrature balanced power amplifier (QBPA) modules (120a to n), in which each QBPA module (120a to n) comprises a transmit signal port (121a, b), an antenna port (122a, b), a receive signal port (123a, b), and a cancel signal port (124a, b), and a plurality of cascaded quadrature balanced power amplifier (QBPA) modules (120a to n), in which each QBPA module (120a to n) comprises a transmit signal port (121a, b), an antenna port (122a, b), a receive signal port (123a, b), and a cancel signal port (124a, b). The antenna port (121a) of the first QBPA module (120a) is connected with the antenna (110); and the antenna port (121b) of the second QBPA module (120b) is connected with the signal receiving port of the first QBPA module (120a). Each QBPA module (120a to n) is configured to: receive a transmit input signal at the transmit signal port (121a, b); receiving a receive signal at the antenna port (122a, b); receiving a cancellation input signal at the cancellation signal port (124a, b); generating a transmit signal based on the transmit input signal and outputting the transmit signal through the antenna port (122a, b); a cancellation signal is generated based on the cancellation input signal, and the cancellation signal and the reception signal are output at the reception signal port (123a, b).

An amplifier includes a signal input terminal for inputting an input signal; a voltage input terminal for inputting a power supply voltage; an amplification circuit for generating an amplified input signal based on the input signal, wherein the amplified input signal has a fundamental frequency, a first harmonic, and a second harmonic, wherein the first harmonic is the second harmonic of the fundamental frequency, and the second harmonic is the third harmonic of the fundamental frequency; a harmonic filter circuit coupled between the voltage input terminal and the amplification circuit for filtering the first harmonic and the second harmonic; and a signal output terminal coupled to the harmonic filter circuit for outputting an output signal based on the amplified input signal.

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate, and a class-F amplifier (500) according to an embodiment of the present disclosure may comprise: an input matching network (IMN) (510) including an input harmonic tuning network (511) and an input fundamental matching network (512); a power amplifier (PA) (520) electrically connected to the input matching network (510); and a class-F output matching network (F-OMN) (530) electrically connected to the power amplifier (520).

Systems, devices, and methods are described to provide an improved current mirror operational transconductance amplifier (OTA). Improved OTAs may include an input circuit arranged to receive a differential voltage input, a load circuit arranged to measure a positive branch current and negative branch current from the input circuit, a bias circuit arranged to determine a bias voltage based on the negative branch current, a folded current branch circuit arranged to generate an adaptive bias current and a pass transistor configured to adjust an amount of the adaptive bias current based on the bias voltage, and a push-pull output circuit configured to sink current based on the adjusted adaptive bias current. The folded current branch circuit may generate the adaptive bias current based on the measured negative branch current. The output circuit may source current based on the measured positive branch current. Advantageously, most transistors may be of minimum size.

Embodiments of the present application relate to an amplifying device and a transmitter. An amplifying device and a transmitter capable of compensating for a parasitic component of a circuit element without complicating a circuit structure are provided. The amplifying device includes a first amplifier that performs an amplifying operation on a signal; N-1 second amplifiers that perform an amplifying operation on the signal in sequence according to an amplitude of the signal in a case where the first amplifier performs the amplifying operation; N input networks connected to an input terminal that inputs the signal; N output networks connected between an output node of the first amplifier and a load connection node and connected between output nodes of the N-1 second amplifiers and the load connection node; and a first bias network that supplies a direct current bias voltage to at least one of the N output networks, an electrical length of the first bias network being less than 90 degrees.

Described is a noise-cancellation amplifier, comprising a first inductor system with a first inductor (L1) and a second inductor (L2); a second inductor system with a third inductor (L3) and a fourth inductor (L4); a first transistor (T1) being coupled with the third inductor (L3); a second transistor (T2) being coupled with the fourth inductor (L4); and a third inductor system with a fifth inductor (L5) and a sixth inductor (L6), the fifth inductor (L5) being coupled with a gate of the first transistor (T1) and the sixth inductor (L6) being coupled with a gate of the second transistor (T2); wherein the first inductor system is inductively coupled with the second inductor system and the second inductor system is inductively coupled with the third inductor system. In this way, a noise cancellation effect of the noise cancellation amplifier may be improved.

A splitter / combiner having a first port, a second port, and a third port includes a first transmission line coupled between the first port and the second port, a second transmission line coupled between the first port and the third port, a resistor coupled between the second port and the third port, and first and second capacitors each having a first terminal and a second terminal, the first terminal of the first capacitor coupled to the second port, the first terminal of the second capacitor coupled to the third port, the second terminal of each of the first and second capacitors coupled to a common node. At least one of the first capacitor, second capacitor, first transmission line, and second transmission line is adjustable during operation for varying the electrical properties of the splitter / combiner.

Certain aspects of the present disclosure relate to a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit (404) coupled between a first node and a second node; and an attenuation circuit (402) including a first variable resistive element (408) coupled between the first node and the reference potential node and a second variable resistive element (406) coupled between the second node and the reference potential node.

The invention provides a signal amplifier and a radar chip, and the signal amplifier comprises a programmable gain amplifier and a voltage stabilizing circuit. The alternating current input coil voltage stabilizing circuit is connected with a direct current path of the alternating current input coil programmable gain amplifier so as to supply power to the alternating current input coil programmable gain amplifier; the alternating current input coil programmable gain amplifier comprises a pre-stage amplification circuit and a post-stage amplification circuit; the alternating-current input coil pre-stage amplification circuit and the alternating-current input coil post-stage amplification circuit are coupled to form an alternating-current path, and a direct-current path of the alternating-current input coil pre-stage amplification circuit is connected with a direct-current path of the alternating-current input coil post-stage amplification circuit through a coil tap. The signal amplifier provided by the invention aims to form a programmable gain amplifier with both efficiency and power gain.

This invention provides a miniaturized, on-chip, internally matched power amplifier device with high harmonic suppression, belonging to the field of harmonic suppression amplifier technology. By introducing a cascaded design of multi-stage power amplifiers, combined with internal matching technology and the innovative application of high-dielectric ceramics and molybdenum-copper carriers, this invention successfully solves problems related to gain enhancement, harmonic suppression, and thermal management. This solution achieves miniaturization while simultaneously improving power density and gain, enhancing harmonic suppression performance to -45dBc, and optimizing efficiency. Furthermore, the combination of a molybdenum-copper carrier and a conformal heat dissipation module effectively reduces thermal resistance, extends device lifespan, and meets stringent high-temperature and high-frequency environmental requirements, improving system reliability and efficiency while reducing device size and weight.

Provided in embodiments is an electronic device for a Doherty power amplifier. The electronic device may comprise: a coupler for acquiring a radio frequency (RF) input signal; a power amplifier circuit including a carrier amplifier circuit and a peaking amplifier circuit; and a resistor selection circuit for providing isolation impedance from among a plurality of impedances to the coupler.

To suppress electromagnetic wave propagation while also reducing heat generation.SOLUTION: In a compound semiconductor amplifier having a compound semiconductor and an amplifier on an upper surface of a semi-insulating substrate, the semi-insulating substrate has a substrate thickness within a second range of wavelengths at a first frequency and a metal layer on an underside thereof having a sheet resistance value in a third range, the first frequency is a maximum frequency of frequencies used in the compound semiconductor amplifier, the second range is 1 / 12 to 1 / 2 the wavelength of the first frequency, and the third range is 3 to 1000 ohms.SELECTED DRAWING: Figure 1A

The invention provides a miniaturized slide-type internal matching power amplification device with high harmonic suppression, relates to the technical field of harmonic suppression amplifiers, and provides a miniaturized slide-type internal matching power amplification device with high harmonic suppression by introducing a cascade design of a multi-stage power amplifier and combining an internal matching technology and innovative application of high-dielectric ceramic and molybdenum copper slide. The problems of gain improvement, harmonic suppression, thermal management and the like are successfully solved. According to the scheme, the miniaturized design is realized, the power density and the gain are also improved, the harmonic suppression performance is improved to-45dBc, and the efficiency is also optimized. Meanwhile, the molybdenum copper slide glass is combined with the conformal heat dissipation module, so that the thermal resistance can be effectively reduced, the service life of the device is prolonged, the strict high-temperature and high-frequency environment requirements are met, the reliability and the working efficiency of the system are improved, and the size and the weight of equipment are reduced.

The invention relates to a high-frequency power coupler (1) for coupling a plurality of HF input signals in order to form an HF output signal for outputting HF power to an industrial process assembly (100), preferably a plasma process assembly, gas laser excitation, or heating assembly, the HF power coupler having: a. a plurality of HF inputs (11, 12, 13, 14, 15), b. an HF output (7), c. a coupling unit (19), d. an impedance matching line (20) which extends from the coupling unit (19) to the HF output (7) and has a length which is designed to bring about an impedance matching function between the output of the coupling unit and the HF output, and e. an upper mounting plate (23), a middle mounting plate (25), and a lower mounting plate (27), the middle mounting plate (25) being provided between the upper and the lower mounting plate, wherein f. the impedance matching line (20) is provided between the upper and the middle mounting plate and between the lower and the middle mounting plate.

A radio frequency circuit includes a transmit power amplifier, a differential transmit signal path having first and second paths, and first and second baluns. The first balun can be configured to convert a single ended transmit signal into a differential transmit signal, and the second balun can be configured to convert the differential transmit signal back to a single ended transmit signal. The circuit can also include a pair of transmit filters between the first and second baluns and including a first transmit filter connected in the first path and a second transmit filter connected in the second path. The second balun cancels harmonic noise generated by the pair of transmit filters.

The invention provides an operational amplifier with a built-in capacitance multiplier. The operational amplifier comprises an input transistor, a current mirror circuit and a capacitor. The input transistor generates an input current according to an input signal, and the current mirror circuit generates a current mirror output current at a current output terminal of the current mirror circuit according to a current mirror input current corresponding to the input current received by a current input terminal of the current mirror circuit. Wherein the current output terminal is coupled to an amplifier output terminal of the operational amplifier. Furthermore, a first terminal of the capacitor is coupled to the amplifier output terminal, and a second terminal of the capacitor is coupled to the current input terminal, such that an equivalent capacitance value of the capacitor at the amplifier output terminal is multiplied by the current mirror circuit.

Described is a noise-cancellation amplifier (200), comprising a first inductor system with a first inductor (L1) and a second inductor (L2); a second inductor system with a third inductor (L3) and a fourth inductor (L4); a first transistor (T1) being coupled with the third inductor (L3); a second transistor (T2) being coupled with the fourth inductor (L4); and a third inductor system with a fifth inductor (L5) and a sixth inductor (L6), the fifth inductor (L5) being coupled with a gate of the first transistor (T1) and the sixth inductor (L6) being coupled with a gate of the second transistor (T2); wherein the first inductor system is inductively coupled with the second inductor system and the second inductor system is inductively coupled with the third inductor system. In this way, a noise cancellation effect of the noise cancellation amplifier (200) may be improved.

This invention provides a balanced superconducting quantum interference device (SQUID) microwave amplifier and its fabrication method. The balanced SQUID microwave amplifier includes a first 3dB orthogonal directional coupler, a first impedance matching network, a second impedance matching network, a first superconducting quantum interference device (SQUID), a second superconducting quantum interference device (SQUID), a third impedance matching network, a fourth impedance matching network, and a second 3dB orthogonal directional coupler. The entire circuit of the balanced SQUID microwave amplifier of this invention is SQUID-symmetric. Compared to a single-channel SQUID microwave amplifier circuit, the balanced SQUID microwave amplifier not only significantly improves input-output matching performance and expands the device's operating bandwidth, making cascading easier, but also improves amplifier saturation power and stability. The balanced SQUID microwave amplifier is fabricated using planar micro / nano fabrication technology, which is compatible with most existing superconducting device fabrication processes, and can greatly improve the integration of related cryogenic detection systems.

Provided in the present application are a chip and an electronic device. The chip comprises: at least two power amplification paths, each of the power amplification paths comprising a signal input terminal, a power amplification module, a boost module and a signal output terminal, wherein, in each power amplification path, the signal input terminal is connected to a first input terminal of the power amplification module, the signal output terminal is connected to an output terminal of the power amplification module, an output terminal of the boost module is connected to a second input terminal of the power amplification module, and the boost module is used for supplying power to the power amplification module; and a system control module, a control terminal of the system control module being connected to a control terminal of the power amplification module of each power amplification path, and being used for controlling the power amplification module to amplify an input signal.

A power amplifying circuit includes a splitter connected to an input terminal, a combiner connected to an output terminal, a carrier amplifier group, a peaking amplifier group, a phase shifter, and a bias control circuit. The splitter splits an input signal from the input terminal for two paths. The carrier amplifier group is connected to one of the two paths of the splitter. The phase shifter is connected between the carrier amplifier group and the combiner. The peaking amplifier group is connected between another of the two paths of the splitter and the combiner. The bias control circuit supplies bias signals to each amplifier group. At least one of the amplifier groups includes a plurality of amplifiers. The control circuit changes a quantity of amplifiers to use in each amplifier group by adjusting a level of the bias signal being supplied to each amplifier.

An amplifier device includes a first input terminal, a second input terminal, a first transistor having a first control electrode and first and second current-carrying electrodes, wherein the first control electrode is radio frequency (RF) coupled to the first input terminal and DC-coupled to a first bias network electrically coupled to the first control electrode, wherein the first bias network is configured to apply a first direct current (DC) bias to the first control electrode and is RF-isolated from the first control electrode. The amplifier device further includes a second transistor that includes a second control electrode that is RF coupled to the second input terminal and a second bias network electrically coupled to the second transistor, wherein the second bias network is configured to apply a second DC bias to the second transistor and is RF-isolated from the second transistor.

A power amplifier includes a balanced type amplifier and a control amplifier. The balanced type amplifier includes a first amplifier and a second amplifier and is configured to amplify an input power. The control amplifier is configured to form a load modulated balanced amplifier together with the balanced type amplifier and output a control signal including a fundamental wave component or a harmonic component of the input power to each of the first amplifier and the second amplifier. The control amplifier is disposed between the first amplifier and the second amplifier.

A baseband amplifier includes: a distributed amplifier (10); an RF amplifier (11) that has a higher frequency transmission characteristic than the distributed amplifier (10); a demultiplexer (12) that outputs, to the distributed amplifier (10), a signal that includes at least a signal component of equal to or less than a high-frequency-side cutoff frequency of the distributed amplifier (10) in an input signal and outputs, to the RF amplifier (11), a signal that includes at least a signal component of equal to or greater than a low-frequency-side cutoff frequency of the RF amplifier (11) in the input signal; and a multiplexer (13) that multiplexes a signal amplified by the distributed amplifier (10) and a signal amplified by the RF amplifier (12).

Certain aspects of the present disclosure are directed towards a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit (404) coupled between a first node and a second node; and an attenuation circuit (402) including a first variable resistive element (408) coupled between the first node and a reference potential node, and a second variable resistive element (406) coupled between the second node and the reference potential node.