305results about "Amplifiers wit coupling networks" patented technology

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

The invention discloses a power synthesis amplifier which comprises two power amplification structures, and each power amplification structure is composed of an input matching circuit, a driving stage amplifier DA, an inter-stage matching circuit, a power stage amplifier PA and an output matching circuit. The input end of the power synthesis amplifier is connected by a T-junction power distribution network; the output end of the power synthesis amplifier is connected with the T-junction power synthesis network. The output power of the power amplifier is improved by adopting a two-path synthesis technology, specifically, the power amplifier can be expanded to multiple paths according to needs, and an output power synthesis network adopts a current type synthesis network, so that the amplitude-phase balance of two paths of output signals and the current processing capability of a circuit are ensured, and the output efficiency is improved; the output-stage matching circuit adopts a transformer with a high coupling coefficient to reduce signal loss, the input and inter-stage matching networks adopt a transformer with a low coupling coefficient to play a role in expanding bandwidth, and the multi-stage matching circuit can be widely applied to the technical field of mobile communication and radar detection.

Embodiment of the disclosure relate to power splitter comprising a first separation block comprising an input and a first output, the first separation block being configured to receive an input signal via the input and forward the input signal. The power splitter further comprises a second output and a first non-linear impedance connected to the first separation block. The first non-linear impedance is configured to reflect a reflection signal of the input signal to the first output and forward a forward signal of the input signal to the second output, wherein a power ratio between the reflection signal and the forward signal is based on a configuration of the first non-linear impedance.

A balanced radio frequency power amplifier, a front-end module, and a corresponding electronic device. The balanced radio frequency power amplifier comprises a driving-stage power unit (101, 201), an inter-stage power divider (102, 202), a main path power amplifier (103, 203), an auxiliary path power amplifier (104, 204), a first output matching network (A105, A205), a second output matching network (B106, B206), and an output power combiner (107, 207). A symmetrical balance design is used for the main path power amplifier (103, 203) and the auxiliary path power amplifier (104, 204), so that the impact of the change in the antenna voltage standing wave ratio (VSWR) on the transmission power and the transmitting efficiency is overcome to the greatest extent. Moreover, a 3 dB distributed orthogonal coupler is used for the inter-stage power divider (102, 202) and the output power combiner (107, 207).

A current sensing system for a magnetic resonance imaging (MRI) scanner operating at 1H and 31P resonant frequencies includes a dual-tuned RF coil with a network of up to two parallel quarter-wavelength transmission lines, each integrated with a PIN diode-coupled shunt capacitor. A multiple half-wavelength transmission line is employed with a corresponding pair of shunt capacitors and PIN diodes. A quarter-wavelength transmission line, coupled with a power amplifier through a matching network of shunt capacitors and PIN diodes, is also included. The configuration parameters are designed to tune the system to the fundamental frequency and its first odd multiple, correlating with the 1H resonant frequency, and to the 31P resonant frequency. The system accurately senses coil currents by detecting voltage variations in the matching network, thereby facilitating precise current measurements at the tuned resonant frequencies without the need for external sensors.

An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second transistor differential pair. The network can further include a matching network connected to the first port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

A Doherty power amplifier (PA) includes a main amplifier, an auxiliary amplifier, a first inductor coupled between an output of the main amplifier and a first node, a second inductor coupled between an output of the auxiliary amplifier and the first node, and a third inductor coupled between a supply rail and the first node. The Doherty PA also includes a first capacitor coupled between the output of the main amplifier and a ground, a second capacitor coupled between the output of the auxiliary amplifier and the ground, and an impedance matching circuit coupled between the output of the auxiliary amplifier and an output of the Doherty PA.

A hybrid coupler has a first port, a second port, a third port, and a fourth port to which a load is connected. An input signal distributor distributes a first input signal that is a radio frequency signal into a second input signal and a third input signal. The second input signal is inputted to a balanced amplifier. The balanced amplifier outputs two amplified radio frequency signals with a phase difference of 90° from each other from two output ends, one of which is coupled to the first port and another one of which is coupled to the second port. The control amplifier amplifies the third input signal and outputs the amplified third input signal from an output end. The output end of the control amplifier is coupled to the third port without any circuit component affecting impedance matching disposed in between.

A power amplifier arrangement (100) for amplifying an input signal (Pin) to produce an output signal (Pout) is disclosed. The amplifier arrangement (100) comprise an input port (IN) for receiving the input signal; an output transmission line (110) having a first terminal (111) and a second terminal (112); an output port (OUT) coupled to the second terminal (112) of the output transmission line (110) for providing the output signal; and a plurality N of amplifying devices (121, 122, . . . 12N) distributed along the output transmission line (110). The power amplifier arrangement (100) is configured such that the plurality N of amplifying devices are active sequentially for amplifying the input signal with increasing amplitude of the input signal.

A capacitive load, an inductive load, or a transmission line coupled to an output of a closed-loop amplifier circuit can cause undesirable oscillations in a feedback signal of the amplifier circuit. The oscillations in the feedback signal can cause the amplifier circuit to exhibit instability and unpredictable behavior. Techniques are described that allow an amplifier circuit to provide a stable response while driving a capacitive load.

A load modulation amplifier is disclosed having a first amplifier and a second amplifier. An input quadrature coupler and an output quadrature coupler are coupled between the first amplifier and the second amplifier. A splitter has a first splitter output, a splitter input coupled to a signal input, and a second splitter output coupled to a second port of the input quadrature coupler, and a variable attenuator is coupled between the first splitter output and a first port of the input quadrature coupler. An attenuation controller has a controller output that is coupled to an attenuation control input of the variable attenuator, wherein the attenuation controller autonomously generates a control signal in response to a power sample signal in proportion to a radio frequency signal received at the radio frequency signal input.

A method includes providing a first power from an output terminal of a balanced amplifier to a discharge chamber. The balanced amplifier includes two amplifier paths, each of which supplies a signal to a coupler. The coupler is configured to combine the signals as a function of their phase relationship and supply a power as the first power to the output terminal and / or as a second power to an isolation terminal. The method further includes setting a first phase relationship between the signals for a predefined time in order to ignite the plasma, and setting a second phase relationship in order to maintain the plasma. Under the second phase relationship, substantially an entirety of the power is supplied to the output terminal. Under the first phase relationship, a third power reflected from the discharge chamber is reflected back to the discharge chamber in a proportion large enough for the ignition.

A Differential Input, Single-ended Output Quadrature Hybrid Coupler (DISO-QHC) is based on baluns, one or two phase shifters, and a Wilkinson combiner. The DISO-QHC is configured to receive two differential, quadrature RF signals from differential PAs and output a combined, single-ended RF signal to drive an antenna element or subarray. Impedance matching transformers configured as baluns perform the differential-to-single-ended conversion and PA output impedance matching, without any requirement on coupling factor. One or two phase shifting circuits align the single-ended, quadrature RF signals in phase. A Wilkinson combiner circuit combines the power of the outputs of the phase shifting circuits. Area and losses are reduced by combining components from the phase shifting circuits with the baluns, and with the Wilkinson combiner circuit (which is implemented with lumped-reactance components rather than transmission lines). The DISO-QHC does not have a specific isolation port, but the isolation resistor within the Wilkinson combiner dissipates the differential and reflected signal from the PAs resulting from the incoming wave reflected from the antenna. The DISO-QHC is compatible with a LMBA functionality. By injecting a current at the center point of the isolation resistor in the Wilkinson combiner, the impedance at PA ports can be modulated.

The invention provides a radio frequency power amplification circuit realized based on a low-voltage CMOS (Complementary Metal Oxide Semiconductor) process, which enables a low-voltage CMOS device not to be limited by the application of a high-power radio frequency power amplifier, can avoid the breakdown risk and is low in cost. Comprising a signal amplification output module and an anti-breakdown module. The signal amplification output module is connected with the signal input end RFIN and the signal output end RFOUT and is used for performing power amplification on a radio frequency signal input by the signal input end RFIN and outputting the radio frequency signal through the signal output end RFOUT; the signal amplification output module comprises MOS (Metal Oxide Semiconductor) tubes M1 and M2, and a cascode structure is formed through the MOS tubes M1 and M2; the signal input end RFIN is connected with the grid electrode of the MOS tube M2, and the signal output end RFOUT is connected with the drain electrode end of the MOS tube M1; and the anti-breakdown module is connected with the level input end IN and the signal amplification output module, and is used for carrying out anti-breakdown protection on the signal amplification output module according to a level signal of the level input end IN.

A full duplex carrier aggregation, RF, wireless transceiver (100) is disclosed. The RF wireless transceiver (100) comprises: a single transmit and receive antenna (110) for: performing an RF transmit based on a transmit signal and generating a receive signal based on an RF receive; the invention relates to a power amplifier (100) comprising a plurality of cascaded quadrature balanced power amplifier (QBPA) modules (120a to n), in which each QBPA module (120a to n) comprises a transmit signal port (121a, b), an antenna port (122a, b), a receive signal port (123a, b), and a cancel signal port (124a, b), and a plurality of cascaded quadrature balanced power amplifier (QBPA) modules (120a to n), in which each QBPA module (120a to n) comprises a transmit signal port (121a, b), an antenna port (122a, b), a receive signal port (123a, b), and a cancel signal port (124a, b). The antenna port (121a) of the first QBPA module (120a) is connected with the antenna (110); and the antenna port (121b) of the second QBPA module (120b) is connected with the signal receiving port of the first QBPA module (120a). Each QBPA module (120a to n) is configured to: receive a transmit input signal at the transmit signal port (121a, b); receiving a receive signal at the antenna port (122a, b); receiving a cancellation input signal at the cancellation signal port (124a, b); generating a transmit signal based on the transmit input signal and outputting the transmit signal through the antenna port (122a, b); a cancellation signal is generated based on the cancellation input signal, and the cancellation signal and the reception signal are output at the reception signal port (123a, b).

An antenna system is provided. The antenna system includes a modal antenna disposed on a circuit board. The modal antenna includes a driven element and a parasitic element. The modal antenna is capable of operating in multiple different modes. Each of the multiple modes has a different radiation pattern. The antenna system also includes a radio frequency amplifier circuit disposed on the circuit board. The radio frequency amplifier circuit is coupled between the driven element of the modal antenna and a transmission line.

The present disclosure provides a power amplifier system. The system includes: a differential power divider configured to perform power distribution on an input signal and output a plurality of sub-differential signals; a plurality of branch differential amplifying circuits, wherein each branch differential amplifying circuit of the plurality of branch differential amplifying circuits is configured to amplify a corresponding sub-differential signal; and a differential synthesizer connected with the plurality of branch differential amplifying circuits and configured to perform power synthesis on the plurality of sub-differential signals to obtain a synthesized differential signal; wherein an operating state of at least one of the plurality of branch differential amplifying circuits is different from that of the other branch differential amplifying circuits of the plurality of branch differential amplifying circuits.

Methods and apparatus are provided. In an example aspect, an amplifier protection circuit is provided. The amplifier protection circuit comprises an input for receiving a signal from a first amplifier, and an isolation circuit between the input and an output of the amplifier protection circuit. The isolation circuit is configured to sense a backward signal propagating from the output of the amplifier protection circuit towards the input to provide a sensed signal, and to provide at least one cancellation signal based on the sensed signal to at least partially cancel the backward signal.

A solid-state power amplifier architecture comprises a plurality of switched mode with gate driver circuit and digital input power amplifier modules, and a digital control circuit configured to drive the plurality of switched mode with digital input power amplifier modules with corresponding digital signals, whereby the digital control circuit is further configured for adjusting the phase of the digital signals relative to each other. The solid-state power amplifier architecture further comprises an RF or MW power combiner with load terminations that are equipped each with a corresponding directional coupler that is configured to sample the signal into the load terminations, and a feedback system implemented in the digital control circuit that uses the sample signals to adjust the phase of the digital signals to each other according to a method that maximises the efficiency of the power combination by minimising the signal into the load terminations by adjusting the phase of the digital signals into the power amplifier modules relative to each other.

Embodiments of circuits, apparatuses, and methods for envelope tracking are disclosed. In one example, a circuit for envelope tracking may include a digital predistorter that receives an input signal representing a signal to be transmitted. The circuit may also include a filtered envelope tracking generator that receives the input signal and provides one or more output signals. The one or more output signals may include a signal that is a filtered tracking envelope of the input signal. One of the one or more output signals may be provided to the digital predistorter. The circuit may also include an envelope tracker that receives the filtered tracking envelope and provides an envelope tracking input to a power amplifier.

Systems, circuits, and methods for a cross-coupled differential transistor amplifier. The cross-coupled transistor amplifier can be used in a multi-section amplifier, such as a 6-section differential distributed amplifier. Each cross coupled transistor includes a first transistor and a second transistor, wherein a drain of the first transistor is connected via at least one capacitor and at least one resistor to a gate of the second transistor, and a drain of the second transistor is connected via at least one additional capacitor and at least one additional resistor to a gate of the first transistor.

The present invention provides a semiconductor device. The semiconductor device includes a transistor element, multiple input wires, and multiple output wires. The transistor element has multiple input pads arranged along one side and multiple output pads arranged along another side opposite the one side. The multiple input wires are respectively connected to the input pads. The multiple output wires are respectively connected to the output pads and have a longer wire length than the multiple input wires. Adjacent input wires are arranged parallel to each other, while adjacent output wires are arranged non-parallel to each other.

An amplifier includes a signal input terminal for inputting an input signal; a voltage input terminal for inputting a power supply voltage; an amplification circuit for generating an amplified input signal based on the input signal, wherein the amplified input signal has a fundamental frequency, a first harmonic, and a second harmonic, wherein the first harmonic is the second harmonic of the fundamental frequency, and the second harmonic is the third harmonic of the fundamental frequency; a harmonic filter circuit coupled between the voltage input terminal and the amplification circuit for filtering the first harmonic and the second harmonic; and a signal output terminal coupled to the harmonic filter circuit for outputting an output signal based on the amplified input signal.

In the power amplifier device, broadband operation of the high-frequency power amplifier circuit is realized. The power amplifier device (100A) includes: a power amplifier circuit (1) for amplifying high-frequency input signals; a first impedance matching circuit (2) for impedance matching of the output signal of the power amplifier circuit (1); a second harmonic termination circuit (3) disposed on the output side of the first impedance matching circuit (2), which outputs a high-frequency signal from the input terminal as a high-frequency signal by reflecting at least a portion of the even and odd harmonics contained in the signal input from the first impedance matching circuit (2), and outputs a high-frequency signal containing the fundamental wave, the remaining even harmonics and the odd harmonics from the output terminal; and a filter (4) disposed after the second harmonic termination circuit (3) to attenuate at least a portion of the even and odd harmonics and output a high-frequency signal containing the fundamental wave, the remaining even harmonics and the odd harmonics.

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate, and a class-F amplifier (500) according to an embodiment of the present disclosure may comprise: an input matching network (IMN) (510) including an input harmonic tuning network (511) and an input fundamental matching network (512); a power amplifier (PA) (520) electrically connected to the input matching network (510); and a class-F output matching network (F-OMN) (530) electrically connected to the power amplifier (520).

A Doherty power amplifier includes a first amplifier with a first output capacitance, a second amplifier with a second output capacitance, a reconfigurable impedance inverter, and a variable output impedance transformer. The reconfigurable impedance inverter includes a combining node and first, second, and third variable networks. The first variable network and the first amplifier output capacitance establish a first amplifier effective output capacitance that is less than the first output capacitance. The second variable network provides a series inductance between the first amplifier output and the combining node. The third variable network and the second amplifier output capacitance establish a second amplifier effective output capacitance that is less than the second output capacitance. The output impedance transformer includes a fourth variable network that establishes a combining node impedance. The first, second, and third variable networks and the output impedance transformer may be reconfigured based on traffic loading conditions.

Systems, devices, and methods are described to provide an improved current mirror operational transconductance amplifier (OTA). Improved OTAs may include an input circuit arranged to receive a differential voltage input, a load circuit arranged to measure a positive branch current and negative branch current from the input circuit, a bias circuit arranged to determine a bias voltage based on the negative branch current, a folded current branch circuit arranged to generate an adaptive bias current and a pass transistor configured to adjust an amount of the adaptive bias current based on the bias voltage, and a push-pull output circuit configured to sink current based on the adjusted adaptive bias current. The folded current branch circuit may generate the adaptive bias current based on the measured negative branch current. The output circuit may source current based on the measured positive branch current. Advantageously, most transistors may be of minimum size.

Embodiments of the present application relate to an amplifying device and a transmitter. An amplifying device and a transmitter capable of compensating for a parasitic component of a circuit element without complicating a circuit structure are provided. The amplifying device includes a first amplifier that performs an amplifying operation on a signal; N-1 second amplifiers that perform an amplifying operation on the signal in sequence according to an amplitude of the signal in a case where the first amplifier performs the amplifying operation; N input networks connected to an input terminal that inputs the signal; N output networks connected between an output node of the first amplifier and a load connection node and connected between output nodes of the N-1 second amplifiers and the load connection node; and a first bias network that supplies a direct current bias voltage to at least one of the N output networks, an electrical length of the first bias network being less than 90 degrees.