Circuit arrangement (100, 200, 300) for converting a
digital signal into an
analog signal, with: a first digitally controllable generator (V1) to provide a first
digital signal; a second digitally controllable generator (D1, V2) to provide a second
digital signal; wherein a circuit node (K1, K2) of the circuit arrangement (100, 200, 300) is electrically coupled to an output terminal of the first digitally controllable generator by means of a first
coupling impedance (R1); and wherein the circuit node (K1, K2) is coupled to an output terminal of the second digitally controllable generator (D1, V2) by means of a second
coupling impedance (R2); wherein the circuit arrangement comprises a plurality of digitally controllable generators (V52, V53, V54, V55) which are each electrically coupled to the circuit node (K1, K2, K3) by means of a respective
coupling impedance (R52, R53, R54, R55), wherein the multiple digitally controllable generators (V52, V53, V54, V55) each provide a pulse-width modulated
signal, and wherein the respective digitally controllable generators (V52, V53, V54, V55) are configured such that the respective pulse-width modulated signals have a
clock shift relative to each other of 360 degrees divided by a number of the multitude of digitally controllable generators; and a filter circuit (C1, C32) coupled to the circuit node (K1, K2) to provide the
analog signal; wherein the first digitally controllable generator (V1) and the second digitally controllable generator (D1, V2) are coupled such that there is a fixed
phase relationship between the first digital
signal and the second digital
signal in order to achieve the lowest possible residual
ripple of the
analog signal with the circuit arrangement (100, 200, 300).