26results about "Pulse frequency/rate modulation" patented technology

A switching converter is presented. The switching converter has a high side power switch coupled to a low side power switch at a switching node, a driver and a timing circuit. The driver generates a drive signal having a on-time to drive the high side power switch. The timing circuit generates a control signal to adjust the on-time during a load transient period.

The invention provides a non-uniform double-pulse modulation method based on a TCM. The non-uniform double-pulse modulation method comprises the steps that 1, a non-uniform double-pulse period modulation model is constructed; 2, carrying out radar echo modulation analysis; 3, analyzing a pulse compression result; and step 4, regulation and control effect analysis based on a CFAR detector. According to the method, the key parameter of the time delay factor is innovatively introduced, the modulation flexibility and unpredictability are greatly improved through the collaborative design of three degrees of freedom, and the problems of insufficient flexibility and the like existing in a radar target feature regulation and control method are solved. Compared with a regulation and control method based on TCM uniform monopulse period modulation, the generated harmonic peak amplitude distribution is diversified, screening of regular signals by a radar CFAR detector is effectively avoided, and the number of effective harmonic peaks passing detection is remarkably increased. According to the invention, precise suppression or enhancement of specific-order harmonics can be realized, and a technical approach is provided for implementing flexible and dynamic radar target feature regulation and control.

The invention relates to the technical field of piezoelectric transformers, in particular to a radial vibration piezoelectric transformer with asymmetric protruding electrodes and a preparation method of the radial vibration piezoelectric transformer. A primary side and a secondary side of the piezoelectric transformer can be formed by alternately stacking piezoelectric ceramic materials with the same or two different dielectric constants, and no isolation piece or an isolation piece is arranged between the primary side and the secondary side; the intelligent temperature control layer is arranged on the outer layer of the transformer and comprises a thermosensitive phase change material; the self-adaptive frequency regulation circuit is connected with the input end of the transformer; and the insulation heat dissipation channel structure forms an annular insulation heat dissipation gap at the edge of the ceramic single sheet. Through reasonable matching of primary and secondary structure parameters and a load relation, the piezoelectric transformer has excellent characteristics of constant current output, constant power output, same phase or pi phase difference between input voltage and input current and the like, the efficiency of the piezoelectric transformer is improved to the greatest extent, the loss of the piezoelectric transformer is reduced, and the reliability of the piezoelectric transformer is improved.

The invention relates to the technical field of signal processing, and provides a multi-channel pulse low and medium frequency signal generation system, which comprises a signal generation unit used for generating a multi-channel pulse signal, a low frequency signal and a carrier signal; the multi-channel pulse signal modulation unit is used for modulating the multi-channel pulse signal to generate a multi-channel modulation pulse signal; the power control unit is used for performing power control on the low-frequency signal and the multi-channel modulation pulse signal to generate a target low-frequency signal and a multi-channel target pulse signal; and the low and medium frequency signal modulation unit is used for synthesizing the target low frequency signal, the multi-channel target pulse signal and a carrier signal to generate a multi-channel pulse low and medium frequency signal. According to the system, through multi-channel pulse signal modulation and power control, multi-channel pulse low and medium frequency signals are accurately generated, and the flexibility and adaptability of the signals are enhanced.

A circuit includes a switching converter, an oscillator, and a spread spectrum modulator (SSM). The oscillator has a modulation input and a clock output. The clock output is coupled to the switching converter. The oscillator is configured to generate a clock signal at the clock output having a frequency based on a modulation signal at the modulation input. The SSM has a modulation output coupled to the modulation input of the oscillator. The SSM is configured to generate the modulation signal at the modulation output while adjusting a rate of change of the modulation signal based on a magnitude of the modulation signal at a boundary of a modulation time period.

The embodiment of the invention provides a dynamic frequency modulation method, a dynamic frequency modulation device, electronic equipment and a storage medium, and is used for limiting the peak current of an inductor in a boost chopper circuit, and the method comprises the steps: obtaining the peak current of the inductor in the boost chopper circuit; and dynamically adjusting a clock frequency output by a clock generation circuit in the boost chopper circuit according to the peak current, so that the peak current is within a target current range. According to the dynamic frequency modulation method provided by the embodiment of the invention, the peak current of the inductor is located in the target current range while the small-size inductor is set by dynamically adjusting the clock frequency of the boost chopper circuit, so that the boost performance of the boost chopper circuit is not influenced while the space occupation of the boost chopper circuit is reduced; the circuit area and the cost are reduced while the same boosting performance is realized.

The invention relates to a system and method for controlling a switching converter operating at pulse frequency modulation. A control unit for controlling a converter having a PFM regulated switching operation is configured to generate a square wave control signal to control switching of at least one switching element of the converter, the square wave control signal having a switching period defining a first time interval and a second time interval, the first and second time intervals are associated with respective values of the control signal, where the control unit determines a constant duration of the first time interval and a minimum duration of the second time interval in order to determine a maximum operating frequency of the converter. The control unit implements a detection stage for detecting an abnormal current event as a function of a count of a predetermined number of temporally consecutive cycles of the control signal, during which the converter operates at a minimum duration of a second time interval, and thus at a maximum operating frequency.

The present disclosure relates to a circuit system for frequency multiplication and a signal generation circuit system, in which the circuit system includes: a first set of transistors of a first conductivity type including a first transistor and a second transistor connected in parallel; a second set of transistors of a second conductivity type including a third transistor and a fourth transistor connected in parallel, where the second conductivity type is different from the first conductivity type; wherein the first set of transistors and the second set of transistors are coupled between a first potential and a second potential different from the first potential; wherein a gate of the first transistor and a gate of the third transistor are connected and configured to receive an input signal; and wherein a gate of the second transistor and a gate of the fourth transistor are connected and configured to receive an inverted phase of the input signal.

A circuit includes a switching converter, an oscillator, and a spread spectrum modulator (SSM). The oscillator has a modulation input and a clock output. The clock output is coupled to the switching converter. The oscillator is designed to generate a clock signal at its clock output with a frequency based on a modulation signal at its modulation input. The SSM has a modulation output that is coupled to the oscillator's modulation input. The SSM is designed to generate the modulation signal at its modulation output while adjusting the rate of change of the modulation signal based on the magnitude of the modulation signal at a boundary of a modulation period.

The invention relates to a spread spectrum modulator. A circuit (400) includes a switching converter (110), an oscillator (130), and a spread spectrum modulator (SSM) (420). The oscillator (130) has a modulated input and a clock output. The clock output is coupled to the switching converter (110). The oscillator (130) is configured to generate a clock signal at the clock output having a frequency based on a modulated signal at the modulation input. The SSM (420) has a modulated output coupled to the modulated input of the oscillator. The SSM (420) is configured to generate the modulated signal at the modulation output while adjusting a rate of change of the modulated signal based on a magnitude of the modulated signal at a boundary of a modulation time period.

A switching converter controller includes: mode control logic; and a pulse-frequency modulation (PFM) timer circuit coupled to the mode control logic. The PFM timer circuit includes: a first terminal; a second terminal; a digital-to-analog converter (DAC); a current source; a capacitor; and a comparator. A first terminal of the DAC is coupled to the first terminal of the PFM timer circuit. The current source has a first terminal, a second terminal, and a third terminal. The second terminal of the current source is coupled to a second terminal of the DAC. A first terminal of the capacitor is coupled to the first terminal of the current source. The comparator has first, second, and third terminals. The first terminal of the comparator is coupled to the first terminal of the capacitor. The third terminal of the comparator is coupled to the second terminal of the PFM timer circuit.

The invention provides an analog signal generation method and device, equipment and a storage medium. The method comprises the following steps: acquiring a frequency control word; generating a phase value of the frequency control word through a phase accumulator; based on the phase value, determining a first value according to a first lookup sub-table, and determining a plurality of second values according to a plurality of second lookup sub-tables; wherein the first lookup sub-table and all the second lookup sub-tables are obtained according to lookup tables of different waveforms; obtaining an amplitude value according to the first value and the second value; and generating an analog signal according to the amplitude value. According to the method provided by the invention, a plurality of amplitude values of the frequency control word can be simultaneously obtained through the first lookup sub-table and the second lookup sub-table, and the signal generation efficiency is improved.

A switching control circuit which controls a switching device included in a power source system which generates an output voltage from an AC input voltage, includes an input detection voltage acquisition unit which acquires an input detection voltage corresponding to the AC input voltage, a current detection voltage acquisition unit which acquires a current detection voltage generated in a current detection resistor which detects a current flowing through the switching device, a short circuit determination unit which determines, by comparing the current detection voltage with a predetermined short circuit threshold voltage, whether or not the current detection resistor is short circuited, and a driving unit which drives the switching device by a pulse width modulation method or a pulse frequency modulation method.

Circuit that features: a power conversion circuit containing an inductor (Lo) and designed to convert an input voltage (V) IN ) corresponding to at least one switching signal (S ON ) to convert into an output voltage (Vo); a first current sensing circuit (CS) configured to detect a current sensing signal (V CS ), which induces an inductance current (i L ) represents, to generate; a voltage sensing circuit (VS) designed to detect a voltage sensing signal (V VS ), which determines the output voltage (V O ) represents, to generate; a switching controller with an error amplifier (EA) designed to generate an error signal (V E ), which is the difference between a reference voltage (V REF ) and the voltage sensing signal (V VS ) represents, to generate; an oscillator circuit (11', 11'') designed to transmit the switching signal (S ON ) for pulse frequency modulation operation of the power conversion circuit as a sequence of pulses with a pulse repetition frequency (fsw) determined by the error signal (V E ) and the current sensing signal (V CS ) depends on generating; an overfrequency detector circuit (OFD) coupled to the oscillator circuit (11', 11'') and configured to detect when the pulse repetition frequency (fsw) exceeds a frequency threshold (f TH ) reaches or exceeds, wherein, in order to activate and deactivate current feedback, the first current detection circuit (CS) is configured to be activated or connected to the oscillator circuit (11', 11'') when the overfrequency detector circuit (OFD) indicates that the pulse repetition frequency (f SW ) the frequency threshold (f TH) has reached or exceeded, and otherwise to be deactivated or disconnected from the oscillator circuit (11', 11").

An apparatus is disclosed that includes a PWM ramp generator coupled between a switch node of a power converter and a first input of a comparator. The PWM ramp generator includes a first resistor and a first capacitor connected in series between the switch node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node. A PFM control circuit includes an error amplifier and a current zero-crossing detection comparator, where the error amplifier is coupled between a second input of the comparator and a reference node. The PFM control circuit is configured to generate a gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.

The application discloses a V-type frequency modulation signal generation method and system, comprising: obtaining a discrete model of the V-type frequency modulation signal, obtaining a frequency increment and a frequency initial parameter through a first-order difference relationship between a frequency and a phase of the discrete signal; taking the frequency increment, the frequency initial parameter and a constant term as positive frequency modulation digital control parameters, constructing a linear increasing sequence based on the frequency increment, obtaining an instantaneous frequency value at different moments by sequentially superimposing the frequency initial parameter, superimposing the constant term on the instantaneous frequency value at different moments to obtain a phase sequence of a positive frequency modulation slope; performing a negation processing on the positive frequency modulation digital control parameters to obtain a phase sequence of a negative frequency modulation slope; and converting the phase sequence into amplitude data according to a sine waveform to generate the V-type frequency modulation signal. The application can greatly reduce the operation amount of control parameters and the data transmission amount in the signal generation process by optimizing parameter configuration logic and simplifying operation, significantly improves the calculation efficiency and reduces the consumption of calculation resources.

The present disclosure provides an approach that determines a pulse frequency modulation (PFM) period of a buck regulator. The PFM period comprises a first charging stage and a first discharging stage, and wherein the buck regulator switches from the first discharging stage to the first charging stage based on comparing a feedback voltage to a low threshold voltage. The approach generates a pseudo random pulse at a pseudo random period, wherein the pseudo random period is independent from the low threshold voltage. Then, the approach initiates a transition from a second discharging stage to a second charging stage based on the pseudo random pulse.

The application discloses a frequency shift control circuit, which comprises an encoding condition output circuit (100) and a frequency shift track circuit (200); wherein the encoding condition output circuit (100) comprises a microcontroller (110), an encoding output relay group (112) and a frequency shift encoding sending box (150), the microcontroller (110) is used for controlling the encoding output relay group (112) to generate and output an encoding condition instruction to the frequency shift encoding sending box (150) according to a received frequency shift encoding instruction, and the frequency shift encoding sending box (150) is used for outputting a frequency shift input signal to the frequency shift track circuit (200) according to the encoding condition instruction; and the frequency shift track circuit (200) is used for outputting a frequency shift signal to a steel rail according to a received frequency shift control instruction and the frequency shift input signal. In the scheme, the frequency shift input signal is generated by the microcontroller and the relay group, so that the volume of the frequency shift control circuit is obviously reduced compared with a traditional frequency shift control circuit, and wiring workload and maintenance workload are smaller.

An isolation driver circuit for a pulse width modulation signal. The isolation driver circuit includes a rising edge detection circuit, a falling edge detection circuit, and a decoder. The rising edge detection circuit and the falling edge detection circuit respectively detect rising edges and falling edges of the input pulse width modulation signal, and respectively output corresponding rising edge detection signals and falling edge detection signals that are capacitively isolated from the input pulse width modulation signal. The decoder receives the rising edge detection signals and the falling edge detection signals, and outputs respective rising edges and falling edges of an output pulse width modulation signal that temporally align with the respective rising edges and falling edges of the input pulse width modulation signal. Thus, information stored in the pulse widths of the input pulse width modulation signal are preserved with high fidelity in the output pulse width modulation signal.

The invention discloses an EPR pulse wave generation system based on pre-distortion processing, and relates to the technical field of magnetic resonance. The pulse generation module is used for generating a frequency modulation pulse wave signal according to the fundamental wave signal and the frequency mixing signal; the pulse application module is used for acting the frequency modulation pulse wave signal on a to-be-detected sample to generate a to-be-detected signal; the time sequence calculation module is used for calculating distortion information of each frequency component of the frequency-modulated pulse wave signal in the pulse application module; determining a compensation time sequence of each frequency component in the frequency-modulated pulse wave signal based on the distortion information; and the pre-distortion processing module is used for adjusting the sending time sequence of each frequency component in the frequency mixing signal based on the determined compensation time sequence, and updating the frequency modulation pulse wave signal according to the adjusted frequency mixing signal so as to adjust the time domain fidelity of the frequency modulation pulse wave.

The disclosure relates to a circuit arrangement for frequency multiplication, wherein the circuit arrangement comprises: a first set of transistors of a first conductivity type, comprising a first and a second transistor connected in parallel; a second set of transistors of a second conductivity type, comprising a third and a fourth transistor connected in parallel, the second conductivity type being different from the first conductivity type; wherein the first set of transistors and the second set of transistors are coupled between a first potential and a second potential that is different from the first potential; wherein a gate of the first transistor and a gate of the third transistor are connected and configured to receive an input signal;and wherein a gate of the second transistor and a gate of the fourth transistor are connected and are designed to receive an inversion of the input signal.

Storage device (102, 202), comprising: one or more storage devices (110, 203); a controller (106, 230) coupled to one or more storage devices; and a measuring circuit (114, 214, 300) coupled to the controller, the measuring circuit comprising the following: a multitude of successive delay taps (306a - 306n); a plurality of flip-flop registers (302a - 302n), wherein each flip-flop register of the plurality of flip-flop registers has a first input (308) and a second input (310); a first input line (314) that is directly coupled to the first input of each flip-flop register of the plurality of flip-flop registers; a second input line (316) coupled to the second input of each flip-flop register of the plurality of flip-flop registers via successive delay taps of the plurality of successive delay taps, each successive delay tap having a constant delay; and a measurement signal (318) configured to measure a clock duty cycle to enable the measuring circuit; wherein the measuring circuit further comprises a variable delay circuit (322), wherein the second input line is coupled to the successive delay taps via the variable delay circuit; and where the same clock signal (312) is input into both the first input line and the second input line.

This invention relates to a switching control circuit and a power supply system. [Solution] The switching control circuit for controlling a switching element includes an input detection voltage acquisition unit that acquires an input detection voltage corresponding to an AC input voltage, a current detection voltage acquisition unit that acquires a current detection voltage generated in a current detection resistor that detects the current flowing through the switching element, a short-circuit determination unit that compares the current detection voltage with a predetermined short-circuit threshold voltage to determine whether or not the current detection resistor is short-circuited, and a drive unit that drives the switching element using a pulse width modulation method. When the short-circuit determination unit determines that the current detection resistor is short-circuited, the drive unit changes the duty cycle for controlling the switching element to a predetermined first duty cycle.

A circuit (100) includes a plurality of control logic circuits (108a-108n), each of the control logic circuits configured to provide respective pulses at different time periods. The circuit (100) further includes a timer circuit (116) configured to provide a timer signal to each of the control logic circuits (108a-108n) based on an output voltage, wherein the timer signal determines a frequency of the respective pulses. Furthermore, the circuit (100) includes a rotator circuit (128) configured to provide a plurality of rotator signals to the control logic circuits (108a-108n), respectively, wherein each control logic circuit is configured to determine a time period of the different time periods during which to generate the respective pulses based on the respective rotator signal.

The present application relates to the field of radio frequency pulse modulation technology, and provides a radio frequency pulse modulation signal generation circuit and a radio frequency pulse modulation device, wherein the circuit comprises: a control module; a push-pull module connected with the controlled end of the push-pull module; a switch modulation module connected with the push-pull module, the switch modulation module being connected with a radio frequency signal input end and a radio frequency signal output end; and an overshoot module connected with the push-pull module. The control module generates a basic pulse signal, without relying on external equipment to reduce the implementation cost, the push-pull module improves the edge change rate of the pulse signal, and the overshoot module generates a controlled overshoot current when the pulse edge changes, in a two-stage enhancement processing manner, to form a high-quality pulse signal, effectively improve the state switching speed of the switch modulation module, guarantee the quality of the pulse modulation signal, and at the same time, the two-stage enhancement processing can make the signal edge reach nanosecond-level rising and falling change, which is beneficial to realize super-high-speed radio frequency pulse modulation.

Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, comprising: a frequency filter configured to receive the input signal, wherein the frequency filter comprises an adjustable component configured to adjust a frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier comprises an adjustable current source configured to adjust a current consumption of the rectifier; a reference signal generator configured to generate a reference signal; a current-to-voltage converter configured to convert a current of the rectified signal into a rectified voltage and to convert a current of the reference signal into a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to generate a demodulated output signal.