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2313 results about "Signal frequency" patented technology

The test signal for frequency measurements is usually at a frequency of 1 MHz or higher, with 5 or 10 MHz being common. Frequency signals are usually sine waves, but can also be pulses or square waves.

Universal digital framer architecture for transport of client signals of any client payload and format type

ActiveUS20050286521A1Reduce the required sizeReduce capacityError preventionTransmission systemsClient-sideByte
Client signals to be transported in a transmission network, particularly an optical transmission network, may have different payload envelope rates and are digitally mapped on the client egress side into first transport frames (also referred to as iDTF frames, or intra-node or internal digital transport frames), at the client side for intra-transport within terminal network elements (NEs) and further digitally mapped into second transport frames (also referred to as DTFs or digital transport frames) for inter-transport across the network or a link which, through byte stuffing carried out in the first transport frames so that they always have the same frame size. As a result, the system of framers provides for a DTF format to always have a uniformly universal frame rate throughout the network supporting any client signal frequency, whether a standard client payload or a proprietary client payload, as long as its rate is below payload envelope rate of the client signal. At the client signal ingress side, the signal are digitally demapped from the second transport frames (DTF format) into the first transport frames where the stuff bytes are removed and accordingly processed at an intermediate node element before further transport, or digitally demapped from the first transport frames (iDTF format) to reproduce or reassemble the client signal or signals comprising the client payload at the client payload envelope rate for reception at the client's equipment. Among various features disclosed, two predominate features are (1) a single channel or network rate for transport of all signals between network elements (NEs) and end terminal network elements and (2) the digitally wrapping of different types of payloads into N client side or first frames using stuff bytes to render each client side frame size equal to a predetermined value. Then the stuffed first frames are wrapped into line side or second frames for transport over the network at the same high speed line rate for all digitally wrapped client signals. The client side framers may be, for example, running at the lowest signal rate encountered, to digitally wrap then into parallel N client signals or digitally wrap a client signal multi-sected into N parts, where these two different client signals have different payload rates.

Steered frequency phase locked loop

PCT No. PCT/AU95/00793 Sec. 371 Date Sep. 30, 1997 Sec. 102(e) Date Sep. 30, 1997 PCT Filed Nov. 28, 1995 PCT Pub. No. WO96/17435 PCT Pub. Date Jun. 6, 1996A Steered Frequency Phase Lock Loop (SFPLL) comprises a phase loop that functions like a normal phase locked loop (PLL) and locks to the input signal, and a frequency loop that uses a reference frequency to influence the phase loop and effectively confines the output frequency of the phase loop and the SFPLL to be in a range of frequencies close to the reference frequency. The reference frequency is chosen to be very close to the input signal frequency that it is desired the SFPLL lock to. The SFPLL comprises a phase detector (10), a frequency detector (22), first and second gain components (12, 24), first, second and third filter components (14, 18, 26), a summer (16) and a voltage controlled oscillator (VCP)(20). By a judicious choice of the gains in the phase and frequency loops the SFPLL can be designed so that the range of frequencies to which the SFPLL will lock can be confined to an arbitrarily small region around the reference frequency ( omega 'r). Applications of the SFPLL include demodulation in CW modulation systems and timing recovery from NRZ data. Three advantages of the SFPLL are that the output frequency is equal or close to the reference frequency when no input signal is present, and the range of frequencies to which the SFPLL can lock is confined to a region around the reference frequency, and the phase and frequency instabilities of the VCO can be reduced.

Method for processing sampling value of digitalization protection test control apparatus

The present invention relates to a sampling value processing method of integrative device based on a sampling value interface, which is used for protecting and monitoring a digital substation. The method is characterized in that the sampling value interface module of the integrative device is used for real-time judgment on the effectiveness and rationality of sampling values which are transmitted from an incorporating unit; the secondary Lagrange interpolation are calculated for a small quantity of broken or lost sampling values; a window function is used for designing a high-order FIR digital filter which is used for filtering the sampling values; the on-line parameters of the threshold and the filter are regulated in a self-adapting way according to the parameters of conventional data sets transmitted by the sampling values; the protection function is resampled by adopting a secondary Lagrange algorithm of fixed frequency according to the requirements of protecting and monitoring functions; the monitoring function is first processed by iterative computation of frequency; the real-time resampling frequency s regulated according to the signal frequency; the sampling values are resampled by adopting the secondary Lagrange algorithm according to the novel sampling frequency, thus the processing method not only satisfies the requirements of protection and application, but also improves the measurement accuracy.
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