36results about How to "Reduce static power consumption" patented technology

The invention provides a PQC and SM2 / 9 cooperative operation cryptographic chip and method based on an RISC-V architecture, and belongs to the technical field of cryptographic security. The chip comprises an RISC-V core and a configurable password collaborative operation unit, wherein the configurable password collaborative operation unit comprises a collaborative control state machine and a unified operation unit capable of being dynamically reconfigured. The method comprises the following steps: receiving and decoding a single cooperative operation instruction from an RISC-V core through a cooperative control state machine, and obtaining operation data feature information; the data length and the security level identification are extracted, and the optimal collaborative operation process is selected in a self-adaptive mode through comparison with a preset threshold value; and finally, dynamically configuring and scheduling a unified operation unit according to the selected process, and completing cooperative operation of the post-quantum cryptography algorithm and the SM2 / SM9 algorithm in an atomization mode. According to the method, deep fusion and intelligent scheduling of the two algorithms are realized on the hardware level, and the efficiency, the resource utilization rate and the safety of cooperative operation are improved.

The invention relates to the technical field of semiconductor devices, and discloses a wide bandgap power semiconductor device and a preparation method thereof. The method comprises: providing a substrate layer of a first conductivity type; forming a first doped region which is deep into the substrate layer and comprises a plurality of doped layers which are sequentially nested from outside to inside, wherein the doping concentrations of the plurality of doped layers are sequentially increased from outside to inside; forming a second doped region in the doped layer on the innermost side of the first doped region; forming an isolation layer on the first surface; forming a control electrode on the isolation layer; forming a first electrode on the first surface; a second electrode is formed on the second surface of the substrate layer. According to the invention, the first doped region which is located between the substrate layer and the second doped region and has the doping concentration gradually increased from outside to inside is formed through a mode of multiple times of ion implantation, so that transverse electric field constraint is constructed, transverse depletion of a channel region and a short channel effect under the condition of large voltage are inhibited, the channel width is reduced, and the performance of the device is improved. And the device performance and reliability are improved.

The invention discloses a volatile threshold switching device based on an atomic-scale geometric confinement layer and a preparation method thereof. The device comprises a substrate layer, a bottom electrode layer, a functional active layer, a geometric confinement layer and a top electrode layer which are stacked in sequence, the functional active layer is used for providing active metal ions to form conductive filaments; the functional active layer is made of a two-dimensional layered ferroelectric material; the geometric confinement layer is made of hexagonal boron nitride sheets, and the thickness range of the hexagonal boron nitride sheets is 1-5 hexagonal boron nitride atomic layers. According to the invention, the h-BN material with atomic-scale lattice defects is introduced as the geometric confinement layer, and the diameter of the conductive filament formed by copper ions in the functional active layer is physically limited by using the atomic-scale ion sieve effect of the h-BN material, so that the problem of failure caused by overgrowth of the filament in a traditional device is solved.

The application relates to a full GaN power electronic monolithic integrated circuit and a preparation method thereof, which comprises, from bottom to top, an insulating composite substrate, an AlN layer, a Si layer, a GaN / AlGaN buffer layer, a GaN layer and an AlGaN layer; a 2DEG layer is formed between the GaN layer and the AlGaN layer; the AlGaN layer is etched, a p-GaN layer is grown; a p-GaN layer gate portion is etched and filled with a passivation layer, and a gate metal is grown; source metal and drain metal are respectively grown on both sides of the p-GaN layer gate area; a deep groove is arranged between a driving circuit and a low-voltage tube, between a high-voltage tube and the low-voltage tube, and a medium is filled in the deep groove; and the full GaN power electronic monolithic integrated circuit is obtained through a top via and an interconnection process. The application can realize high efficiency and low power consumption, low parasitic effect, and reduce leakage current and switching loss.

The invention provides an optical waveguide and heterojunction two-dimensional material integrated nonvolatile storage structure and an application method, and relates to the technical field of photoelectron integration. A heterojunction two-dimensional material layer is arranged in an evanescent field area of an optical waveguide layer, so that when an electric field pulse is applied to the heterojunction two-dimensional material layer through a positive electrode layer and a negative electrode layer, the heterojunction two-dimensional material layer is not subjected to evanescent field pulse; the heterojunction two-dimensional material layer can generate various non-volatile heterojunction polarization states, so that the optical constant and the optical state of the non-volatile storage structure are changed, the optical state can be stored by utilizing the non-volatility, and the optical memory function is realized. Even under the condition of power failure, the stored optical state cannot be lost, and ultra-low static power consumption can be realized. The overturning of the polarization state of the heterojunction is realized by the overturning of the heterojunction domain, so that the power consumption of the nonvolatile storage structure is far lower than the heat power consumption required by a phase change memory or a thermo-optic device.

This invention relates to the field of power electronics technology, specifically to a switching relay control circuit and control method. The switching relay control circuit includes a signal control module, a power drive module, and a protection module. The signal control module receives an input control signal and outputs a drive signal. The power drive module responds to the drive signal by applying a first voltage to the relay coil to activate it, and automatically reduces the first voltage to a second voltage to maintain the activated state after activation. The second voltage is higher than the relay release voltage. The protection module provides unidirectional protection and voltage clamping for the circuit. This invention enables rapid and reliable relay activation, significantly reduces holding power consumption, and improves the circuit's anti-interference capability.

The present disclosure provides a voltage regulation circuit and a memory. The voltage regulation circuit comprises a power supply generation module, a selection control signal generation module and a voltage selection module. The power supply generation module is configured to generate a plurality of groups of transistor substrate voltages, wherein each group of transistor substrate voltages corresponds to at least one state of a sensitive amplifier. The selection control signal generation module is configured to generate a corresponding selection control signal based on the current state of the sensitive amplifier. The voltage selection module is configured to receive the plurality of groups of transistor substrate voltages and the selection control signal, and to select a corresponding group of transistor substrate voltages to output to the substrate end of a transistor in the sensitive amplifier in response to the selection control signal.

The application provides a bionic event-driven reconfigurable analog / digital converter and electronic equipment, which comprises an adjustable signal folding circuit, a dynamic comparator circuit and a bionic control logic circuit, and any two of the adjustable signal folding circuit, the dynamic comparator circuit and the bionic control logic circuit are connected; the adjustable signal folding circuit receives an externally transmitted first voltage signal, folds the first voltage signal to obtain a to-be-compared signal under the condition of triggering a folding action, and transmits the to-be-compared signal to the dynamic comparator circuit; the dynamic comparator circuit generates a comparison result according to the received to-be-compared signal, and transmits the comparison result to the bionic control logic circuit; the bionic control logic circuit generates a bionic clock signal according to the comparison result, and transmits the bionic clock signal to the dynamic comparator circuit; and the dynamic comparator circuit is opened / closed according to the bionic clock signal. The application can reduce the static power consumption generated by the analog / digital converter during operation.

Embodiments of the present disclosure disclose an RC oscillator, an electronic device and a chip. The RC oscillator comprises: a current generation circuit comprising a transistor and a resistor, configured to output a bias current according to a power supply voltage, an inter-electrode voltage of the transistor and a resistance value of the resistor; a charging and discharging control circuit comprising a capacitor and connected to the current generation circuit, configured to charge the capacitor by the power supply voltage or discharge the capacitor by the bias current; and a logic control circuit connected to the current generation circuit and the charging and discharging control circuit, configured to compare a capacitor voltage of the capacitor with a voltage threshold determined based on the inter-electrode voltage, and control the charging and discharging control circuit to switch to a first stage or a second stage. The present disclosure does not need to design a complex voltage reference and current reference circuit, greatly simplifies the overall circuit structure, and saves chip area and power consumption.

The application discloses an MCU chip and a switching method of working modes of the MCU chip, which comprises a first LDO circuit, a second LDO circuit and a switching circuit. The first LDO circuit and the second LDO circuit supply power to the MCU chip, and the switching circuit switches between the first LDO circuit and the second LDO circuit, so that the MCU chip works in different modes. The switching circuit comprises a copy controllable circuit and a copy circuit. According to the MCU chip, the copy controllable circuit copies the output current of the first LDO circuit to output a first copy current, the copy circuit copies the first copy current to output a second copy current to the second LDO circuit, the second LDO circuit establishes an internal loop based on the second copy current, and the current flow between the switching circuit and the first LDO circuit and the second LDO circuit is cut off, so that the output voltage drop caused by the transient change of the load when the first LDO circuit and the second LDO circuit are switched is avoided.

This application relates to the field of analog integrated circuit design and discloses an adaptive ramp compensation circuit system applied to buck-boost circuits. The system mainly includes a current sensor and a ramp signal generator. The current sensor mirrors the current of the pull-up power transistor to the pull-up mirror transistor at a specific ratio, converting it into a voltage signal through a sensing resistor. The ramp signal generator reduces the influence of the input voltage on the ramp signal slope through a voltage divider resistor network, and the switching state of the reset switch is controlled by a reset signal controlled by a pulse width modulation signal and a clock signal. By introducing a pulse width modulation control signal, this application ensures that the ramp signal generator operates only when the pull-up power transistor is on, effectively solving the subharmonic oscillation problem that may occur in buck-boost circuits when the duty cycle is greater than 50%. Simultaneously, the resistor voltage divider reduces the influence of the input voltage on the ramp signal, improving the circuit's stability and anti-interference capability.

The invention provides a low-leakage 21-tube D flip-flop circuit, which consists of ten PMOS (P-channel Metal Oxide Semiconductor) tubes P0-P9 and eleven NMOS (N-channel Metal Oxide Semiconductor) tubes N0-N10, and is characterized in that a main latch end and drain electrodes of P1 and P3 are connected with a drain electrode of N0 and grid electrodes of P4 and N3 to form a shared node i; the source electrode of the N0 is connected to a parallel node of the N10 and the N1; the grid electrode of the N0 is shared with the source electrode of the N2, the drain electrode of the P4, the drain electrode of the N3 and the grid electrode of the N4 to form an internal node ii; source electrodes of the N3 and the N4 are respectively connected with a drain electrode of the N5; the drain electrode of the N4 is connected with the drain electrode of the P5 to form a main latch structure output node iii; the grid electrode of the P5 is connected with the drain electrode of the N2; the slave latch end, the P6, the P7, the N6 and the N7 realize a cross coupling structure; the drain electrode of the N8 is connected with the source electrode of the N7; the grid electrode of the N8 and the drain electrode of the P8 are connected and jointly connected to the grid electrode of the P5 and the drain electrode of the N2; the structure is compact, and an effective solution is provided for digital chip design customized based on a standard cell library.

The utility model discloses a control circuit for speed regulation and positive and negative rotation switching of a DC motor of a laminator, which comprises an H-bridge control chip U3 integrated by field effect transistors Q1 to Q4. A first pin GND of the H-bridge control chip U3 is grounded, a second pin IN1 is the input end of PWM2, a third pin IN2 is the input end of PWM1, a fourth pin VREF is connected with a first resistor R1 and inputs reference voltage, a fifth pin VM is connected with a DC motor driving power supply and directly supplies power to the H-bridge control chip U3, a sixth pin OUT1 is connected with an inductor L3, a seventh pin ISEN is connected with a second resistor R2, an eighth pin OUT2 is connected with an inductor L2, the inductor L2 is connected with the positive electrode end of a DC motor, and the positive electrode end of the DC motor is connected with the negative electrode end of the DC motor. The inductor L3 is connected with the negative electrode end of the DC motor. The rotation speed of the DC motor is controlled by performing pulse width modulation (PWM) on an input signal, and forward and reverse rotation of the DC motor is switched.

This application relates to the field of in-memory computing memory technology, and more particularly to a three-dimensional ferroelectric memory with an IGZO channel and its fabrication method. The three-dimensional ferroelectric memory with an IGZO channel includes: a bottom global gate line; a center select gate extending vertically relative to the bottom global gate line; a semiconductor stack structure including a gate metal layer, a ferroelectric layer, a gate oxide layer, and an IGZO channel sequentially surrounding the center select gate; a drain and a source extending horizontally relative to the center select gate into the semiconductor stack structure and contacting the ferroelectric layer; and multiple pairs of drains and sources spaced apart along the extension direction of the center select gate to form multiple ferroelectric memory transistor cells. The three-dimensional ferroelectric memory with an IGZO channel of this application improves the durability and reliability of non-volatile memory devices.

This application relates to an unlocking system, unlocking method, and vehicle. The power management module is configured to: in a sleep state, generate a first wake-up signal based on the door switch trigger time, and in response to the first wake-up signal, switch to a wake-up state, control the switch module to close, and send a second wake-up signal. The vehicle controller is configured to: in response to the second wake-up signal, wake up the near-field communication module to verify the key; after successful verification, if a key unlocking signal is received within a preset unlocking time, drive the unlocking / locking actuator to unlock; otherwise, generate a sleep signal. The power management module is also configured to: in response to the sleep signal, control the switch module to disconnect and switch to a sleep state. This application can solve the problems in related technologies where maintaining constant power to some modules to maintain the unlocking function accelerates battery depletion and damage; and where a complete power outage lacks an effective wake-up mechanism to restore system power for unlocking.

This invention discloses a multifunctional handheld electronic device and its control method, relating to the field of electronic product technology. The multifunctional handheld electronic device includes a grip component, a circuit board, and an expansion component. A first switch is mounted on the grip component and electrically connected to the circuit board. The circuit board, also mounted on the grip component, integrates a first functional module and a second switch. The expansion component is detachably connected to the grip component and is equipped with the second functional module. When the expansion component is mounted on the grip component, the second functional module is electrically connected to the circuit board, the second switch is in a first state, and the first switch controls the activation and deactivation of the second functional module. When the expansion component is not mounted on the grip component, the second switch is in a second state, and the first switch controls the activation and deactivation of the first functional module. By automatically switching the control object with a single button, the modular and rapid expansion of functions is achieved.

The utility model relates to an intelligent gas meter dual power supply switching power supply circuit, which adopts dual power supply design, automatically switches to the power supply with higher voltage by utilizing the voltage drop characteristic of diode, and does not need external control unit. At the same time, super capacitor is added as backup power supply to provide emergency power supply when dual power supply is powered off, ensuring data storage and valve operation. The power output module also has power supply control function, and realizes intermittent power supply or constant power supply through MOS tube, meeting the low power consumption requirement. In addition, the voltage conversion module works cooperatively to meet the high and low voltage load requirement, reduce power consumption, and prolong battery life. This design significantly improves the stability and reliability of the intelligent gas meter power supply system, providing users with more durable and stable use experience.

The utility model discloses a kind of MCU power supply control circuit of linear drive device, controller and electric furniture, for realizing the zero power consumption standby of MCU and load wake-up.The technical scheme is: in standby state, MCU is completely powered off, but a DC output port remains electrified.When external load is connected to the DC output port and generates current, a passive detection circuit consisting of sampling unit and detection unit generates trigger signal, the trigger signal turns on a first switching unit, thereby connecting the power supply of MCU, wakes up MCU to perform subsequent tasks.The utility model triggers MCU power-on by passive detection mode, completely solves the standby power consumption problem of equipment, simple structure, response sensitive.

This invention discloses a high PSR, low power consumption, capacitor-free N-type low-dropout linear regulator, belonging to the field of analog integrated circuits. The regulator includes an error amplifier, a voltage buffer, a PSR enhancement circuit, and an NMOS power transistor. The voltage buffer uses a unity-gain negative feedback configuration, employing a smaller quiescent current at the same output impedance. At the output voltage... V OUT When the voltage rises, the error amplifier and voltage buffer suppress the rise through a negative feedback loop. V OUT To achieve circuit stability, the PSR enhancement circuit uses a high-pass filter for sampling. V OUT Ripple at mid-to-high frequencies creates negative feedback, generating gain that acts on... V OUT This ultimately improves power supply rejection at mid-to-high frequencies. Compared to PMOS transistors, using NMOS transistors as power transistors allows for a smaller footprint while maintaining the same current. This invention offers advantages such as low power consumption, high PSR, and small footprint, making it suitable for mobile smart terminals, embedded systems, low-power IoT devices, and various high-precision analog circuit systems sensitive to power supply noise.

The application relates to the technical field of chip circuits, in particular to a special chip ADC circuit for a retinal prosthesis, which comprises a sampling switch module, a capacitor array module, a dynamic comparator, a digital control logic module and a digital correction module; the capacitor array module comprises a P-end capacitor array and an N-end capacitor array, the P-end capacitor array comprises a plurality of first capacitors connected in parallel, and each first capacitor is connected with a first control switch; the N-end capacitor array comprises a plurality of second capacitors connected in parallel, and each second capacitor is connected with a second control switch; the same direction end of the dynamic comparator is connected with the end capacitor of the P-end capacitor array, and the reverse end of the dynamic comparator is connected with the end capacitor of the N-end capacitor array; the digital control logic module is connected with the output end of the dynamic comparator; and the digital correction module is connected with the output end of the digital control logic module. The ADC circuit provided by the application is used for converting a sensor analog signal into a digital signal and realizes low power consumption and high resolution.

The application discloses a satellite communication device, comprising an antenna, a radio frequency front-end module, an anti-interference module and a second radio frequency switch; the radio frequency front-end module comprises a coupler, a first radio frequency switch and a detector; the power value of the coupler sampling signal is detected according to the detector, and a preset threshold value is used to control the first radio frequency switch and the second radio frequency switch. By controlling the radio frequency switch, selective processing of GNSS and S, L, C and other frequency band communication anti-interference is realized, the balance between high anti-interference capability and low power consumption is considered, and the static power consumption of the equipment in a weak interference scene is reduced. At the same time, by means of multi-stage filtering, auxiliary verification of the FPGA digital domain and other technical means, the influence of multi-band crosstalk and harmonic leakage existing in the power monitoring circuit is reduced.

The application discloses a pre-stabilization circuit, a PCB and a controller, comprising a start bias unit, a pre-stabilization unit, an enable control unit, a high-voltage bandgap reference unit and an output buffer unit. The start bias unit can provide forced start at the moment of power-on, ensure the circuit to get rid of the degenerate point and establish stable bias, and automatically exit after the start is completed. The pre-stabilization unit generates two signals based on the bias: one is a driving signal suitable for high-voltage LDMOS, which improves the high-voltage adaptability of the circuit; the other is a control signal of the reference circuit, which is used for enable management. The enable control unit selects the control signal through an external signal, realizes work mode control, and cuts off the bias to reduce static power consumption when it is turned off. The high-voltage bandgap reference unit starts after obtaining the driving and bias, uses internal temperature compensation and closed-loop adjustment mechanism to output low-drift reference voltage. The output buffer unit enhances the load capacity of the reference voltage, and forms a global closed loop through feedback.

The application discloses a kind of bionic flexible tactile sensor array and preparation method thereof, it is related to flexible tactile sensing technical field, including flexible single electrode, pressure-sensitive conductive layer, bionic structure layer, buffer layer and flexible array electrode, the surface of pressure-sensitive conductive layer is spaced array distribution with multiple protrusions, bionic structure layer is provided with bionic structure corresponding protrusion, protrusion is embedded inside bionic structure and in unforced state, the end face of protrusion and the end face of bionic structure exist preset gap.The application adopts pressure-sensitive conductive layer and bionic structure layer nested initial gap design, forms threshold trigger type conductive path, sensor is isolated completely with pressure-sensitive conductive layer when not subjected to external force, sensor is in zero power consumption standby state, unlike traditional always-on type piezoresistive sensor, significantly reduce static power consumption;At the same time, avoid the problem of effective sensitivity early loss caused by pre-compression of traditional sensor from the root, guarantee the sensitivity stability in full range.

This application discloses an active display control device based on gallium arsenide (GaAs) optoelectronic devices. In this device, the GaAs heterojunction field-effect transistor used in the array driving unit, leveraging the material's high electron mobility and the two-dimensional electron gas structure formed by the heterojunction, can instantaneously control the luminous state of the display pixels. Furthermore, it is electrically connected to each display pixel in a one-to-one correspondence, eliminating signal lag caused by multiplexing. Additionally, the GaAs CMOS logic unit, utilizing the properties of GaAs material, can significantly reduce the signal transmission delay of logic gate circuits. Combined with the high-frequency modulation characteristics of pulse width modulation signals, it effectively improves the smoothness of dynamic image transitions. Regarding high-frequency power consumption control, the GaAs heterojunction field-effect transistor can significantly reduce Joule heat loss and static power consumption during high-frequency switching. The cascaded structure of the array driving unit and the GaAs CMOS logic unit can reduce signal attenuation and distortion at high frequencies, reducing the power consumption of the auxiliary amplifier circuit.

The invention relates to an SOI-based MIS p-GaN HEMT half-bridge integrated circuit and a preparation method thereof. The SOI-based MIS p-GaN HEMT half-bridge integrated circuit comprises an SOI substrate, an AlN layer, a GaN layer, an AlGaN layer, a p-GaN layer and a second insulating dielectric layer which are sequentially arranged from bottom to top. The SOI substrate comprises substrate silicon, a first insulating medium layer and top silicon; etching the p-GaN layer and the second insulating dielectric layer, growing a third insulating dielectric layer, and preparing a grid electrode; source electrode metal and drain electrode metal respectively grow on two sides of the grid electrode; field plate metal grows above the source electrode metal and the grid electrode metal and is filled with a fourth insulating dielectric layer; a deep groove is formed in the middle of the circuit and penetrates through the fourth insulating medium layer, the third insulating medium layer, the AlGaN layer, the GaN layer, the AlN layer, the top silicon layer and the filling insulating medium. Filling the top with a fifth insulating dielectric layer; and obtaining a half-bridge integrated circuit through a top through hole and an interconnection process. According to the invention, the parasitic effect can be reduced, and leakage current and switching loss are reduced.

The invention provides an indirect heating type reconfigurable intelligent metasurface based on a phase change material and a preparation method of the metasurface. The metasurface is composed of a plurality of metasurface units arranged in an array mode. Each metasurface unit comprises a substrate, a first dielectric layer, a middle metal layer, a second dielectric layer, an electrical isolation layer, a phase change material layer and a metal patch radiation structure which are sequentially arranged from bottom to top; a contact electrode is arranged in the substrate, a micro heater is arranged in the electrical isolation layer, the micro heater is provided with a first port and a second port, the first port is electrically connected to the upper surface of the middle metal layer through a first vertical through hole, and the second port is electrically connected to the contact electrode through a second vertical through hole; the first dielectric layer, the second dielectric layer and the electrical isolation layer are insulating layers; heat generated by the micro heater drives the phase change material to generate crystalline / amorphous transition in an indirect heating mode, and an equivalent conductive path, electromagnetic coupling strength or local impedance between the metal patch radiation structures is changed in different phase states.

This application relates to the field of smart meter technology, specifically to a smart meter designed to address the technical problem of reducing power consumption in smart meters, thereby ensuring product compliance and improving the product's green energy efficiency. To this end, the smart meter of this application includes a rectifier module, a DC power supply module, and a communication module. The rectifier module provides a first DC voltage to the DC power supply module. The DC power supply module includes a DC-DC converter; the fifth terminal of the DC-DC converter is connected to the first DC voltage, and the sixth terminal of the DC-DC converter is connected to the communication module, used to convert the first DC voltage into a third DC voltage to power the communication module. Through this configuration, the smart meter of this application has lower heat loss and higher conversion efficiency, thereby effectively reducing the power consumption of the smart meter.

The application claims a high-gain operational amplifier circuit for Sigma-Delta ADC. The circuit comprises a main operational amplifier, a gain-improving auxiliary operational amplifier, a bias circuit and a switched-capacitor common-mode negative feedback circuit. The main operational amplifier serves as the main body of the circuit, has a high gain and a wide bandwidth; the auxiliary operational amplifier improves the output impedance and effectively improves the DC gain of the operational amplifier; the bias circuit is used to provide appropriate DC bias voltage for the main operational amplifier and the auxiliary operational amplifier; the switched-capacitor common-mode negative feedback is used to stabilize the output common-mode voltage. The application uses the auxiliary operational amplifier to improve the gain, ensures a high input-output swing of the operational amplifier, improves the DC gain of the operational amplifier, adopts a symmetrical switched-capacitor common-mode negative feedback, ensures the bandwidth range and reduces the nonlinearity of the circuit.

The invention provides a vehicle unlocking method, device and system and a vehicle, and relates to the technical field of vehicles, in the operation process of a sentinel system, the sentinel system is utilized to identify whether a target person exists in a target area around the vehicle, and if the target person is identified to exist, a biological identification module is started, and the vehicle is unlocked. In response to the current biological feature information, collected by the biological recognition module, of the user, identity recognition is conducted on the user according to the current biological feature information, if identity recognition passes, the vehicle is controlled to be unlocked, and otherwise, the vehicle is controlled to be locked; a convenient and high-safety vehicle unlocking mode in a scene without a key or a mobile phone is realized, so that vehicle unlocking in different scenes is realized, and the user experience is improved.

The utility model provides a kind of vehicle light driving system for reducing static power consumption, belong to vehicle light driving technical field, including vehicle light and the vehicle light driving module being connected to vehicle light;Vehicle data acquisition module, vehicle data acquisition module at least includes speed acquisition unit and ambient light acquisition unit;Vehicle light parameter feedback module, vehicle light parameter feedback module connects vehicle light;Main control module, the input of main control module is connected speed acquisition unit, ambient light acquisition unit and vehicle light parameter feedback module respectively, and the output of main control module is connected vehicle light driving module.There is beneficial effect: the utility model is by being arranged vehicle data acquisition module and vehicle light parameter feedback module, can obtain the driving speed of vehicle, ambient light intensity information and vehicle light state parameter in real time, and the opening and closing state and brightness of adaptive control vehicle light, to reduce static power consumption, reach the purpose of energy saving.