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First-stage circuit structure of pipelined analog-to-digital converter

A technology of analog-to-digital converters and digital-to-analog converters, which is applied in the direction of analog-to-digital converters, can solve the problems of system series reduction and high power consumption, and achieve low static power consumption, optimized quantization range, and optimized bias circuits. and the effect of the continuous type common-mode feedback circuit

Inactive Publication Date: 2013-03-20
TIANJIN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The increase in the number of bits in the first level itself consumes more power than 1.5 bits / level, but the overall number of levels in the system also decreases

Method used

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  • First-stage circuit structure of pipelined analog-to-digital converter
  • First-stage circuit structure of pipelined analog-to-digital converter
  • First-stage circuit structure of pipelined analog-to-digital converter

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Embodiment Construction

[0025] The present invention will be further described in detail below in combination with specific embodiments.

[0026] Such as figure 1 As shown, the first-stage circuit structure of a pipelined analog-to-digital converter in the present invention includes a 4-bit full parallel analog-to-digital converter (FLASH ADC), an encoding circuit and a remainder gain digital-to-analog converter (MDAC) assembly. The present invention adopts The two-phase non-overlapping clock is divided into a sampling clock and a holding clock. The input voltage is sampled during the sampling phase, and the residual voltage is amplified during the holding phase.

[0027] figure 2 It shows the structure of the 4-bit all-parallel analog-to-digital converter (FLASH ADC) in the present invention, which also works under two-phase non-overlapping clocks. The 4-bit full-parallel analog-to-digital converter (FLASH ADC) described in the present invention uses 16 comparators to divide the quantization rang...

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Abstract

The invention discloses a first-stage circuit structure of a pipelined analog-to-digital converter, which comprises a 4-digit fully parallel analog-to-digital converter, a code circuit and a residue gain analog-to-digital converter. A two-phase non-overlapping clock is adopted, a sampling phase samples input voltage, and a maintaining phase amplifies residual voltage. The residue gain analog-to-digital converter consists of a sub analog-to-digital converter, a subtracter and a residue amplifier. During sampling, the 4-digit fully parallel analog-to-digital converter conducts comparison and quantification on the input voltage and generates a 16-digit thermometer code which is converted to a 4-digit binary output code by the encoder. A lower pole plate of a sampling capacitor array is connected with the input voltage, and an upper pole plate thereof is connected with a common mode level for sampling an input. During maintaining, the sub analog-to-digital converter outputs different voltages to the sampling capacitor array according to a control of the thermometer code; subtraction from the input voltage is accomplished according to twice charge conservation; and a feedback capacitor is in bridge connection with the two ends of the residue amplifier to amplify the residual voltage by 8 times for use by a backward-stage circuit.

Description

technical field [0001] The invention relates to the direction of analog-to-digital converters in the technical field of integrated circuits, specifically a first-stage circuit structure of a pipelined analog-to-digital converter Background technique [0002] In recent years, with the rapid development of communication and digital signal processing technology, the design of high-speed and high-precision analog-to-digital converters is becoming more and more important as the interface between analog systems and digital systems. As a classic structure, the pipeline analog-to-digital converter can well take into account the requirements of speed, precision and power consumption. Because of its structural design diversity and flexibility, it has been greatly favored. [0003] The basic idea of ​​the pipeline analog-to-digital converter is to disperse the overall accuracy to different stages, and combine the output of each stage through timing control to achieve the overall requir...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12
Inventor 赵毅强庞瑞龙于海霞盛云岳森
Owner TIANJIN UNIV
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