93 results about "Feedback capacitor" patented technology

The invention provides a feedback compensation circuit for a switching power supply. The feedback compensation circuit comprises a reference voltage source, an error amplifier, a feedback capacitor, a sampling circuit, an optocoupler output circuit and a PWM control chip, output voltage is connected to the inverted input end of the error amplifier through the sampling circuit, the reference voltage source is connected to the in-phase input end of the error amplifier, and the output end of the error amplifier is connected to a feedback pin of the PWM control chip through the optocoupler output circuit. The sampling circuit comprises an upper sampling resistor, a lower sampling resistor, a second resistor and a second capacitor; the feedback capacitor is connected between the inverting input end and the output end of the error amplifier; by selecting feedback capacitors with different capacities, the low-frequency gain of a transfer function from output to control of the feedback compensation circuit is adjusted. According to the invention, the element parameter design process is greatly simplified, the controllability of low-frequency gain is enhanced, and the technical effects of easy parameter design and simple debugging are achieved.

The invention discloses a capacitor mismatch error shaping circuit and method suitable for a multi-bit quantization Sigma-Delta ADC, and belongs to the technical field of integrated circuits, and the capacitor mismatch error shaping circuit comprises a data weight averaging module which is used for adopting a data weight averaging technology for high-bit quantization code words, and correcting the high-bit quantization code words according to the data weight averaging technology; averaging the mismatch error of the capacitor corresponding to the high-order quantization code word to obtain an averaged high-order capacitor; and the mismatch error shaping module is used for taking the averaged high-order capacitance as a reference, adopting a mismatch error shaping technology, keeping low-order feedback of the current low-order quantization code word of the lower polar plate of the capacitive digital-to-analog converter during Sigma-Delta ADC sampling, and realizing subtraction operation between two adjacent low-order quantization code words. According to the invention, the error caused by the mismatch of the CDAC capacitor fed back by the multi-bit quantization Sigma-Delta ADC can be effectively suppressed, the linearity of the system is improved, and the circuit overhead is remarkably reduced.

A frequency multiplier includes an oscillator and a harmonic generator. The oscillator has a resonant cavity and a negative resistance unit. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. The harmonic generator is configured to generate a harmonic signal based on a fundamental frequency signal taken as input. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and to output an intrinsic signal with the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal.

The invention provides an analog amplifier circuit based on capacitance feedback, which relates to the technical field of signal processing, and comprises a positive voltage local voltage stabilization module, an amplifier module, a bias module and a negative voltage local voltage stabilization module, the positive voltage local voltage stabilization module, the bias module and the negative voltage local voltage stabilization module are all connected with the amplifier module; the positive voltage local voltage stabilization module is used for providing a first stable power supply for the amplifier module; the amplifier module is used for receiving a to-be-amplified signal input externally, performing signal amplification on the to-be-amplified signal to obtain an amplified signal, and outputting the amplified signal; the signal amplification is realized based on a transistor and a feedback capacitor in the amplifier module; the bias module is used for providing first bias voltage for the amplifier module; the negative voltage local voltage stabilization module is used for providing a second stable power supply for the amplifier module. The driving requirement and energy consumption of the amplifier are reduced by adopting capacitance feedback, the energy efficiency of the amplifier circuit is improved, signal amplification is realized through the transistor, and the amplifier circuit with a small area is realized.

The invention discloses a multi-path instrumentation amplifier which comprises a low-frequency amplification circuit and a high-frequency amplification circuit which are coupled between a voltage input end and a voltage output end. The high-frequency amplification circuit comprises a first amplifier, a second amplifier, a first input resistor, a first input capacitor, a second input resistor, a second input capacitor, a first feedback capacitor and a second feedback capacitor. The reverse output end and the non-reverse output end of the first amplifier are respectively coupled with the non-reverse input end and the reverse input end of the second amplifier, and the non-reverse output end and the reverse output end of the second amplifier are coupled with the voltage output end. The first feedback capacitor is coupled between the voltage output terminal and the inverting input terminal of the first amplifier. The second feedback capacitor is coupled between the voltage output terminal and the non-inverting input terminal of the first amplifier.

The invention provides a high-fidelity neuron circuit based on a full-printed electrochemical transistor, which comprises an amplification unit, a reset OECT, a film capacitor element, a feedback capacitor element, a current input end, a voltage source VDD and a common grounding end GND, and is characterized in that a grid electrode of a first-stage OECT in the amplification unit is connected with one end of the film capacitor element and is connected with the current input end at a connection node; the drain electrode of the first-stage OECT is connected to one end of the corresponding resistor to form a first-stage inverter; an output node is formed at a connection node of the resistor and the drain electrode of the first-stage OECT; the output node is connected with the grid electrode of the next stage of OECT; the source electrode of each stage of OECT is connected with a common grounding end GND, and a voltage source pin VDD is connected with the other ends of the four resistors; one end of the feedback capacitor element is connected to the output node of the last-stage OECT; the grid electrode of the reset transistor is connected with the output node of the last-stage OECT, the source electrode of the reset transistor is connected to the input port of the amplification unit, the structure is remarkably simplified, and large-scale integration is facilitated.

The present application belongs to the field of MEMS devices, and specifically discloses a MEMS accelerometer, a seismic detector, and a preparation method. The sensitive unit of the accelerometer is prepared on SOI, and includes: an outer frame, a mass block, a spring structure, a pickup structure, a first feedback capacitor structure, and a second feedback capacitor structure; the spring structure is prepared on the first layer of SOI, and the first feedback capacitor structure and the second feedback capacitor structure are prepared on the third layer of SOI, and the first layer and the third layer are any combination of a substrate layer and a device layer; the first feedback capacitor structure and the second feedback capacitor structure are respectively arranged on the sensitive axis and the perpendicular sensitive axis of the mass block, and are variable area capacitors and variable spacing capacitors respectively; the pickup structure is arranged above the mass block on the first layer of SOI. Through this application, the area occupied by the MEMS accelerometer is reduced based on the SOI process, and the sensing signal and the feedback signal can be isolated through the insulating layer of SOI, thereby improving the detection accuracy of the accelerometer and regulating the linearity of the accelerometer feedback execution.

The invention relates to the technical field of communication equipment, and discloses a frequency hopping filter with a hopping transmission zero point, a hopping control method and communication equipment. At least one resonant inductor of an LC resonant circuit of the frequency hopping filter is connected with a radio frequency switch feedback capacitor array in parallel; the frequency of a transmission zero point at a higher harmonic of the frequency hopping filter is controlled by controlling the opening and closing of a channel where each feedback capacitor in the radio frequency switch feedback capacitor array is located, so that the frequency of the transmission zero point changes along with the center frequency of the frequency hopping filter; and finally, far-end suppression, relative bandwidth stability and frequency hopping accuracy in a wide frequency range are improved.

This invention relates to instrumentation amplifiers and biosignal acquisition methods, specifically to a capacitively coupled instrumentation amplifier and biosignal acquisition method. It solves the technical problems of poor accuracy and integrity of biosignals acquired by existing instrumentation amplifiers, as well as their large area. This invention employs an input impedance enhancement circuit to increase the input impedance, resulting in more complete biosignals. It also uses a transimpedance matching enhancement circuit to increase the matching degree between the output signal of the feedback loop and the differential output signal. Simultaneously, by reducing the feedback capacitor to increase the closed-loop gain and lower the requirement for the input capacitor, it not only reduces the area but also increases the input impedance, improving the accuracy and integrity of the acquired biosignals. The second-order DC electrode offset cancellation circuit uses a second-order low-pass filter to narrow the transition band, more effectively separating the DC electrode offset signal from the biosignal, eliminating the DC electrode offset problem during biosignal acquisition, and making the acquired biosignals more accurate.

This disclosure discloses a sensing circuit and a source driver including the sensing circuit, which can reduce the impact of panel load on the performance of the integrator and reduce the chip area by eliminating the feedback capacitor of the integrator. The sensing circuit can convert the input current received from the display panel into an output current with linearity and a current quantity less than the input current.

The invention provides a second-order noise shaping SAR ADC circuit and electronic equipment, and the circuit comprises a sampling and quantification module which is used for completing the sampling and quantification of an input signal of an nth conversion period when being controlled by a time sequence, and outputting a digital code and a residual signal; the integral amplifier is connected with the sampling quantization module and is used for accessing the residual signal under the control of a first time sequence signal, integrating the residual signal and storing an integration result in a group of feedback capacitors of the integral amplifier; and the integral amplifier is also used for accessing the voltage stored on the group of feedback capacitors under the control of a second time sequence signal so as to carry out secondary integration, and the output end of the integral amplifier is connected to the input coupling node of the sampling quantization module so as to provide correction voltage participating in the quantization process of the (n + 1) th conversion period. According to the invention, high energy efficiency and high-order noise shaping capability can be considered at the same time.

The utility model provides a built-in IEPE circuit used for a piezoelectric type shock wave pressure sensor, comprising a high gain amplifier, a feedback capacitor and a constant current source, the high gain amplifier is composed of an N channel enhanced field effect transistor, a P channel enhanced field effect transistor, a resistor R1, a resistor R2, a feedback resistor R3 and a resistor R4, the two ends of the high-gain amplifier are connected with the constant current source, the positive electrode of the constant current source is an output end, and the constant current source is connected to the P-channel enhanced field effect transistor; the piezoelectric sensor sensitive element is connected with the input end and receives a charge signal generated by the piezoelectric sensor sensitive element through the input end; the feedback capacitor is installed between the input end and the output end to form negative feedback to form a charge amplifying circuit, a small number of electronic components are used for constructing a complete IEPE circuit, and the charge amplifying circuit has the advantages of being high in integration level, small in size and high in anti-interference capacity and can be integrated in a sensor to amplify charge signals.

Logarithm (100) comprehensive an input amplifier (101), a logarithmic component (102), and a feedback capacitor (103) which is designed to stabilize the logarithm (100), characterized by the fact that the logarithm (100) comprises a switching device (110), and the feedback capacitance (103) is divided into a plurality of n partial feedback capacitances (103a, 103b, 103c) connected in parallel, wherein a first partial feedback capacitor (103a) is a permanently stabilizing component of the logarithm converter (100), and wherein a number of n-1 of the n partial feedback capacitors (103a, 103b, 103c) are switchable partial feedback capacitors (103b, 103c), wherein the n-1 partial feedback capacitors (103b, 103c) can be switched on separately as stabilizing components in addition to the first partial feedback capacitor (103a), and where the switching device (110) is configured to individually switch the n-1 switchable partial feedback capacitors (103b, 103c) depending on an input current (I Ph ) of the logarithm (100) to be automatically switched on or off and thus depending on the input current (I Ph ) of the logarithm (100) automatically increases or decreases an effective feedback capacity (103) with which the logarithm (100) is stabilized, wherein the effective feedback capacitance (103) corresponds to a sum of the first partial feedback capacitance (103a) and all switched-on switchable partial feedback capacitances (103b, 103c), and wherein the switching device (110) comprises • at least one reference current source (111, 111a, 111b), • at least one reference transistor (112, 112a, 112b), • at least one switching amplifier (113a, 113b), and • at least one switch (114a, 114b).

Disclosed are a pixel and a display device including the same. The pixel includes: a light emitting element; a constant current generating circuit for generating a constant current; the pulse generating circuit is used for generating a pulse signal; and an emission transistor providing a constant current to the light emitting element in response to the pulse signal. The pulse generating circuit includes: a plurality of inverters connected in series with each other, in which the plurality of inverters output a pulse signal at a pulse output node based on a voltage of a first node; and a feedback capacitor including a first electrode connected to the first node and a second electrode connected to the pulse output node.

The application provides a true rail-to-rail input and output reference voltage buffer circuit suitable for high-precision ADC, which alternately performs a sampling phase F1 and a holding phase F2 during operation; the circuit comprises a sampling capacitor C s During the sampling phase F1, the bottom plate tracks the input reference voltage, and the top plate is reset to the ground; a level shift capacitor C LVL During the sampling phase F1, the difference between the input reference voltage and the output common-mode voltage of a transconductance operational amplifier (OTA) is synchronously sampled, and during the holding phase F2, the output voltage is connected to the output end of the transconductance operational amplifier (OTA), so as to realize the expansion of the true rail-to-rail range of the output voltage; a feedback capacitor C f During the sampling phase F1, the charge is not cleared, and during the holding phase F2, the sampling capacitor C s is connected in parallel, and the output voltage is established through charge averaging; the switch network is used for controlling the connection state of the capacitors in the sampling phase F1 and the holding phase F2. The application embodiment can realize true rail-to-rail input and output and high effective input impedance.

The invention relates to a feed-forward mismatch error shaping successive approximation analog-to-digital converter and a mismatch error shaping method thereof. The analog-to-digital converter comprises a first CDACP module, a first CDACN module, a second CDACP module, a second CDACN module, a four-input dynamic comparator module and a digital logic module. The input ends of the first CDACP module, the first CDACN module, the second CDACP module and the second CDACN module are connected with input voltage, the output ends of the first CDACP module, the first CDACN module, the second CDACP module and the second CDACN module are connected with the input end of the four-input dynamic comparator module, and the output end of the four-input dynamic comparator module is connected with the digital logic module. According to the invention, feed-forward capacitor mismatch error shaping is provided on the basis of traditional feedback capacitor mismatch error shaping, and the method is suitable for a high-precision environment of lower-level board sampling.

This invention relates to a biomedical front-end detection circuit with duty cycle adjustable positive feedback capacitor and a method for fixing the capacitance value of the positive feedback capacitor. The circuit includes a duty cycle adjustment signal generator, a fully differential gain circuit, a positive feedback capacitor loop, and a low-pass filter. The fully differential gain circuit amplifies physiological signals. The positive feedback capacitor loop is an array of positive feedback capacitors connected to the fully differential gain circuit, and the positive feedback capacitor array includes a high-order positive feedback capacitor and a low-order feedback capacitor. The low-pass filter circuit filters the high-frequency biological signals output by the fully differential gain circuit. The duty cycle adjustment signal generator generates a duty cycle adjustment signal and continuously adjusts the low-order feedback capacitor to generate the minimum equivalent capacitance value. The beneficial effect is that by adjusting the duty cycle of the positive feedback capacitor to obtain an adjustable minimum capacitance value, high gain and high input impedance calibration resolution are achieved.

Techniques are disclosed to instruct how a switched capacitor digital power amplifier (PA) is configured to operate using high supply voltage levels beyond twice the maximum voltage rating for any of the transistor terminals such as Vds / Vdg / Vsg. The digital PA has a topology that comprises a dual-feedback capacitive path that comprises a capacitive divider and a voltage stabilizing feedback path to selectively couple the capacitive divider to DC bias voltages.

The invention relates to a capacitance feedback type current detection amplifier circuit, which comprises an operational amplifier, a feedback capacitor, a load capacitor, a reset switch, a first capacitor, a second capacitor, a first change-over switch and a second change-over switch, reference voltage is input to the in-phase input end of the operational amplifier, the output end of the operational amplifier is connected with the second end of the feedback capacitor and the first end of the load capacitor, the reset switch is connected with the feedback capacitor in parallel, the second end of the load capacitor is grounded, and the second end of the first capacitor is grounded. The second end of the second capacitor is selectively connected to the in-phase input end of the operational amplifier or the first change-over switch through the second change-over switch, and the first end of the first capacitor is selectively connected to the output end of the operational amplifier or the second change-over switch through the first change-over switch. According to the invention, the influence of noise random sampling values on the circuit can be suppressed.

The invention relates to the field of charge amplifiers, in particular to a multi-gear multi-channel charge amplification device for a differential three-dimensional force detection mechanism. A multi-gear multi-channel charge amplification device for a differential three-dimensional force detection mechanism comprises a charge amplifier integrated circuit board electrically connected with the differential three-dimensional force detection mechanism, and the charge amplifier integrated circuit board is provided with a charge signal input interface, a power supply interface and at least three multi-gear charge amplifier units. The multi-gear charge amplifier unit comprises a precision operational amplifier chip and n adjustable amplification gears, and the on-off states of n feedback capacitors are switched through a 2n-bit patch dial switch to achieve gear switching. The method has the advantage of being higher in universality, can be used for cutting machining of various products, meets the requirements of different measurement ranges, and does not need to additionally add signal debugging equipment.

The invention belongs to the technical field of amplifiers. The invention provides a floating inverting amplifier circuit with high gain and wide swing. According to the embodiment of the invention, a first-stage amplifier of the multi-layer sleeve type FIA is cascaded with a second-stage amplifier (conventional FIA) serving as an output stage, and the input end and the output end of the output stage are connected through a first feedback network and a second feedback network to form a closed-loop negative feedback form. A feedback resistor and a feedback capacitor are connected in series to serve as a feedback network, and output stages are connected into a closed-loop negative feedback mode, so that the cascade connection stability of the first-stage amplifier and the second-stage amplifier of the multilayer sleeve type FIA can be effectively improved. While the advantages of low power consumption and high energy efficiency of full-dynamic design are kept, the problem that high gain and wide swing design of an existing floating inverting amplifier cannot be achieved at the same time is solved.

The present invention discloses an operational amplifier structure using dynamic compensation in a ΣΔ modulator switched capacitor integrator, comprising a reference voltage input terminal, a feedback DAC capacitor, a sampling capacitor, a signal input terminal, an integrating capacitor, a fully differential folded cascode two-stage operational amplifier, a first control switch, a second control switch, a third control switch, a fourth control switch, a fifth control switch, a sixth control switch, and a seventh control switch. The structure has low power consumption.

The embodiment of the present application relates to a kind of single-ended conversion differential capacitor sampling compensation device and sampling compensation method, the device includes: compensation module, at least including one compensation capacitor;The compensation module is connected with the capacitor to be measured, for compensating the reference value of the capacitor to be measured;Sampling amplification module, at least including one charge amplifier and feedback capacitor;The sampling amplification module is connected with the capacitor to be measured and compensation module, for converting the capacitance value of the capacitor to be measured into differential voltage value output, to obtain the capacitance value of the capacitor to be measured.The technical scheme of the embodiment of the present application realizes the operation of single-ended conversion differential with one single-ended circuit.Due to the fact that a pseudo branch can be saved, this structure reduces the area of chip when applied in the scenario of large measured capacitor;And due to the innovation of sampling mode between different working phases, it is realized that the standard value of large measured capacitor can be offset with smaller compensation capacitor.

The invention provides a true rail-to-rail input and output reference voltage buffer circuit suitable for a high-precision ADC (Analog to Digital Converter). When the circuit works, a sampling phase F1 and a holding phase F2 are alternately executed; according to the circuit, a sampling capacitor Cs tracks input reference voltage on a bottom plate of a sampling phase F1, and a top plate is reset to the ground; the level shifting capacitor CLVL synchronously samples the difference value between the input reference voltage and the output common-mode voltage of the transconductance operational amplifier OTA at the sampling phase F1, and is connected to the output end of the transconductance operational amplifier OTA at the holding phase F2, so that the true rail-to-rail range expansion of the output voltage is realized; the charge of the feedback capacitor Cf is not reset at a sampling phase F1, the feedback capacitor Cf is connected with the sampling capacitor Cs in parallel at a holding phase F2, and the establishment of output voltage is realized through charge averaging; the switch network is used for controlling the capacitor connection state of the sampling phase F1 and the holding phase F2. According to the embodiment of the invention, real rail-to-rail input and output and high equivalent input impedance can be realized.

A capacitive sensor detection circuit has a sensor element with a displaceable electrode, a first electrode, and a second electrode. The circuit includes a signal generation circuit that provides a modulated signal to the displaceable electrode. A fully differential amplifier is included, with input terminals connected to the first and second electrodes and output terminals for first and second output signals. The circuit has feedback capacitors between the amplifier's input and output terminals, and capacitors between the electrodes and the amplifier's input terminals. A calculation circuit is included to process the amplifier's output signals. A controller acquires the first and second output signals and, in response, provides a feedback signal. This feedback signal is supplied through the input capacitors, has the same frequency but opposite phase as the modulated signal, and is determined based on the acquired output signals.

The application discloses a capacitive sensing device, a capacitive detection method and an electronic device. The capacitive sensing device comprises a common terminal connected to a sensing electrode, at least one detection module, the detection module comprising an amplifier, a first input terminal of the amplifier being connected to the common terminal, a second input terminal of the amplifier being connected to a fixed potential terminal, and a feedback capacitor being connected between the first input terminal and an output terminal of the amplifier; a compensation module comprising a compensation capacitor, a first terminal of the compensation capacitor being connected to the first input terminal of the amplifier; and a control module for controlling the compensation capacitor and the feedback capacitor to be pre-charged, then controlling the detection module to detect an electrical signal of the common terminal and output a sensing signal in a single detection period. In the detection process, based on the charge transfer of the pre-charging, the effective compensation capacitor value provided by the compensation module is greater than the actual capacitor value of the compensation capacitor. The capacitive sensing device can improve the capacitive compensation multiplication effect.

In a pixel signal processing part, a first input switch and an output switch are turned on and off in phase. When the first input switch and the output switch are ON and the second input switch is OFF, a first auto-zero switch and a second auto-zero switch are kept in the ON state to connect the second node to the reference potential (GND), so that a sampling capacitor, a feedback capacitor, and an auto-zero capacitor are operated in respective operation ranges of the capacitors, and the feedback capacitor is kept constant according to a difference of the input pixel signals, thereby making the output of the amplifier in linear response to the input signal.

The invention relates to a variable gain arrangement of a receiver path configured to receive an input signal and apply a gain to the input signal to provide an output signal, the variable gain arrangement comprising: an input capacitor arrangement comprising a first input capacitor; a feedback capacitor arranged in series with the input capacitor arrangement, where the gain is based on a ratio of the first input capacitor to the feedback capacitor; and a gain switching device configured to provide an adjustment of the gain applied to the input signal by changing the ratio; an amplifier arranged in series with the input capacitor arrangement, the amplifier arranged in parallel with the feedback capacitor, the amplifier configured to provide the output signal; and a transient compensation capacitor arrangement comprising a first transient compensation capacitor wherein, upon the gain change, at least one transient compensation capacitor is immediately configured to be coupled to or decoupled from the feedback capacitor, and wherein at least one transient compensation capacitor is configured to be coupled to or decoupled from the feedback capacitor. Therefore, the transient stability effect caused by the gain change is compensated.

The application discloses a relaxation oscillator based on a switched capacitor array and a peak feedback structure and a stabilizing method, the oscillator comprising a reference source, a switched capacitor array, a peak voltage feedback module, a comparator and a digital logic circuit, the switched capacitor array comprising two symmetric charge-discharge branches, each branch having a main charging capacitor and a tracking holding capacitor, and the peak voltage feedback module being composed of an operational amplifier, a feedback capacitor and a sampling switch. In operation, the capacitor voltage of one branch charged alternately is compared with a dynamic threshold, and the peak voltage on the tracking holding capacitor of the other branch is sampled to the feedback module at the switching moment, the comparator threshold is dynamically adjusted through the integral action, and finally the capacitor peak voltage is locked to the fixed reference voltage, so that the influence of non-ideal factors such as comparator delay on the oscillation period is systematically offset. The application also adopts a chopping comparator to eliminate the offset. The architecture significantly improves the stability of the oscillation frequency to the power supply voltage and temperature, and helps to realize low phase noise, and is suitable for high-precision on-chip clock sources.

The invention provides a capacitance reading circuit, monitoring equipment and electronic equipment. The capacitance reading circuit is used for reading the capacitance value of a capacitance sensor, the capacitance sensor comprises a first pole plate and a second pole plate, the first pole plate is connected to a voltage source, the capacitance reading circuit comprises an operational amplifier, the operational amplifier is provided with an in-phase input end, an inverted input end and an output end, the inverted input end is connected to the second polar plate of the capacitive sensor; the feedback capacitor is connected between the inverted input end and the output end; and the signal acquisition module is connected with the output end of the operational amplifier and is used for acquiring an output signal of the operational amplifier when the pulse excitation signal is applied to the non-inverting input end of the operational amplifier, and the output signal is used for calculating the capacitance value of the capacitive sensor.