53 results about "Feedback capacitor" patented technology

A frequency multiplier includes an oscillator and a harmonic generator. The oscillator has a resonant cavity and a negative resistance unit. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. The harmonic generator is configured to generate a harmonic signal based on a fundamental frequency signal taken as input. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and to output an intrinsic signal with the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal.

The invention provides a high-fidelity neuron circuit based on a full-printed electrochemical transistor, which comprises an amplification unit, a reset OECT, a film capacitor element, a feedback capacitor element, a current input end, a voltage source VDD and a common grounding end GND, and is characterized in that a grid electrode of a first-stage OECT in the amplification unit is connected with one end of the film capacitor element and is connected with the current input end at a connection node; the drain electrode of the first-stage OECT is connected to one end of the corresponding resistor to form a first-stage inverter; an output node is formed at a connection node of the resistor and the drain electrode of the first-stage OECT; the output node is connected with the grid electrode of the next stage of OECT; the source electrode of each stage of OECT is connected with a common grounding end GND, and a voltage source pin VDD is connected with the other ends of the four resistors; one end of the feedback capacitor element is connected to the output node of the last-stage OECT; the grid electrode of the reset transistor is connected with the output node of the last-stage OECT, the source electrode of the reset transistor is connected to the input port of the amplification unit, the structure is remarkably simplified, and large-scale integration is facilitated.

The invention relates to the technical field of communication equipment, and discloses a frequency hopping filter with a hopping transmission zero point, a hopping control method and communication equipment. At least one resonant inductor of an LC resonant circuit of the frequency hopping filter is connected with a radio frequency switch feedback capacitor array in parallel; the frequency of a transmission zero point at a higher harmonic of the frequency hopping filter is controlled by controlling the opening and closing of a channel where each feedback capacitor in the radio frequency switch feedback capacitor array is located, so that the frequency of the transmission zero point changes along with the center frequency of the frequency hopping filter; and finally, far-end suppression, relative bandwidth stability and frequency hopping accuracy in a wide frequency range are improved.

This disclosure discloses a sensing circuit and a source driver including the sensing circuit, which can reduce the impact of panel load on the performance of the integrator and reduce the chip area by eliminating the feedback capacitor of the integrator. The sensing circuit can convert the input current received from the display panel into an output current with linearity and a current quantity less than the input current.

The invention provides a second-order noise shaping SAR ADC circuit and electronic equipment, and the circuit comprises a sampling and quantification module which is used for completing the sampling and quantification of an input signal of an nth conversion period when being controlled by a time sequence, and outputting a digital code and a residual signal; the integral amplifier is connected with the sampling quantization module and is used for accessing the residual signal under the control of a first time sequence signal, integrating the residual signal and storing an integration result in a group of feedback capacitors of the integral amplifier; and the integral amplifier is also used for accessing the voltage stored on the group of feedback capacitors under the control of a second time sequence signal so as to carry out secondary integration, and the output end of the integral amplifier is connected to the input coupling node of the sampling quantization module so as to provide correction voltage participating in the quantization process of the (n + 1) th conversion period. According to the invention, high energy efficiency and high-order noise shaping capability can be considered at the same time.

Logarithm (100) comprehensive an input amplifier (101), a logarithmic component (102), and a feedback capacitor (103) which is designed to stabilize the logarithm (100), characterized by the fact that the logarithm (100) comprises a switching device (110), and the feedback capacitance (103) is divided into a plurality of n partial feedback capacitances (103a, 103b, 103c) connected in parallel, wherein a first partial feedback capacitor (103a) is a permanently stabilizing component of the logarithm converter (100), and wherein a number of n-1 of the n partial feedback capacitors (103a, 103b, 103c) are switchable partial feedback capacitors (103b, 103c), wherein the n-1 partial feedback capacitors (103b, 103c) can be switched on separately as stabilizing components in addition to the first partial feedback capacitor (103a), and where the switching device (110) is configured to individually switch the n-1 switchable partial feedback capacitors (103b, 103c) depending on an input current (I Ph ) of the logarithm (100) to be automatically switched on or off and thus depending on the input current (I Ph ) of the logarithm (100) automatically increases or decreases an effective feedback capacity (103) with which the logarithm (100) is stabilized, wherein the effective feedback capacitance (103) corresponds to a sum of the first partial feedback capacitance (103a) and all switched-on switchable partial feedback capacitances (103b, 103c), and wherein the switching device (110) comprises • at least one reference current source (111, 111a, 111b), • at least one reference transistor (112, 112a, 112b), • at least one switching amplifier (113a, 113b), and • at least one switch (114a, 114b).

The application provides a true rail-to-rail input and output reference voltage buffer circuit suitable for high-precision ADC, which alternately performs a sampling phase F1 and a holding phase F2 during operation; the circuit comprises a sampling capacitor C s During the sampling phase F1, the bottom plate tracks the input reference voltage, and the top plate is reset to the ground; a level shift capacitor C LVL During the sampling phase F1, the difference between the input reference voltage and the output common-mode voltage of a transconductance operational amplifier (OTA) is synchronously sampled, and during the holding phase F2, the output voltage is connected to the output end of the transconductance operational amplifier (OTA), so as to realize the expansion of the true rail-to-rail range of the output voltage; a feedback capacitor C f During the sampling phase F1, the charge is not cleared, and during the holding phase F2, the sampling capacitor C s is connected in parallel, and the output voltage is established through charge averaging; the switch network is used for controlling the connection state of the capacitors in the sampling phase F1 and the holding phase F2. The application embodiment can realize true rail-to-rail input and output and high effective input impedance.

The invention relates to a feed-forward mismatch error shaping successive approximation analog-to-digital converter and a mismatch error shaping method thereof. The analog-to-digital converter comprises a first CDACP module, a first CDACN module, a second CDACP module, a second CDACN module, a four-input dynamic comparator module and a digital logic module. The input ends of the first CDACP module, the first CDACN module, the second CDACP module and the second CDACN module are connected with input voltage, the output ends of the first CDACP module, the first CDACN module, the second CDACP module and the second CDACN module are connected with the input end of the four-input dynamic comparator module, and the output end of the four-input dynamic comparator module is connected with the digital logic module. According to the invention, feed-forward capacitor mismatch error shaping is provided on the basis of traditional feedback capacitor mismatch error shaping, and the method is suitable for a high-precision environment of lower-level board sampling.

The invention belongs to the technical field of amplifiers. The invention provides a floating inverting amplifier circuit with high gain and wide swing. According to the embodiment of the invention, a first-stage amplifier of the multi-layer sleeve type FIA is cascaded with a second-stage amplifier (conventional FIA) serving as an output stage, and the input end and the output end of the output stage are connected through a first feedback network and a second feedback network to form a closed-loop negative feedback form. A feedback resistor and a feedback capacitor are connected in series to serve as a feedback network, and output stages are connected into a closed-loop negative feedback mode, so that the cascade connection stability of the first-stage amplifier and the second-stage amplifier of the multilayer sleeve type FIA can be effectively improved. While the advantages of low power consumption and high energy efficiency of full-dynamic design are kept, the problem that high gain and wide swing design of an existing floating inverting amplifier cannot be achieved at the same time is solved.

The embodiment of the present application relates to a kind of single-ended conversion differential capacitor sampling compensation device and sampling compensation method, the device includes: compensation module, at least including one compensation capacitor;The compensation module is connected with the capacitor to be measured, for compensating the reference value of the capacitor to be measured;Sampling amplification module, at least including one charge amplifier and feedback capacitor;The sampling amplification module is connected with the capacitor to be measured and compensation module, for converting the capacitance value of the capacitor to be measured into differential voltage value output, to obtain the capacitance value of the capacitor to be measured.The technical scheme of the embodiment of the present application realizes the operation of single-ended conversion differential with one single-ended circuit.Due to the fact that a pseudo branch can be saved, this structure reduces the area of chip when applied in the scenario of large measured capacitor;And due to the innovation of sampling mode between different working phases, it is realized that the standard value of large measured capacitor can be offset with smaller compensation capacitor.

A capacitive sensor detection circuit has a sensor element with a displaceable electrode, a first electrode, and a second electrode. The circuit includes a signal generation circuit that provides a modulated signal to the displaceable electrode. A fully differential amplifier is included, with input terminals connected to the first and second electrodes and output terminals for first and second output signals. The circuit has feedback capacitors between the amplifier's input and output terminals, and capacitors between the electrodes and the amplifier's input terminals. A calculation circuit is included to process the amplifier's output signals. A controller acquires the first and second output signals and, in response, provides a feedback signal. This feedback signal is supplied through the input capacitors, has the same frequency but opposite phase as the modulated signal, and is determined based on the acquired output signals.

The application discloses a relaxation oscillator based on a switched capacitor array and a peak feedback structure and a stabilizing method, the oscillator comprising a reference source, a switched capacitor array, a peak voltage feedback module, a comparator and a digital logic circuit, the switched capacitor array comprising two symmetric charge-discharge branches, each branch having a main charging capacitor and a tracking holding capacitor, and the peak voltage feedback module being composed of an operational amplifier, a feedback capacitor and a sampling switch. In operation, the capacitor voltage of one branch charged alternately is compared with a dynamic threshold, and the peak voltage on the tracking holding capacitor of the other branch is sampled to the feedback module at the switching moment, the comparator threshold is dynamically adjusted through the integral action, and finally the capacitor peak voltage is locked to the fixed reference voltage, so that the influence of non-ideal factors such as comparator delay on the oscillation period is systematically offset. The application also adopts a chopping comparator to eliminate the offset. The architecture significantly improves the stability of the oscillation frequency to the power supply voltage and temperature, and helps to realize low phase noise, and is suitable for high-precision on-chip clock sources.

The invention provides a capacitance reading circuit, monitoring equipment and electronic equipment. The capacitance reading circuit is used for reading the capacitance value of a capacitance sensor, the capacitance sensor comprises a first pole plate and a second pole plate, the first pole plate is connected to a voltage source, the capacitance reading circuit comprises an operational amplifier, the operational amplifier is provided with an in-phase input end, an inverted input end and an output end, the inverted input end is connected to the second polar plate of the capacitive sensor; the feedback capacitor is connected between the inverted input end and the output end; and the signal acquisition module is connected with the output end of the operational amplifier and is used for acquiring an output signal of the operational amplifier when the pulse excitation signal is applied to the non-inverting input end of the operational amplifier, and the output signal is used for calculating the capacitance value of the capacitive sensor.

The application belongs to the technical field of electromagnetic interference filtering, and relates to a voltage detection current injection type AEF using weak positive feedback to adjust the capacitance value of Y capacitor, which comprises a Y capacitor capacitance value adjusting circuit and an RC series branch. Y The Y capacitor capacitance value adjusting circuit can effectively adjust the capacitance value, so that a large capacitor is obtained for common mode noise filtering, a small capacitor can be used to obtain the effect of a large capacitor, and common mode electromagnetic interference is better inhibited; the Y capacitor capacitance value adjusting circuit is composed of two to-be-amplified capacitors C Y , two positive feedback resistors, an operational amplifier, a negative feedback capacitor and a negative feedback stabilizing resistor, which are connected in series with the to-be-amplified capacitors, greatly reduce the common mode equivalent impedance, build a low impedance loop for electromagnetic interference, so as to inhibit the conduction of electromagnetic interference; meanwhile, the capacitance value can be accurately adjusted, and the flexibility is large; the RC series branch comprises a resistor and a capacitor, which couple the output voltage of the operational amplifier with the bus, so as to convert the voltage into current compensation, and further improve the common mode filtering effect.

Disclosed is a MEMS device, comprising: a movable electrode plate; a first electrode plate and a first feedback electrode plate located on a first side of the movable electrode plate; a second electrode plate and a second feedback electrode plate located on a second side of the movable electrode plate. The first electrode plate, the first feedback electrode plate, the second electrode plate, the second feedback electrode plate respectively form a first capacitor, a first feedback capacitor, a second capacitor and a second feedback capacitor with the movable electrode plate. The first and the second capacitors are coupled to a detection circuit for performing differential detection on the first and the second capacitors; the first feedback capacitor and the second feedback capacitor are coupled to a feedback circuit for eliminating nonlinear relationship between an output voltage of the detection circuit and a displacement of the movable electrode plate.

The invention relates to a piezoelectric measuring device having a sensor element for generating a measurement signal for a pressure to be measured and a conductor element for conducting the measurement signal to a data detection device which detects and analyses the conducted measurement signal; the sensor element includes: an operational amplifier having an inverting input terminal and an output terminal; the feedback capacitor is arranged in parallel with the inverting input end and the inverting output end of the operational amplifier; the reset switch element is arranged in parallel with the inverting input end and the inverting output end of the operational amplifier; the data detection device is configured to supply a supply voltage to the sensor element, the data detection device having a measurement period circuit configured to switch on the supply voltage of the sensor element before the start of a measurement period and to switch off after the end of the measurement period; and the sensor element has a power-on reset logic configured to detect the presence of the supply voltage and, in the presence of the supply voltage, close and open the reset switching element again before the start of the measurement period.

The ultra-high precision analog-to-digital converter (ADC) sampling thermal noise cancellation circuit provided by this invention includes: a lower plate sampling network and an amplifier circuit; the amplifier circuit includes a first reset unit, a second reset unit, a noise decoupling unit, a charge distribution adjustment unit, a feedback path control unit, and an operational amplifier U1; the noise decoupling unit is used to decouple the operational amplifier thermal noise and sampling thermal noise according to the change of the input signal of the lower plate sampling network after the feedback path is disconnected; the second reset unit is used to change the charge at the input terminal of the amplifier circuit according to the change of the input signal of the lower plate sampling network after the feedback path is disconnected, so as to achieve the effect of noise cancellation. By changing the configuration of the operational amplifier feedback capacitor, the sampling thermal noise and operational amplifier thermal noise are suppressed, thereby improving the thermal noise performance of the ultra-high precision analog-to-digital converter sampling thermal noise cancellation circuit.

This invention provides a non-contact voltage detection device and method. The device includes a detection electrode, a feedback capacitor, an operational amplifier, a differential amplifier module, and a control module. The detection electrode is electrically connected to the inverting input of the operational amplifier to sense the AC voltage signal to be measured on the electric field line under test and output the induced AC voltage signal to the operational amplifier. The operational amplifier is used to differentially couple the induced AC voltage signal and a reference AC voltage signal based on the feedback capacitor and output a coupled AC voltage signal. The differential amplifier module is used to differentially amplify the coupled AC voltage signal and the reference AC voltage signal and output an amplified AC voltage signal. The control module is used to determine the AC voltage signal to be measured based on the amplified AC voltage signal and the reference AC voltage signal. This not only achieves the purpose of non-contact voltage detection but also further eliminates the influence of the coupling capacitor formed by the detection electrode and the electric field line under test on the signal frequency, thus improving the detection effect.

The present invention is a Class-D amplifier including: a capacitively-coupled amplifier, configured to receive an input signal and a feedback signal and generate an error signal; and a loop filter, coupled to input capacitor and the feedback capacitor, configured to generate a processed signal according to the error signal; and a pulse-width modulation (PWM) generator, coupled to the loop filter, configured to generate a plurality of PWM signals according to the processed signal and a control signal; and a voltage boosting power stage, coupled to the PWM generator, configured to generate a boosted output signal according to the plurality of PWM signals, the control signal and a power supply, and to feedback the boosted output signal to the loop filter, wherein the maximum voltage of the boosted output signal is greater than the voltage of the power supply.

A microelectromechanical systems (MEMS) sensor, a capacitive MEMS motor sensing circuit and a method are provided. The present application provides a microelectromechanical systems (MEMS) sensor. The MEMS sensor includes a housing having electrical contacts disposed on an exterior of the housing. The MEMS sensor further includes a capacitive MEMS motor disposed in the housing, and an electrical circuit disposed in the housing and being electrically coupled to the electrical contacts. The electrical circuit includes a bias voltage source having an output coupled to an input of the MEMS motor. The electrical circuit further includes a buffer circuit including an amplifier input stage having an input coupled to an output of the MEMS motor. The electrical circuit still further includes a frequency dependent input attenuator including a feedback capacitor and an input attenuator low pass filter, the input attenuator low pass filter having an input coupled to the output of the amplifier input stage and an output coupled to a first terminal of the feedback capacitor, where a second terminal of the feedback capacitor is coupled to the input of the amplifier input stage.

The present disclosure relates to a low-power-consumption feedback apparatus insensitive to clock jitter and for a continuous-time delta-sigma analog-to-digital converter, and an electronic device. In the analog-to-digital converter, a control module is used for controlling, on the basis of a received timing control signal and a quantization signal which is output by a quantizer, a feedback capacitor module to periodically execute a charging operation and a feedback operation, wherein during the charging operation, the control module controls a capacitor in the feedback capacitor module to disconnect from an integrating capacitor, and to charge the feedback capacitor module; and during the feedback operation, the control module controls the capacitor in the feedback capacitor module to connect in parallel to the integrating capacitor, and the feedback capacitor module and the integrating capacitor share charges, so as to complete the feedback operation. The embodiments of the present disclosure can reduce the power consumption of an amplifier, thereby reducing the power consumption of the analog-to-digital converter and improving the energy efficiency.

Amplifier with programmable gain (“PGA”) (100), comprising: a differential amplifier (A1) with one input pair (102, 104) and one output pair (106, 108), a pair of input capacitors (C IN , C IP ) with output terminals, each connected to inputs (102, 104) of the differential amplifier (A1), a pair of feedback capacitors (C FN , C FP ), which are each connected between the outputs of the differential amplifier (A1) and corresponding inputs of the differential amplifier (A1), a first chopper circuit (110) which is configured to connect the input capacitors (C IN , C IP ) to connect to the corresponding input terminals of the PGA (100), a second chopper circuit (120) configured to connect the output terminals (106, 108) of the differential amplifier (A1) to corresponding output terminals (VON, VOP) of the PGA (100), a first voltage source (V ICM ), which is configured to be connected to input terminals (102, 104) of the differential amplifier (A1) via corresponding sample switches, the corresponding sample switches being configured to close in response to a first control signal (CO) and the first voltage source (V ICM ) has a voltage that is set to a common-mode voltage of the differential amplifier (A1), and wherein the amplifier (A1) provides a second voltage source (V CMA ) which is configured with input terminals of the input capacitors (C IN , C IP) to be connected via appropriate scanning switches, the appropriate scanning switches being configured to close in response to a second control signal (COB) and the second voltage source (V CMA ) has a voltage that is set to a common-mode signal of signals to be input into the PGA (100).

The embodiments of this disclosure relate to a capacitance sensing device and a capacitance sensing method. The capacitance sensing device includes a switching circuit system, a counter circuit, a comparator circuit, an amplifier circuit including a first input terminal, a second input terminal, and an output terminal, and a feedback capacitor. The feedback capacitor is coupled between the first input terminal and the output terminal of the amplifier circuit, and the first input terminal is coupled to the capacitor under test. The switching circuit system transmits a first voltage to the second input terminal and couples the first input terminal to the output terminal in a first stage, transmits a second voltage to the second input terminal in a second stage, and adjusts the output voltage at the output terminal in a third stage. The counter circuit starts counting in the third stage and stops counting according to a control signal to generate a count value that reflects the capacitance change of the capacitor under test. The comparator circuit generates a control signal in the third stage based on the output voltage and the second reference voltage.

Delta-sigma modulators and converters with low power consumption and high resolution. [Solution] A delta-sigma modulator is provided, comprising: a first switched capacitor circuit provided between an input terminal and an analog amplifier and including a first capacitor; a feedback capacitor provided as a feedback circuit for the analog amplifier; and a second switched capacitor circuit provided in parallel with the feedback capacitor and including a second capacitor; a first operating mode for controlling the second switched capacitor circuit so that the second capacitor is connected in parallel with the feedback capacitor while the first switched capacitor circuit is in switching operation; and a second operating mode for synchronously controlling the first switched capacitor circuit and the second switched capacitor circuit.

The invention relates to the technical field of integrated circuit design, and particularly discloses an amplifier kickback prevention circuit and method.The amplifier kickback prevention circuit comprises a kickback prevention OR gate, the input end of the kickback prevention OR gate is electrically connected with a chopping phase signal of an amplifier; a polar plate on one side of each anti-kickback capacitor is electrically connected with the output end of the anti-kickback OR gate, a polar plate on the other side of each anti-kickback capacitor is electrically connected with a polar plate on one side of one feedback capacitor in the pair of feedback capacitors of the amplifier, and the polar plate on one side of the feedback capacitor is a polar plate electrically connected with a feedback chopper switch of the amplifier. According to the anti-kickback circuit provided by the invention, the common-mode voltage of the capacitance amplifier can be almost kept unchanged at different phases, and the kickback of the input signal is obviously improved, so that the quality of the sampling signal is greatly improved.

The application provides a readout circuit, comprising a gain amplifier, an analog-digital converter and a gain amplification adjustment unit, the gain amplifier comprises a transconductance amplifier, a sampling capacitor and a feedback capacitor adjustable unit, the analog-digital converter comprises a comparator and a counter module, the gain amplification adjustment unit adjusts the capacitance of the feedback capacitor adjustable unit according to the output signal of the comparator, adjusts the gain of the gain amplifier, and outputs the adjustment result signal of the feedback capacitor adjustable unit to the counter module, the counter module is used for counting the output signal of the comparator to obtain an initial digital signal, and obtaining a gain multiple according to the adjustment result signal, then performing a multiplication logical operation on the initial digital signal and the gain multiple to output a result digital signal, and the range of signal reading is improved. The application further provides an image sensor.

A crystal oscillator includes a first PMOS (p-channel metal-oxide semiconductor) transistor having its gate, source, and drain terminals connected to a gate node, a source node, and a drain node, respectively; a DC (direct current) coupling network configured to couple the gate node to a first bias node; a NMOS (n-channel metal-oxide semiconductor) transistor having its gate, source, and drain terminals connected to a second bias node, a ground node, and the drain node, respectively; a second PMOS transistor having its gate, source, and drain terminals connected to the drain node, a power supply node, and the source node, respectively; a feedback capacitor positioned between the source node and the gate node; a shunt capacitor positioned between the source node and one of the power supply node and the ground node; and a crystal positioned between the gate node and one of the ground node and the power supply node.

In at least one example, a circuit includes an amplifier, a first feedback loop, and a second feedback loop. The amplifier includes an amplifier input and an amplifier output. The first feedback loop includes a first feedback capacitor and a first switch. The first feedback loop is coupled between the amplifier input and the amplifier output. The first feedback capacitor is coupled to the amplifier output through the first switch. The second feedback loop includes a second feedback capacitor and a second switch. The second feedback loop is coupled in parallel with the first feedback loop between the amplifier input and the amplifier output. The second feedback capacitor is coupled to the amplifier input and to the first feedback capacitor through the second switch.

The application discloses a pixel driving circuit and a display device, wherein the pixel driving circuit comprises a driving switch, a liquid crystal capacitor, a feedback capacitor and a pressure detection module; the control end of the driving switch is connected with a scanning line; the first end of the driving switch is connected with a data line; the first end of the liquid crystal capacitor is connected with the second end of the driving switch; the second end of the liquid crystal capacitor is connected with a common electrode end; the first end of the feedback capacitor is connected with the first end of the liquid crystal capacitor; the input end of the pressure detection module is connected with the data line; the output end of the pressure detection module is connected with the second end of the feedback capacitor; the pressure detection module is configured to detect pressure and output a second signal according to the pressure detection result and a first signal of the data line; the polarity of the second signal is opposite to that of the first signal, and the voltage value of the second signal is positively correlated with the pressure detection result. In the above manner, the influence of external pressure on the display effect of the real panel can be reduced.

The utility model relates to radio frequency power tuning equipment technical field especially relates to a kind of joint structure for radio frequency matcher, including bottom shell, motor installed in bottom shell, D hole brass shaft sleeve, slit type four fluorine shaft coupling, air capacitor and angle detection component. The D shaft of motor is cooperated with sleeve hole shaft and is locked by tight screw, sleeve and four fluorine shaft coupling are connected by bolt, the other end of shaft coupling and air capacitor rotating shaft are connected by bolt;Elastic section is formed by circumferential slit of shaft coupling, and flexible compensation and high-frequency insulation are provided. Motor shaft end gear and potentiometer gear mesh, potentiometer real-time feedback capacitor shaft angle, realize closed-loop tuning. The structure reduces assembly coaxiality requirement, improves matcher tuning accuracy and reliability, and is convenient to assemble, disassemble and maintain.