This disclosure relates to the field of
USB 2.0 protocol implementation, specifically to a
state management circuit architecture for a
USB device, comprising: a state detection unit, configured to receive and determine a state
signal based on a differential
signal pair, and determine the target state of the
USB based on the state
signal; the differential signal pair includes a differential signal D+ and a differential signal D-; the state signal is any one of SE0, J, and K; the target state is any one of a suspended state, a wake-up state, a reset state, a general working state, and a wake-up request state; a high-speed
handshake unit, configured to control the USB to perform high-speed
handshake detection after the reset state, and to close the high-speed
handshake unit after the high-speed handshake detection, so that the USB re-enters the general working state; and a state transition
control unit, configured to manage the current state of the USB and transition the current state of the USB to the target state.