283 results about "Reconfigurability" patented technology

The Wireless Integrated Network Sensor Next Generation (WINS NG) nodes provide distributed network and Internet access to sensors, controls, and processors that are deeply embedded in equipment, facilities, and the environment. The WINS NG network is a new monitoring and control capability for applications in transportation, manufacturing, health care, environmental monitoring, and safety and security. The WINS NG nodes combine microsensor technology, low power distributed signal processing, low power computation, and low power, low cost wireless and/or wired networking capability in a compact system. The WINS NG networks provide sensing, local control, remote reconfigurability, and embedded intelligent systems in structures, materials, and environments.

Disclosed are what I call “Reconfigurable Tactile Control Displays” particularly suited for applications such as automobile instrument panels where large displays and controls are desirable to provide a wide range of information, with minimal driver distraction and the safe input of data to vehicle subsystems or for communication based activities. Preferred embodiments utilize rear projection displays with electro-optically sensed controls and offer, at low cost, a maximum of reconfigurability to different car lines, drivers, and tasks. Also disclosed are novel implementations for military vehicles, and other applications such as control of appliances, heating and other household functions which may share common control and display presentation with those used in the vehicle.

In an exemplary embodiment, a phased array antenna comprises a bidirectional antenna polarizer and is configured for bidirectional operation. The bidirectional antenna polarizer may combine active implementations of power splitters, power combiners, and phase shifters. Furthermore, in another exemplary embodiment a bidirectional antenna polarizer has extensive system flexibility and field reconfigurability. In yet another exemplary embodiment, the bidirectional phased array antenna operates in “radar-like” applications where the transmit and receive functions operate in half-duplex fashion. Furthermore, in exemplary embodiments, the phased array antenna is configured to operate over multiple frequency bands and/or multiple polarizations.

Systems and methods described herein are directed to solutions for Network on Chip (NoC) interconnects that supports reconfigurability to support a variety of different traffic profiles each having different sets of traffic flows after the NoC is designed and deployed in a SoC. Reconfiguration of the NoC to map and load a new traffic profile or change the currently mapped traffic profile is performed by an external optimization module which maps various transactions of a given traffic profile to the NoC and reconfigure the NoC hardware by loading the computed mapping information. As part of the mapping process, load balancing between NoC layers may be performed by automatically assigning the transactions in the traffic profile to be routed over certain NoC layers and channels, automatically determining the routes based on the bandwidth requirements of the transaction. The deadlock avoidance and isolation properties of various transactions are maintained during the mapping.

A methodology and related system apparatus is provided for using and coordinating the use of information conveyed over communications to most efficiently and flexibly respond to abnormalities to reconfigure and restore service to end customers in commodity distribution systems in a manner to enhance the reconfigurability of the distribution system, e.g. circuit reconfiguration in an electrical power distribution system. Methodology is also provided to appropriately allocate system resources of the distribution system when so desired, e.g. to prevent the potential overloading of electrical power sources. In one illustrative arrangement, the methodology is characterized by resources at each node and communications of source allocation data or messages to other nodes to request and establish an appropriate allocation of system resources. In a preferred arrangement and especially useful for larger distribution systems, “teams” of nodes are defined in the distribution system having associated switching controls with the various teams communicating amongst each other to “negotiate” or work out the most efficient and expeditious reconfiguration of the system in response to fault conditions and other circuit abnormalities.

The reconfigurable ultrasound array disclosed herein is one that allows groups of subelements to be connected together dynamically so that the shape of the resulting element can be made to match the shape of the wave front. This can lead to improved performance and/or reduced channel count. Reconfigurability can be achieved using a switching network. A methodology and an algorithm are disclosed that allows the performance of this switching network to be improved by properly choosing the configuration of the switching network.

A reconfigurable linear array of sensors (e.g., optical, thermal, pressure, ultrasonic). The reconfigurability allows the size and spacing of the sensor elements to be a function of the distance from the beam center. This feature improves performance for imaging systems having a limited channel count. The improved performance, for applications in which multiple transmit focal zones are employed, arises from the ability to adjust the aperture for a particular depth.

The invention relates to optoelectronic modules for generating and/or receiving optical signals for use in fiber-optic communication systems, such as optical transponders or transceivers, having a reconfigurable control and status (C&S) interface with a host device. The optoelectronic module includes an electrical multi-pin host connector having a plurality of pins for communicating a plurality of digital C&S signals between the host and the module, functional hardware responsive to the digital control signals and comprising sensing means for generating digital status signals, and processing means formed by an FPGA and a processor for processing the digital C&S signals. The FPGA is disposed in communications paths between the host connector on one side, and the functional hardware and the processor on the other side, and programmed for routing each of the discrete C&S signals between the C&S pins of the host connector and the processor, and between the C&S pins and the functional hardware, thereby providing reconfigurability of said routing by downloading a different set of FPGA instructions.

The invention discloses a radio frequency front end device of a receiver and a signal receiving method thereof and belongs to the field of radio communication and satellite positioning and navigation. The device comprises two mutually-independent and parallel signal channels. Each signal channel is connected as follows: a low noise amplifier, a surface acoustic wave filter, a radio amplifier, a quadrature output down-converter, a correction buffer and a multi-mode filter are connected in series; the output end of the multi-mode filter is connected with the input end of a controllable gain amplifier; the output end of the controllable gain amplifier is respectively connected with the input end of an automatic gain controller and the input end of a multi-mode analogue/digital converter; and the output end of the automatic gain controller is connected with a gain control end of the controllable gain amplifier. The invention has the advantages as follows: the radio frequency front end device has system-level and module-level reconfigurability, supports all kinds of the traditional global positioning systems to be the maximum and greatly improves the flexibility of use for users. The radio frequency front end device has strong robustness.

The invention provides a method of realizing a software communications architecture (SCA) on an embedded platform, comprising the following steps of: by using a CORBA (Common Object Request Broker Architecture) middleware as a software bus and using an XML (Extensible Markup Language) document as an information middleware, constructing framework software on the embedded platform of a Power PC (Personal Computer) and a DSP (Digital Signal Processor); by using a component engine (CE) to assist a tool developed by the SCA, carrying out software modeling and hardware modeling on the system; encoding IDL (Interface Define Language) codes of a core framework by using a CORBA encoder to generate a pile document and a framework document, of an interface for realizing a servo class of the framework interface; generating an XML domain description document for an application model and a platform model of the system by using the CE software; improving and extending a CE code generator, compiling a code template of a device and a component program framework to realize a component program and a device program; and running the component program and the device program on different nodes to test the correctness of a waveform function. Therefore, the communication system software developed by using the architecture provided by the invention has interoperability, reconfigurability, updatability, reusability and transportability.

The invention provides a processor system, as well as a multi-channel memory copying DMA (direct memory access) accelerator and a method thereof. The processor system comprises a multi-channel direct memory access (DMA) accelerator connected between a processor core and a memory through a data bus, and the multi-channel DMA accelerator is used for judging and decomposing task information of a data reading and writing request according to the task information of the data reading and writing request when the processor core emits the data reading and writing request of a memory copying command, controlling a plurality of reading and writing channels to emit the multiple reading and writing requests to the memory in parallel according to the task information of the data reading and writing request after decomposition, the reading and writing frequencies and the priorities of the plurality of the reading and writing channels in the task information and values of marker bits of the reading and writing channels, and further completing data reading and writing. The processor system has the advantages of high bandwidth, low latency, high degree of parallelism, reconfigurability and platform independence.

The invention relates to the technical field of radar circuit fault detection and diagnosis, specifically to a radar signal unit performance test and fault diagnosis system based on a general test platform. The system comprises a general test platform, a test procedure set, an interface connection module, an interface test adapter and a signal processing unit to be tested, the general test platform includes general test instruments and hardware resources including a test procedure set, a programmable power supply, a spectrometer, a signal generator, a digital oscilloscope, a digital triple-purpose meter, a digital I/O, a communication interface, a multichannel ADC and a multichannel DAC, and the test platform is connected with the interface test adapter through the interface connection module. By adoption of a system architecture of the general test platform plus the interface test adapter, the system has very strong universality and expandability, allows multiple equipment to share one test platform, and the interface test adapter adopts a hardware architecture of FPGA+ARM, and has very strong universality, expansibility and reconfigurability.

The invention discloses a system and a method for achieving network reconfigurability of a mixed WDM (Wavelength Division Multiplexing)/TDM (Time Division Multiplexing) PON (Passive Optical Network). In the system, one optical line terminal is adopted and is sequentially connected with n remote end nodes through double fiber feeder lines, and all remote end nodes are respectively connected with m optical network units by using a shunt through distributed optical fibers; wherein each remote end node adopts one reconfigurable optical add/drop multiplexer based on a wavelength blocker and a tunable optical filter technology so as to realize the function of reconfiguring a network downlink signal wavelength resource, the reconfiguration of an uplink is realized by utilizing a wavelength re-modulation technology based on a reflection type semiconductor optical amplifier, and meanwhile, the system can improve the network reconfiguration property when confronting certain optical fiber faults. The method ensures that in the network, the wavelength resource of the network can be flexibly reconfigured according to changing bandwidth requirements, and meanwhile, the reconfiguration capability of the mixed PON on confronting emergencies can be realized by using one backup feeder line optical fiber loop and a series of switch transformation, thereby ensuring the network to be with better reliability.

The invention discloses a vector floating point operation device and method. The vector floating point operation device comprises N scalar operational units, an instruction decoding unit, a data distribution unit, a result collection unit and a bit zone updating logic unit, wherein the N can be determined according to a design and can be used for supporting a plurality of operations of vector-vector and vector-scalar. The vector floating point operation device and method provided by the invention have the advantages of simple and efficient design, good expansibility and reconfigurability, high parallelism and the like.

A field programmable filter array with high spectral isolation and reconfigurability. A bank of resonators can be programmed at will and on the fly to give any type of filtering response. The order, type and bandwidth of the filter are electronically reconfigured. Each subset of resonators can switch between bandstop and bandpass configurations and form custom filter shapes consisting of combinations of bandstop and bandpass filters. The filter can include a unit cell of a resonator with a series of switches to enable coupling to any of its nearest neighbors. The path in which the flow of energy takes through the array of resonators is dynamic, and the filtering function which is created is dialable on demand.