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Vector floating point operation device and method

A floating-point operation and floating-point operation unit technology, applied in computing, program control design, instruments, etc., can solve problems such as asynchronous, and achieve high parallelism, good scalability and reconfigurability, and simple and efficient design. Effect

Active Publication Date: 2012-06-13
上海思朗科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This technology supports asynchronous processing, so the calculation results may be out of sync, so a complex arbitration mechanism needs to be designed to avoid deadlocks

Method used

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  • Vector floating point operation device and method
  • Vector floating point operation device and method

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Embodiment Construction

[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings. Those skilled in the art can use this embodiment and other embodiments to make changes without departing from the scope of the present invention. Therefore, the following description is not limiting, and the scope of the invention is defined by the appended claims.

[0029] The device of the present invention includes: N scalar operation units, instruction decoding unit, data distribution unit, result collection unit and calculation state flag update unit, wherein N is a natural number greater than 1, and its size can be determined according to the design, with a height of Reconfigurability can generally be 4, 8, 16 or 32, etc. In the embodiment in the specific implementation manner, N=16 is taken, and a 512-bit vector flo...

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Abstract

The invention discloses a vector floating point operation device and method. The vector floating point operation device comprises N scalar operational units, an instruction decoding unit, a data distribution unit, a result collection unit and a bit zone updating logic unit, wherein the N can be determined according to a design and can be used for supporting a plurality of operations of vector-vector and vector-scalar. The vector floating point operation device and method provided by the invention have the advantages of simple and efficient design, good expansibility and reconfigurability, high parallelism and the like.

Description

technical field [0001] The present invention relates to the technical field of floating-point calculation in a microprocessor, relates to the addition / subtraction operation path of a vector floating-point component of a microprocessor and the processing of related operations, to be precise, relates to a vector floating-point calculation device and method. Background technique [0002] The main purpose of computer development is to meet the needs of large-scale scientific computing. With the increasing demand for computer performance in scientific computing, computer technology has also developed rapidly. Vector operations play a very important role in digital signal algorithms. Traditional processors implement a large number of vector operations in modern signal processing algorithms through scalar operations. Since the main frequency of the chip has reached the limit, it is difficult for the single-core processor with scalar as the calculation unit to meet the performance ...

Claims

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Application Information

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IPC IPC(8): G06F9/302G06F7/57
CPCG06F9/30036
Inventor 王东琳王惠娟张志伟
Owner 上海思朗科技有限公司
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