Processor system, as well as multi-channel memory copying DMA accelerator and method thereof

Abstract

The invention provides a processor system, as well as a multi-channel memory copying DMA (direct memory access) accelerator and a method thereof. The processor system comprises a multi-channel direct memory access (DMA) accelerator connected between a processor core and a memory through a data bus, and the multi-channel DMA accelerator is used for judging and decomposing task information of a data reading and writing request according to the task information of the data reading and writing request when the processor core emits the data reading and writing request of a memory copying command, controlling a plurality of reading and writing channels to emit the multiple reading and writing requests to the memory in parallel according to the task information of the data reading and writing request after decomposition, the reading and writing frequencies and the priorities of the plurality of the reading and writing channels in the task information and values of marker bits of the reading and writing channels, and further completing data reading and writing. The processor system has the advantages of high bandwidth, low latency, high degree of parallelism, reconfigurability and platform independence.

Description

technical field [0001] The present invention relates to the technical field of computer hardware architecture and processor design, in particular to a processor system based on processor embedded multi-channel direct memory access (Direct Memory Access, DMA) that supports asynchronous memory access and parallel memory read and write. Its multi-channel memory copy DMA accelerator and method. Background technique [0002] In existing computer systems, memory copy (Memory Copy) is an important operation for transferring data between different locations in memory. It widely exists in operating systems and various application programs. Relevant studies have found that memory copy operations can account for 20%-40% of the total time overhead in TCP / IP protocol processing. In the operating system, the memory copy operation realizes its function through the standard system functions memcpy and bcopy defined by the system kernel. For different computer architectures, the specific i...

AI Technical Summary

Problems solved by technology

[0007] (1) Low system efficiency

The existing technology still needs the processor to execute relevant memory access and control instructions when performing memory copy, resulting in the processor being unable to perform other operations during the entire copy process, which is essentially a serial synchronous memory copy controlled by the processor

[0008] (2) Copy speed is slow

The processor in the prior art generally integrates 1-2 memory access components, and only after the current memory access instruction is completed can the subsequent memory access instruction be executed. Therefore, the existing memory copy method is only a serial access to the memory on a micro level, and cannot Unrelated memory read and write operations are performed at the same time, resulting in slow copy speed

[0009] (3) Does not have universal compatibility

This method is closely related to the processor structure and program instruction set, and the optimized memory copy programs under different architectures are not compatible with each other.

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