75 results about "Memory copy" patented technology

The present application belongs to the technical field of data processing and relates to a network message processing method and apparatus, and a computer device and a storage medium. The method comprises: on the basis of a received target network message, acquiring a target memory block from a pre-constructed shared memory pool, so as to generate a message memory; on the basis of a network-interface-card driver, performing first identification processing on the target network message, so as to obtain a target network message descriptor; on the basis of the target network message descriptor, performing second identification processing on the message memory, so as to obtain a first socket buffer; and performing parsing processing on the first socket buffer by means of a network protocol stack, and on the basis of a parsing processing result, reading network message data from a virtual memory corresponding to the message memory, so as to complete the processing of the network message. In the present application, on the basis of a constructed shared memory pool, zero-copy network packet reception can be realized during network message processing, thereby avoiding performance loss caused by the memory copy of messages.

The invention provides a memory page exchange method and system for a microkernel operating system. The memory page exchange method comprises the following steps: step 1, running an exchange page management system service in a user mode of the microkernel operating system; step 2, providing data encapsulation and transmission for communication between user state system services; 3, generating an exchange page identifier, and registering a virtual address area used for transmitting data, a data buffer area and a thread for processing a missing page error to the kernel; 4, when the page is swapped out, the kernel modifies the service page table of the swap page management system, and the physical page needing to be swapped out is mapped; 5, when the page is swapped in, according to the swap page identifier obtained from the page table when the missing page error is triggered, the specified page data content is read from the swap area to the data buffer area; and step 6, packaging each interface of the exchange page management service. According to the invention, by utilizing the page table mapping, the memory copying times in the exchange process under the microkernel architecture are effectively reduced, and the operation efficiency of the exchange system is improved.

This document describes techniques and apparatuses directed at accelerating quantum-resistant, cryptographic hash-based signature computations. Upon receipt of an input message, one or more processors implements a hash manager. The hash manager is configured to initialize variables, load the input message and initialized variables into an input buffer, and execute a hash-based signature computation. The hash-based signature computation is repeated for a predetermined number of iterations with each iteration involving loading at least a portion of a digest message directly into a configurable position in the input buffer. In so doing, this method of iterative hash computation bypasses memory copies and bus latencies, accelerating quantum-resistant, cryptographic hash-based signature computations.

The invention relates to a satellite-ground collaborative carbon sink monitoring method based on multi-core heterogeneous acceleration. The satellite-ground collaborative carbon sink monitoring method comprises the steps that ground multi-source time sequence data and satellite multi-spectral images are collected to form satellite-ground data; the method comprises the following steps: preprocessing satellite-ground data to generate a C-Frame tensor with a self-description frame header; a collaborative flow adaptive bridge C-FAB framework is established and used for directly mapping a C-Frame tensor to edge ai equipment, and traditional multiple times of memory copying are avoided; according to the method, a DS-LUE model is established in edge ai equipment, a carbon sink result of an area needing to be calculated is generated through the DS-LUE model, and rapid and accurate carbon sink estimation and dynamic monitoring are realized in a low-power-consumption and high-throughput edge calculation environment by fusing satellite multispectral images with ground humidity, soil and vegetation sensing data. And the method supports the cooperative operation of complex remote sensing processing tasks among different computing resources, and significantly improves the performance and adaptability of remote sensing data processing.

The invention provides a GPU (Graphics Processing Unit) calculation method for computational fluid mechanics simulation. The GPU calculation method comprises the following steps: building a hybrid programming framework based on a CPU / GPU heterogeneous system; an OpenFOAM-GPU data structure is established; chemical calculation is migrated to the GPU; migrating the thermal physical quantity calculation task from the CPU to the GPU for execution; memory copy logic is improved, and the data exchange frequency between a GPU memory and a CPU in the calculation process is reduced; a two-dimensional array structure originally used on a CPU is reconstructed into a one-dimensional array structure suitable for GPU parallel computing; the problem that a numerical simulation method needs to consume a large number of computing resources due to the fact that the parallel efficiency is not high and the data communication problem between the CPU and the GPU is solved, the number of communication times between the CPU and the GPU is reduced, the communication cost is reduced, and the parallel computing efficiency and the data throughput are improved.

The invention discloses a data transmission optimization method and system in hybrid deployment of a real-time system and a non-real-time system based on Jailhouse, belongs to the technical field of data transmission, and solves the problems of low data transmission efficiency, high copy overhead, lack of universality of interfaces and the like in an existing system. Comprising the steps that a hybrid deployment platform including a real-time system and a non-real-time system is built on a multi-core processor platform, and the hybrid deployment platform runs in an isolation environment of a Jailhouse partition manager; building an abstract transmission interface layer as a unified channel for accessing a shared memory by a real-time system and a non-real-time system; establishing a plurality of shared memory channels in the abstract transmission interface layer and scheduling according to the priority of tasks; establishing a data transmission path, and compressing a memory copy operation into one time by adopting a memory mapping multiplexing technology and a DMA (Direct Memory Access) collaboration mechanism; and a cache consistency maintenance technology is adopted, so that the data consistency is ensured, and the optimization of data transmission is completed. The method is suitable for application scenes such as industrial automation, intelligent connected automobiles and edge calculation.

A computer-implemented system for routing artificial intelligence (AI) queries. The system utilizes a zero-copy data pipeline, which processes prompts in memory-mapped buffers to eliminate at least one memory copy operation, thereby reducing latency relative to conventional serialization pipelines. The system continuously verifies AI provider compliance by injecting synthetic prompts containing invisible, Ed25519-signed Unicode watermarks. Algorithmic bias is detected by generating counterfactual “digital twin” prompts and applying Fisher exact statistical testing.Routing decisions for multi-tier autonomous systems are governed by safety-level requirements (ASIL-D, ASIL-B, QM) and may be constrained by external routing directives received via a meta-identifier. A hash-chained manifest, cryptographically signed using Ed25519 and consumed by downstream gateways, is generated for each routing decision, with its Merkle root asynchronously anchored to a blockchain to create a tamper-evident audit trail for regulatory compliance.

The invention discloses an accelerator card resource sharing system, method and device and electronic equipment, and relates to the technical field of accelerator cards, the system comprises an address mapping module and a memory copying engine module, the address mapping module is used for receiving an access request of an accelerator card video memory of a source host, querying a mapping relation of virtual addresses in a dynamic mapping table and copying the virtual addresses to the source host; the memory copy engine module generates target label information for identifying a target data packet transmitted across hosts, the dynamic mapping table reflects a mapping relation between a source host virtual address and a target host accelerator card physical address, and the memory copy engine module copies the target data packet according to the transmission priority and sequence information of the target data packet contained in the target label information. And executing cross-host data transmission to ensure that the data is efficiently transmitted to an accelerator card video memory of a target host. According to the embodiment of the invention, the problems of relatively high delay and insufficient flexibility in coping with the complex demand of acceleration card cluster sharing in the prior art are effectively solved.

The invention relates to the technical field of program loading and memory management, and provides a method and equipment for creating an executable program code segment read-only file mapping memory copy, and the method comprises the steps: in a system of an NUMA architecture, when a process is executed on a certain NUMA node, mapping a code segment in a read-write mode; traversing all pages mapped by the code segment, reading one byte from each page and writing back the byte, triggering a missing page processing flow, and completing the distribution of the code segment memory copy of the process; and carrying out locking and authority control on the code segment memory copy through system calling. According to the method and equipment for creating the executable program code segment read-only file mapping memory copy, the execution performance of the program under the NUMA architecture is remarkably improved through an innovative process level code segment copy scheme and a flexible implementation mode.

The invention relates to the technical field of artificial intelligence, and provides a fusion operator execution method, electronic equipment, a storage medium and a program product, and the method comprises the steps: determining a plurality of to-be-fused target operators; according to the tensors of the multiple target operators, a pseudo address mapping table is generated, and the pseudo address mapping table is used for recording the mapping relation between the actual memory addresses of the tensors and pseudo addresses; operator fusion is carried out on the multiple target operators, a fusion operator is obtained, and the memory address of the tensor of the fusion operator is a continuous pseudo address; and executing the fusion operator, converting the pseudo address into an actual memory address according to the pseudo address mapping table in the execution process, and accessing data of the tensor according to the actual memory address. According to the method, a large amount of extra memory copy overhead caused by physical movement and rearrangement of the original tensor in a traditional operator fusion scheme is avoided, and the computing resource utilization rate and the execution efficiency are remarkably improved.

The invention relates to the technical field of virtual dynamic shared objects, and provides a method and device for achieving vDSO code memory replica, and the method comprises the steps that when a process is started, a vDSO code segment is mapped to an address space of the process; running the function code according to a preset running mechanism; and modifying the vDSO code segment by adopting the function code according to a preset rule, cancelling vDSO code segment mapping of the current process, and remapping a new vDSO code segment. According to the method and the equipment for realizing the vDSO code memory copy, the program performance can be obviously improved, vDSO copies of different levels can be flexibly realized, program and kernel codes do not need to be modified, the life cycle of the vDSO copies is efficiently managed, deployment and maintenance are simplified, the program or a kernel does not need to be modified, and a user can realize the vDSO code memory copy under the condition that an existing software architecture is not changed. And rapidly deploying and starting a vDSO memory copy function.

An opportunistic approach is described to accelerate certain memory copy operations to be performed by a computing engine by executing instructions. An instruction for a memory copy operation can be identified that has a first data type with a smaller number of bits per data element than supported by the computing engine to perform the copy operation. The instruction can be replaced with another instruction that has a second data type with a higher number of bits per data element based on the alignment of the memory addresses for the copy operation and the total number of data elements to be copied. The second data type may not only accelerate the copy operation but also provide better utilization of the underlying hardware of the computing engine.

Embodiments of the present disclosure provide a data storage method, a device, and a storage medium. An innovative network interface card device is installed on each storage server in a storage cluster, and a non-volatile cache is arranged in the network interface card device. Upon receiving data to be stored, the network interface card device can write the data to be stored into the non-volatile cache on the network interface card device; then, the network interface card device directly writes one of a plurality of pieces of data to be persisted constructed for the data to be stored and used for persistent storage into a storage disk on the storage server where the network interface card device is located, and distributes other pieces to network interface card devices installed on other storage servers, so as to complete persistent storage. Thus, in the persistent storage process, the dependence on a CPU in a storage server is decoupled, multiple memory copies do not need to be performed in the storage server any more, data transfer is directly performed by a network interface card device, and construction processing of data to be persisted is completed nearby, thereby effectively improving the persistent storage efficiency of a storage cluster.

The invention discloses a data transmission method and device, a storage medium and a computer program product, and relates to the technical field of computers, the method comprises the following steps: determining a time interval range in which a data transmission request needs to wait for processing of a shared memory device; determining memory copy processing duration for directly executing the data transmission request among different hosts; if the memory copy processing duration is greater than the maximum value of the time interval range and the shared memory device does not have transmission abnormality, performing data transmission among different hosts through the shared memory device; and if the memory copy processing duration is less than the minimum value of the time interval range or the shared memory equipment has transmission abnormity, performing data transmission among different hosts through the server. According to the method, the redundant transmission path is added when the transmission of the shared memory device is abnormal, so that the data accessibility is ensured, the low-delay transmission is maintained, and the reliability and the overall efficiency of data transmission between hosts are improved.

The invention discloses a Goose communication-based measuring point and measuring value change rapid scanning method, which comprises the following steps of: dividing measuring values of all measuring points and quality data of the measuring points into different areas for storage in a PLC (Programmable Logic Controller) running memory according to different Goose data sets, using a memory comparison instruction or a bit XOR instruction to carry out batch comparison on the memory areas storing the measurement values and the quality, and judging whether the measurement values and the quality of the measurement points are changed or not; if so, updating the PLC measured value and quality data by using the memory copy instruction, and if not, updating the PLC measured value and quality data by using the memory copy instruction; according to the invention, the real-time performance of Goose communication applied by a large-scale PLC device is obviously improved, and the requirement of high real-time performance of PLC control in the industrial control field is met.

The present invention provides a GPU computing method for computational fluid dynamics simulation, comprising building a hybrid programming framework based on a CPU / GPU heterogeneous system; establishing an OpenFOAM-GPU data structure; migrating chemical calculations to the GPU; migrating thermal physical quantity calculation tasks from the CPU to the GPU for execution; improving memory copy logic to reduce the frequency of data exchange between the GPU memory and the CPU during the calculation process; and reconstructing a two-dimensional array structure originally used on the CPU into a one-dimensional array structure suitable for GPU parallel computing. The method solves the problem that the numerical simulation method consumes a large amount of computing resources due to low parallel efficiency caused by data communication problems between the CPU and the GPU, thereby reducing the number of communications between the CPU and the GPU, lowering the communication cost, and improving the efficiency of parallel computing and data throughput.

Processing circuitry (16) and an instruction decoder (9) supports a load chunk instruction and a store chunk instruction which can be useful for implementing memory copy functions and other library functions for manipulating or comparing blocks of memory. Number of bytes to load or store in response to these instructions is determined based on an implementation specific condition. As well as loading or storing bytes of data, the load chunk instruction and (10) store chunk instruction also designated a load / store length value as data corresponding to an architecturally visible register, which provides an indication of a number of bytes loaded or stored.

The invention discloses a memory copying method, a memory copying device, a chip and electronic equipment, and belongs to the technical field of computers. The memory copying method comprises the steps that after a direct memory access DMA request submitted by a user mode application program is received, a physical page corresponding to the DMA request is locked; determining a topological relation between the physical page and the DMA channel; determining a target DMA channel according to the topological relation and the idle state of the DMA channel; mapping the locked physical page to an addressing space of the target DMA channel to obtain a mapping relationship between an address of the locked physical page and an address in the addressing space; and copying the data in the locked physical page through the target DMA channel based on the mapping relationship. Through the topological relation between the physical pages and the DMA channels and the idle states of the DMA channels, the DMA channels in the DMA channel resource pool can be adaptively and dynamically allocated, and the data copying efficiency can be improved.

A conflict-free parallel radix sorting algorithm, and devices and systems implementing this algorithm, schedules memory copies of data elements of a large dataset so that there is always a single copy to each target memory each cycle of operation for the system implementing the algorithm. The conflict-free parallel radix sorting algorithm eliminates memory copying conflicts in copying data elements from different source memories to the same target memory and in this way maintains maximum throughput for the copying of data elements from source memories to target memories, reducing the time required to sort the data elements of the large dataset.

A method for rapid data exchange between real-time and time-sharing systems. Different cores on a single processor work together to share hardware resources equally, improving overall system performance and efficiency. This not only meets real-time requirements and a large number of application computing requirements, but also reduces investment costs. A simple shared memory and signal notification mechanism is used between multi-core systems to increase data transmission bandwidth and efficiency, while also taking into account real-time and large data volume requirements. Real-time data processing and high-bandwidth data transmission are met. Through address bus communication, FPGAs can process large amounts of data in parallel and in real time, accelerating the data transmission process. The number of memory copies from kernel mode to user mode is reduced, eliminating unnecessary duplication during data transmission, thereby improving performance and reducing resource usage. A high-speed, large-capacity, real-time data interaction method is designed for the entire process, from data reception to processor processing, operating from the same memory area from start to finish.

This invention discloses a data transmission method, device, storage medium, and computer program product, relating to the field of computer technology. The method includes: determining a time interval within which a data transmission request needs to wait for processing by a shared memory device; determining the memory copy processing time for directly executing the data transmission request between different hosts; if the memory copy processing time is greater than the maximum value of the time interval and the shared memory device does not exhibit any transmission anomalies, then data transmission is performed between different hosts via the shared memory device; if the memory copy processing time is less than the minimum value of the time interval or the shared memory device exhibits a transmission anomaly, then data transmission is performed between different hosts via a server. This invention adds redundant transmission paths when a shared memory device exhibits a transmission anomaly, ensuring data reachability while maintaining low-latency transmission, thereby improving the reliability and overall efficiency of data transmission between hosts.

The present invention provides a user-mode stack architecture system supporting TSN protocol under Tianmai operating system and its implementation method, the protocol stack system includes an API module, a management module for deployment management of the protocol stack, an FD module for socket management, a TSN scheduling module, a data cache module, a packet receiving and sending module, a table entry management module and an OPS interface module. The user-mode protocol stack architecture supporting TSN protocol under Tianmai operating system proposed by the present invention greatly improves data forwarding performance by reducing memory copying, and expands the support of TSN services to meet the differentiated QoS requirements of users, so as to better support the requirements of TSN services on the software system side; at the same time, in order to maximize the efficiency of resource utilization, the user-mode protocol stack and the kernel protocol stack share resources such as ARP table items and routing table items, and complete the shaping and sending and receiving of TSN key data streams on the software side through the TSN scheduling module, thereby reducing the delay and jitter on the software side.

The invention relates to an application starting method and device, equipment, a storage medium and a vehicle. According to the method and the device, the file access data is acquired according to the accessed file when the application program is subjected to cold start for the first time, and the file prefetching list is further generated according to the file access data, so that a cold start process does not need to be performed again in a subsequent application program start process; according to the application program starting method and device, starting can be achieved only by prefetching the corresponding file data according to the file prefetching list, actions such as memory copying in the cold starting process are omitted, time consumed in the application program starting process is effectively saved, and the starting speed of the application program is substantially optimized.

A physical host includes a memory, a first buffer, a second buffer, a third buffer and a processor. The first buffer stores a log regarding dirty pages. The second buffer stores a dirty bitmap, where the dirty bitmap is written into the second buffer according to the log read from the first buffer. The third buffer stores the dirty bitmap. The processor obtains the current memory address to be migrated and a destination memory address, and marks a page table corresponding to the memory address to be migrated as dirty pages and writes the log marked as the dirty pages into the first buffer when the memory address to be migrated is written. The processor includes a memory copy engine for reading the dirty bitmap from the third buffer, and copying the content corresponding to the dirty pages to the destination memory according to the dirty bitmap.

A direct memory access (DMA) controller issuing memory copy operations on behalf of a shader at a parallel processor stops issuing copy operations upon a context switch at the shader for a wave. The DMA controller or a trap handler associated with the shader saves the incomplete copy operations to a region of global memory, from which the incomplete operations are restored upon a context resume for the wave.

There is provided a data processing apparatus in which decode circuitry receives a memory copy instruction containing an indication of a source area of memory, an indication of a destination area of memory, and an indication of a remaining copy length. In response to receiving the memory copy instruction, the decode circuitry generates at least one active memory copy operation or a null memory copy operation. The active memory copy operation causes one or more execution units to perform a memory copy from part of the source area of memory to part of the destination area of memory and the null memory copy operation leaves the destination area of memory unmodified.

The application provides a kind of multi-hardware supported deep learning model compiling method and compiler, comprising: obtaining the computational graph of the deep learning model to be compiled and the target device information;The target device information is converted into hardware attribute intermediate form based on the preset hardware model, the linear operation intermediate form is obtained based on the basic operation of deep learning model, the tensor shape intermediate form is obtained based on the tensor of deep learning model;Based on the tensor and the tensor shape intermediate form, obtain the memory intermediate form, and use the heterogeneous memory transmission folding method to optimize memory copy behavior;Based on the obtained linear operation intermediate form, obtain the loop intermediate form, use the method of fusion, stacking and vectorization to optimize the loop in the loop intermediate form, and convert into vector intermediate form, obtain the heterogeneous device data operation rule intermediate form based on the preset calculation model;Based on the plurality of intermediate forms obtained in the foregoing, obtain the executable code that can be inferred on the target device.

The application discloses a data processing method and system in a remote procedure call, and the method comprises the following steps: one party of the remote procedure call acquires to-be-transmitted data, wherein the to-be-transmitted data comprises at least one field; the one party acquires serialized data and data in a predetermined field, wherein the serialized data is obtained by serializing data in other fields of the to-be-transmitted data, the other fields are fields of the to-be-transmitted data except the predetermined field, the predetermined field is a field satisfying a predetermined condition, and the data in the predetermined field has not been subjected to serialization processing; and the one party sends the serialized data and the data in the predetermined field to another party of the remote procedure call. The application solves the problem that the RPC cannot meet the requirements due to the large serialization processing overhead in the RPC process, thereby saving the memory copy overhead in the serialization processing and improving the processing efficiency of the RPC.

In some implementations, an emulation system may store a set of data to a first memory copy location of an emulated environment that is associated with a first virtual host system. The emulation system may copy the set of data from the first memory copy location to a shared memory location of the emulated environment. The emulation system may copy the set of data from the shared memory location to a second memory copy location of the emulated environment that is associated with a second virtual host system. The emulation system may load the set of data from the second memory copy location.

The invention discloses a data processing method and device, computer equipment, a storage medium and a program product, and relates to the technical field of computers. The method comprises the following steps: in response to a data writing request of a producer, writing to-be-written stream data provided by the producer into a preset data stream slice space according to a current writing address, and updating the current writing address according to the to-be-written stream data; and in response to a data reading request of a consumer, reading target stream data from the preset data stream slice space according to the current reading address, providing the target stream data to the consumer, and updating the current reading address according to the target stream data. A producer and a consumer intuitively operate the same memory space based on respective operation addresses, additional memory copying operation of data between a user level and a buffer area is not needed in the process, the problem that resources such as space and time are wasted due to frequent memory copying in an existing memory buffer algorithm is solved, and the memory copying efficiency is improved. And the read-write speed of the cache data is increased.