235 results about "Electronic chip" patented technology

The invention relates to the technical field of automatic identification and data acquisition, discloses a control method and system for positioning a scanning gun based on an RFID electronic chip, and aims to solve the problems of remnant detection failure and misjudgment caused by shielding and deformation of existing video monitoring. A unique identification RFID chip is arranged on the surface of an object, a multi-protocol scanning gun terminal is combined to capture label signals in real time, a space coordinate mapping module is used for achieving three-dimensional positioning, a track generation engine restores a moving path, and a retention judgment unit recognizes abnormal retention according to a time threshold value and a behavior mode and triggers an alarm linkage mechanism. According to the method, an active identity binding and trajectory tracking system is constructed, so that the dependence on a visual environment is eliminated, the remnant identification precision, the anti-interference capability and the response speed in a security scene are remarkably improved, and all-weather stable operation and large-scale convenient deployment are supported.

The application discloses an edge computing platform and system based on FPGA real-time target recognition detection, and relates to the field of microelectronic chips.The edge computing platform comprises an interconnected FPGA and DDR, and an ISP module, a pre-processing module, a VDMA module, an inference accelerator, a CPU and a character superposition module are arranged on the FPGA.The inference accelerator is used for deploying a preset convolutional neural network model, reading any frame of second image and weight parameter data about convolution kernels in the convolutional neural network model from the DDR, accelerating the execution of the algorithm of the convolutional neural network model by using a sphygmic array cluster module, and generating an inference result vector output to the DDR;the sphygmic array cluster module is integrated with a Winograd fast convolution algorithm and a multi-channel sphygmic array.Compared with the prior art, the application realizes the accelerated operation of the convolutional neural network model, and thus improves the inference efficiency.

The invention discloses a simulated heat source circuit and a simulated heat source device, and relates to the field of heat testing, a plurality of heat production modules can be arranged at different positions of a circuit board, and the heat production conditions of an electronic chip to be tested at different positions in the working process are simulated through the plurality of heat production modules arranged on the circuit board. The power supplies are connected with the heat production modules in a one-to-one correspondence manner, and the voltage output condition of each power supply can be flexibly adjusted according to the actual application condition of the electronic chip in the test process, so that the heat production power of each heat production module is adjusted, and the power consumption of different areas in the simulated heat source circuit can be independently controlled; by independently controlling the heat production amount of each heat production module, the heat production conditions of different types of actual electronic chips such as uniform heat flux chips or non-uniform heat flux chips in the working process can be simulated more accurately, the flexibility is high, and the application range is wide.

A power device electronics system includes a thermal management configuration in which a power electronics chip is attached to a copper substrate and a single crystal diamond substrate attached to the copper substrate. The copper substrate is sandwiched between a first side of the diamond substrate and the power electronics chip.

The invention discloses temperature-sensitive fluorescent coating ink based on quantum dots as well as a preparation method and application of the temperature-sensitive fluorescent coating ink. The ink is prepared from quantum dots, a polymer substrate material and a solvent, a temperature-sensitive fluorescent coating is formed on the surfaces of electronic components including an electronic chip, a micro-fluidic chip, an energy storage battery, a sensor and a micro-electro-mechanical system through a dispensing method, a spin-coating method, a blade coating method or a spraying method, and a uniform fluorescent film is prepared on the surface of the chip; exciting the fluorescent film by using laser; and according to a pre-calibrated temperature-spectrum relation curve, reconstructing a micro-scale two-dimensional or three-dimensional temperature distribution diagram of the chip in a working state. According to the invention, non-contact and high-resolution real-time temperature imaging of a chip working state microcell is realized, and a key technology is provided for temperature anomaly detection, thermal management optimization and failure analysis of a miniature electronic component.

Disclosed in the present invention are an interface thermal conductivity coefficient distribution optimization design method and system for improving the thermal contact performance of an assembly interface, the method comprising: acquiring microscopic morphological features of a contact heat dissipation surface of a component of an electronic chip packaging system; constructing a thermal contact performance numerical analysis model; using the thermal contact performance numerical analysis model to perform multiple iterations on the thermal conductivity coefficient distribution of a design area to obtain a thermal conductivity coefficient distribution and thermal contact resistance; on the basis of the thermal conductivity coefficient distribution and the thermal contact resistance, determining whether each iteration meets an iteration convergence criterion; and if the iteration convergence criterion is met, outputting the thermal conductivity coefficient distribution and the thermal contact resistance. In the present invention, the temperature transfer path of an assembly interface is controlled by designing the thermal conductivity coefficient distribution of the surface of the assembly interface, and the innovative design thinking of a "heterogeneous" thermal conductivity coefficient distribution is used to truly achieve a uniform temperature gradient distribution.

The present specification relates to an ultrasonic probe (100) comprising: an electronic chip (110) having a front face (110A) and comprising a substrate (111) and at least one micro-machined ultrasonic transducer (210) in and on the substrate and on the front face; an electrically insulating protective layer (130) covering the at least one transducer; and a metallic shielding layer (140) on the protective layer, the shielding layer forming an electromagnetic shield of the at least one transducer.

An electronic chip including a semiconductor substrate in and on which an integrated circuit is formed at least one connection metallization of the integrated circuit formed on the side of a front face of the semiconductor substrate and a first passivation layer covering the front face of the semiconductor substrate, the first passivation layer including openings in line with the connection metallization of the integrated circuit The chip having a second passivation layer covering the side flanks of the semiconductor substrate, the second passivation layer being made of a parylene, and the first passivation layer and the second passivation layer being in contact with each other on the side of the front face of the semiconductor substrate. Methods of making a device are also provided.

Power Module The invention relates to a power module (1) comprising an electronic chip (33), an encapsulation housing (2) housing said electronic chip (33), and at least a first pin (13) and a second pin (15) connected to said electronic chip (33), each having a first portion (27) projecting from a face (11) of the encapsulation housing (2), said first portions (27) being separated by a first clearance zone (19) from the face, characterized in that the power module (1) comprises a first protrusion (23) integral with the encapsulation housing (2) and disposed on the first clearance zone (19) between the first portion (27) of the first pin (13) and the first portion (27) of the second pin (15), said first protrusion (23) being made of at least one insulating material. (Figure 2)

An electronic chip includes a first main surface, intended to be glued to a substrate, a second main surface, and lateral surfaces. The second main surface includes a central area and a locally patterned peripheral area. The locally patterned peripheral area successively forms, from the central area, a first portion having a first thickness and a second portion having a second thickness. The first thickness is smaller than the thickness of the central area. The second thickness is greater than the first thickness and smaller than the thickness of the central area.

The utility model relates to a bag type electronic tag. A pocket is arranged on the bag type electronic tag. An electronic chip is placed in the pocket; a unique code is arranged below the pocket and on one side of the pocket type electronic tag, the pocket type electronic tag with the electronic chip easy to recycle can be achieved, and the problem that in an existing electronic tag, the electronic chip and washable cloth are sewn together, but when the existing electronic chip needs to be recycled, the electronic chip and the washable cloth are sewn together, so that the electronic chip cannot be recycled easily is solved. The technical effects that the sewing structure of the electronic chip and the washable cloth needs to be dismantled, time and labor are wasted, and sometimes, the electronic chip is damaged when the electronic chip is dismantled are achieved.

The utility model relates to circuit board technical field, and disclose a kind of circuit board of anti-electromagnetic interference, including circuit board and electronic chip, the electronic chip is fixedly installed in the one side of circuit board, and the one side of electronic chip is provided with anti-interference mechanism;The anti-interference mechanism includes the electromagnetic shield of being set to the one side of circuit board, the both sides of the electromagnetic shield are fixedly connected with a plurality of heat conduction needle, and one end of the heat conduction needle is penetrated to the inside of electromagnetic shield;The utility model can be fixed on circuit board by positioning mechanism through setting anti-interference mechanism, so that electromagnetic shield can completely cover electronic chip, realize anti-electromagnetic effect, avoid the interference of outside electromagnetic to electronic chip, when electronic chip is energized, heat energy will gather in the inside of electromagnetic shield, and heat conduction needle will absorb heat energy, and heat energy is conducted to the outside of electromagnetic shield, reach the effect of heat dissipation, avoid electronic chip overheating damage.

The invention provides an electronic chip efficient assembly production device, and relates to the technical field of machine tool machining, the electronic chip efficient assembly production device comprises an assembly table, the front end of the assembly table is provided with a conveyor belt used for conveying chips and shell covers, the center of the top is rotatably provided with a station seat rotating intermittently, and a plurality of positioning assemblies used for positioning and clamping the chips are arranged on the station seat in an annular array mode; transfer assemblies used for transferring a chip and a shell cover are installed on the two sides of the assembly table, a shell disassembling assembly is installed on the back of the assembly table, and the shell disassembling assembly drives a shifting piece through a specially-designed transmission mechanism so that the shifting piece can automatically do composite rectangular track movement along a joint between the chip and the shell cover, and therefore filling glue can be accurately scraped open and separated, and shell cover disassembling is completed. According to the invention, the whole-course automation of the chip cover dismounting process is realized, the low-efficiency and error-prone manual operation is replaced, the production efficiency is obviously improved, and the damage to the bare chip and peripheral precise components in the dismounting process is effectively avoided.

The application discloses a dynamic polarization controller based on a silicon-based optoelectronic chip, which can lock an arbitrary polarization state light field to an arbitrary required polarization state light field. The controller couples the light of the arbitrary polarization state light field from a single-mode optical fiber into the chip through a first end face coupling structure via a first high numerical aperture optical fiber; after passing through a first polarization rotation beam splitter (PRS), the TE0 mode and TM0 mode light fields entering the chip are both converted into TE0 mode light fields; after polarization locking by adopting a waveguide 0° / 45° / 0° structure, the two TE0 mode light fields are combined into one by a second polarization rotation beam splitter and are converted into TE0 mode and TM0 mode light fields, and then are output to a second high numerical aperture optical fiber via a second end face coupling structure and are relayed into a single-mode optical fiber. The waveguide 0° / 45° / 0° structure adopts an electrically controlled phase shifter, and combines an analog annealing algorithm, a gradient algorithm and other algorithms to automatically lock the polarization state of the light.

A method for producing an individualization zone of a microelectronic chip having a first and a second electrical track level and an interconnection level including vias, includes providing the first level and a dielectric layer, forming an etching mask on the dielectric layer, randomly depositing particles on the etching mask, and forming a lithographic layer having opening patterns. The mask layer is etched through opening patterns to form mask openings, then the dielectric layer is etched through the mask openings, so as to obtain functional via openings and degraded via openings. The via openings are filled so as to form the vias of the interconnection level, the vias including functional vias at the functional openings and malfunctional vias at the degraded openings.

The application discloses a quantum random number generator, which uses an optical chip to replace a quantum optical system built by multiple independent optical components in an existing quantum random number generator to generate a quantum entropy source signal, meanwhile, uses an analog IC chip and a digital IC chip to replace signal processing parts such as an analog amplification filtering part, an analog-digital conversion part and a post-processing part built by multiple independent electronic chips in the existing quantum random number generator to process the quantum entropy source signal, and the optical chip, the analog IC chip and the digital IC chip are packaged on the same substrate, so that the quantum random number generator is chipped and integrated, that is, a quantum random number generator with small volume, low cost and large-scale production is provided, and can be applied to application scenarios such as mobile phones and camera encryption.

The application relates to the field of identification equipment, in particular to a smart burying identification equipment. The equipment comprises a rod body, at least one electronic identification ring is arranged on the peripheral wall of the rod body, and an electronic chip capable of being read and written by external equipment is arranged on the electronic identification ring; a shielding disc is slidably connected to the rod body, and the shielding disc can cover one or more electronic identification rings when reciprocally sliding along the length direction of the rod body. The application has the effect that the identification equipment at the key point of cable laying can stably and continuously maintain the identification effect.

According to one aspect, an integrated circuit package (ICF) is proposed comprising: - a substrate (SUB) having a mounting face (FM), - an electronic chip (CHP) having a rear face (FS1) and a front face (FL1), the chip (CHP) being mounted on the mounting face (FM) such that the front face (FL1) is electrically connected to the mounting face (FM) of the substrate (SUB), and - a deformable thermally conductive film (FLM) configured to cover at least a portion of the rear face (FS1) of the chip (CHP) such that the film (FLM) is in contact with the rear face (FS1). Figure for the abstract: Fig 1

This invention discloses a conversion circuit and an electronic chip. The conversion circuit includes, in sequence, an input coarse quantization module, a discrete domain amplification module, a continuous domain amplification module, and an output fine quantization module. The discrete domain amplification module pre-amplifies the conversion result of the input coarse quantization module to suppress the gain noise of the continuous domain amplification module. The conversion circuit is a capacitor-to-digital converter or an analog-to-digital converter. This invention achieves the fusion of discrete and continuous domains in analog-to-digital or capacitor-to-digital converters, giving the entire circuit the advantages of both high energy efficiency and high precision.

The invention relates to a radio frequency identification device (1) for an object, comprising a flexible band (1a) for encircling the object or a part of the object, a fastener configured to join two portions of the flexible band when it is encircled by the object or the part of the object, and a radio frequency module (4) fully incorporated into the flexible band (1a) and comprising an electrical antenna (2a) associated with a transmit-receive electronic chip (2b). Figure 1a

The utility model relates to an electronic chip. There is provided a CSP type electronic chip with electromagnetic shielding, including: an insulating substrate having a resistivity higher than 1 k [Omega]. Cm and including a lower surface, a side surface, and an upper surface, an active portion of the electronic chip being formed on the substrate; an interconnection structure covering an upper surface of the substrate, the interconnection structure including an insulating layer in which a conductive track is formed, the connection pad being disposed on the interconnection structure, the conductive track being disposed to be exposed to at least one of one or more side surfaces of the interconnection structure; a resin covering the interconnect structure and leaving a portion of a channel to the connection pad; and a conductive coating covering and contacting the side surface and the lower surface of the substrate of the chip and the side surfaces of the interconnection structure to connect the conductive track to the conductive coating on at least one of the side surfaces of the interconnection structure.

An integrated system for injection including an injection device in electronic connection with a communication device is provided. The external communication device may be a handheld electronic device such as a Smartphone or a dedicated reader such as a reader capable of reading information contained on an RFID tag. The injection device includes a needle and a drug delivery portion enclosed within an external housing. Optionally, a plurality of sensors is affixed to the surface of the needle to collect data about the injection and physical characteristics of the patient. The data may be recorded on a data capture module. The electronic chip may be a readable and writable electronic chip such as a non-volatile memory chip. Alternatively, the electronic chip is a passive RFID tag. The injection device may further include a data transmitter for sending information obtained from the data capture module to the external communications device.

In one aspect, the present disclosure relates to an electronic device comprising: a plurality of electronic chip components; a plurality of liquid metal (LM) electrical interconnects coupled to the plurality of electronic chips; and a polyimine film encapsulating the plurality of electronic chip components and the plurality of LM electrical interconnects. In some embodiments, the polyimine film comprises the product of the polymerization reaction between terephthaldehyde, 3,3diamino-N-methyldipropylamine, and tris(2-aminoethyl)amine. In another aspect, the present disclosure relates to a method for manufacturing an electronic device, the method comprising: disposing a volume of LM on a polyimine substrate to form a plurality of electrical interconnects; disposing a plurality of electronic chip components onto the polyimine substrate and in contact with the plurality of electrical interconnects; and applying a layer of polyimine onto the polyimine substrate, the plurality of electrical interconnects, and the plurality of electronic chip components.

The utility model provides a spot welding device for electronic chip machining, and particularly relates to the field of spot welding for electronic chip machining. The utility model discloses a spot welding device for electronic chip machining, and aims to solve the problems that the body health of surrounding workers can be affected due to the fact that smoke and waste chips generated during spot welding of a spot welding device for electronic chip machining cannot be filtered and collected, welding slag or smoke can fly around, cleaning is inconvenient, and the surrounding environment can also be affected due to direct emission. Comprising an operating table, a side plate is mounted on the left side of the upper end of the operating table, a mounting plate is mounted at the upper end of the right side of the side plate, a cylinder is mounted on the right side of the upper end of the mounting plate, and a laser electric welding device is mounted at the lower end of the cylinder through a piston rod penetrating the mounting plate. Compared with an original spot welding device, the spot welding device has the advantages that flue gas scraps generated during spot welding can be filtered and collected, welding slag or flue gas cannot fly around, the body health of surrounding workers cannot be affected, cleaning is facilitated, and the surrounding environment cannot be affected by direct discharge.

A carrier substrate is configured to carry at least one electronic chip and includes a mounting front face. An encapsulating cover is mounted on the front face of the carrier substrate through a mounting. This mounting includes at least one seating surface through which the cover and the carrier substrate make contact. At least one adhesive bead is located elsewhere than the seating surface in order to securely fasten the encapsulation cover and the carrier substrate.

An integrated circuit package includes an assembly of an electronic integrated circuit chip, an optical element and a support substrate. The support substrate includes a mounting face and has an opening sized and shaped to containing the electronic integrated circuit chip. The optical element includes a connection face connected to the mounting face of the support substrate and is positioned opposite to said opening. The electronic integrated circuit chip is connected to the connection face of the optical element such that the electronic chip is housed in said opening of the support substrate.

An electronic chip including a semiconductor substrate carrying at least one metal contact extending, within the thickness of the substrate, along at least one flank of the chip.

The utility model belongs to the technical field of controller electromagnetic shielding and circuit boards, and particularly relates to a PCBA bump electromagnetic shielding controller and an automobile. The PCBA salient point electromagnetic shielding controller comprises an upper shell and a PCBA assembly, the PCBA assembly comprises an electronic chip, a ground bar exposed copper, a solder ball and a circuit board. The electronic chip is arranged in the circuit area of the circuit board; the ground bar exposed copper is arranged on the circuit board and surrounds the circuit area; the plurality of solder balls are arranged on the ground bar exposed copper at preset intervals; the upper shell is connected with the PCBA assembly, and the upper shell is in contact with the solder ball to form an electromagnetic shielding structure, so that a controller electromagnetic shielding technical scheme which is good in electromagnetic protection reliability and low in cost is realized.

A device includes a photonic layer that includes a waveguide and a grating coupler, wherein the waveguide is optically coupled to the grating coupler; an interconnect structure over the photonic layer; an electronic die bonded to the interconnect structure; and a support over the electronic die, wherein the support includes a metalens, wherein the metalens is optically coupled to the grating coupler.

The invention discloses a photoelectric co-packaging structure and a forming method thereof, and the forming method comprises the steps: providing a photon chip which comprises a first surface and a second surface which are opposite, and the first surface is provided with a bonding pad and an optical coupling port located at one side of the bonding pad; forming a protective layer covering the optical coupling port, wherein the protective layer exposes the bonding pad; after the protection layer is formed, forming a first welding bump on the bonding pad; an initial packaging panel is provided, the initial packaging panel comprises a third surface and a fourth surface which are opposite to each other, an electronic chip is arranged in the initial packaging panel, the third surface of the initial packaging panel is provided with a first wiring layer, and the electronic chip is electrically connected with the first wiring layer; inversely mounting the photon chip on the first wiring layer, and welding the first welding bump with the first wiring layer; an optical interface device is installed on one side of the photon chip, and the optical interface device is right opposite to the optical coupling port; and after the optical interface device is installed, the protection layer is removed, and the optical coupling port is exposed. And the optical coupling port is prevented from being damaged and polluted in the whole packaging process.