520 results about "Input offset voltage" patented technology

A method of producing a diode drive current in an oximeter includes sensing at least a part of a current passing through the diode and converting the sensed current to a sensed voltage, inputting the sensed voltage to a feedback amplifier for stabilizing the current passing through the diode, and eliminating an offset voltage across inputs of the feedback amplifier. A pulse oximeter includes a diode for emitting light flashes, a feedback amplifier having inputs, a feedback capacitor, and an output, the feedback amplifier stabilizing a current passing through the diode, a nulling amplifier having inputs, a nulling capacitor, and an output, the nulling amplifier charging and discharging the feedback capacitor until the inputs of the feedback amplifier are at a same voltage. The operation may include synchronizing an elimination of input offset voltages of the feedback and nulling amplifiers with on or off state of diode current.

One embodiment relates to an objective lens utilizing magnetic and electrostatic fields which is configured to focus a primary electron beam onto a surface of a target substrate. The objective lens includes a magnetic pole piece and an electrostatic deflector configured within the pole piece. An electrostatic lens field is determined by the pole piece and the electrostatic deflector, and the electrostatic lens field is configured by adjusting offset voltages applied to plates of the electrostatic deflector. Other embodiments, aspects and features are also disclosed.

A scan driver IC for an EL element in an EL display device supplies, in a positive field, a positive polarity scan voltage and an offset voltage which is higher than ground to scan side driver ICs from voltage supply circuits, and the scan side driver ICs set voltage of scan electrodes to be the offset voltage in the positive field, together with outputting the positive polarity scan voltage to the scan electrodes during electroluminescence timing. Consequently, a voltage of Vr-Vm is applied to the scan side driver ICs, and so the breakdown voltage can be lowered by an amount corresponding to the offset voltage Vm. Circuits for providing such voltages, for providing alternating current drive voltages, and for reducing power consumption of the drive circuits are also disclosed.

The invention provides a compensating method of the switching frequency of a amplifier which comprises the following steps: two output end polarities is compared in the state in which the amplifier has no signal outputting; the inputting end current of the amplifier is adjusted according to the electrode; repeated circle is carried out until achieving the requirement of stopping the cycle. The invention also provides a compensating device of the DC offset voltage of the amplifier which comprises a comparator, a register, a decoding module and a current compensation module. The invention has the advantages of simple structure, low cost, small power-consumption. Meanwhile, the invention is used both for a signal amplifier and an amplifier system, which can limit the imbalance voltage to be in small scope.

A display panel including a plurality of pixel circuits is provided. Each of the plurality of pixel circuits includes a light emitting unit including a light emitting element; a control circuit configured to control a light emitting duration of the light emitting element based on an input end voltage; a first switching element connected between an input end and an output end of the control circuit; and a signal input unit including a second switching element and configured to transmit an input signal to the input end of the control circuit. The first switching elements of each of the plurality of pixel circuits are configured to simultaneously turn on or off.

A magnetic sensor circuit has Hall devices 10X and 10Y, selection switch circuits 20X and 20Y, amplifier units 30X ad 30Y, a comparison unit 60, capacitors 41X, 42X, 41Y, and 42Y, and switch circuits 51 and 52. The Hall voltages obtained from the Hall devices 10X and 10Y are outputted in either of a first and a second states switched by the selection switch circuits 20X and 20Y. The amplifier units 30X ad 30Y each operate differentially and, if the difference between their outputs is greater than a set hysteresis width, the output logic of a detection signal Sdet is shifted. This configuration helps reduce the influence of device offset voltages in the Hall devices, and also helps reduce the influence of input offset voltages arising in the amplifiers.

The invention discloses a circuit and a method for correcting offset voltage of a comparator. The circuit for correcting the offset voltage of the comparator comprises the comparator, an output latch, a selecting module, a first substrate voltage generator and a second substrate voltage generator, wherein two input ends of the comparator are connected with working voltage or common mode level (VCM), a normal phase output end of the comparator is connected with the selecting module or a first output end (VOUT+) of the circuit of correcting the offset voltage of the comparator through the output latch, a reversal phase output end of the comparator is connected with the selecting module or a second output end (VOUT-) of the circuit of correcting the offset voltage of the comparator through the output latch, an input end of the first substrate voltage generator and an input end of the second substrate voltage generator are both connected with the selecting module, an output end of the first substrate voltage generator outputs a first variable voltage (VB+) to a metal oxide semiconductor (MOS) of a normal phase input end of the comparator and an output end of the second substrate voltage generator outputs a second variable voltage (VB+) to a metal oxide semiconductor (MOS) of a reversal phase input end of the comparator. The circuit for correcting the offset the voltage of the comparator and the method for correcting the offset voltage of the comparator has the advantages of being capable of rapidly achieving large-scale and high-precision correct because digital correction is applied and simultaneously correcting the substrate voltage of two input pipes, and more flexible.

The invention provides a chopped wave band-gap reference circuit which comprises a starting circuit module, a clamping operational amplifier module, an offset voltage eliminating module and a band-gap reference module, wherein the starting circuit module is used for supplying a starting voltage to the band-gap reference module and is closed after the band-gap reference module is started; the clamping operational amplifier module is used for clamping voltages at two nodes of the band-gap reference module; the offset voltage eliminating module is used for eliminating an offset voltage of the clamping operational amplifier module; the band-gap reference module is used for generating the voltage which does not change following the temperature; the clamping operational amplifier module comprises a first chopped wave circuit, a second chopped wave circuit and a filtering circuit for a switch capacitor. A chopped wave technique is adopted by the chopped wave band-gap reference circuit for eliminating the offset voltage and acquiring a high-precision output voltage. The switch capacitor instead of a traditional RC technique is adopted by a filter, so that the area of the filter is reduced, the chip cost is lowered, and the integration degree is increased.

A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, comprising a step A of inputting predetermined input data to the neuro device and calculating an error between a target value of an output of the neuro device with respect to the input data and an actual output, a step B of calculating variation amount in the error by varying a weight of the multiplier thereafter, and a step C of varying the weight of the multiplier based on the variation amount in the error, wherein in the steps B and C, after inputting a reset voltage for setting the weight to a substantially constant value to the multiplier as the weight voltage, the weight is varied by inputting the weight voltage corresponding to the weight to be varied.

A hybrid ADC having a successive approximation register (SAR) ADC mode for generating a bit of a digital signal and a ramp ADC mode for generating an additional bit of the digital signal is disclosed. When in the SAR ADC mode, a control circuit is configured to disable a ramp signal generator; disable a counter; and enable a register to control an offset stage to set the magnitude of an offset voltage that is provided to an input of a comparator of the ADC. When in the ramp ADC mode, the control circuit is configured to enable the ramp signal generator to provide a ramp signal to the input of the comparator; enable the counter to begin providing the digital count in response to the output of the comparator; and disable the register so that the offset stage is not providing the offset voltage.

A switching power supply control circuit has a switching element, a smoothing circuit, and a switching control circuit configured to control the switching element. The switching control circuit includes I-V converter configured to multiply an output current flowing into the switching element by a predetermined conversion coefficient and generating an I-V conversion voltage, an amplifier configured to amplify the sum of the I-V conversion voltage and an offset voltage and generating a current detection signal, a first DAC configured to convert a digital compensation value computed from an output voltage of the smoothing circuit to an analog converted value, a first analog comparator configured to compare the current detection signal with the analog converted value and generating a first comparison result signal, and a driver configured to control the switching element on the basis of the first comparison result signal.

A sample and hold circuit includes an operational amplifier; a sampling capacitor configured to sample input voltages at a plurality of different timings; an adding/subtracting unit configured to perform an adding or subtracting operation of the input voltages sampled by the sampling capacitor; and an offset voltage removing unit configured to remove an input offset voltage component of the operational amplifier from a voltage obtained by the adding or subtracting operation. The operational amplifier is configured to produce an output by holding the voltage from which the input offset voltage component of the operational amplifier has been removed by the offset voltage removing unit.

There has been a problem that a bridge circuit using magneto-resistive elements or transducer elements could output a signal including an offset voltage, which could result in lower measurement accuracy. In order to solve such a problem, half-bridges each having magneto-resistive elements or transducer elements are excited with different excitation voltages so that the offset voltage is eliminated and the measurement accuracy is improved.

The invention provides a dynamic comparator. The dynamic comparator comprises a pre-amplification circuit, a dynamic latch circuit and an output-stage circuit which are connected in sequence, wherein the pre-amplification circuit comprises a first-stage amplification unit adopting an input detuning storage technology and a second-stage amplification unit adopting an output detuning storage technology; the dynamic latch circuit is used for amplifying the output signal of the pre-amplification circuit, and transforming the amplified signal into a digital logical output level; the output-stage circuit is used for outputting the digital logical output level at a latched phase, and outputting logic zero at a rest phase. The dynamic comparator provided by the invention adopts a detuning canceling technology and a structure isolating kickback noise in the pre-amplification circuit, thus effectively reducing the input detuning voltage, and greatly meeting the demands for design of high speed and high precision analog-digital convertors.

Systems and methods for producing reference voltages are disclosed. An example bandgap reference circuit includes a core bandgap module that produces a bias control for biasing the gate of a transistor to produce a proportional to absolute temperature current. The core bandgap module may use an operational amplifier that uses auto-calibration to reduce its input offset voltage. A trimming module uses the bias control to produce a proportional to absolute temperature current that is combined with a trim current and supplied to a resistor and diode to produce a trimmed bandgap voltage. The trimmed bandgap voltage is buffered to produce a reference voltage output. The trim current may be set based on a room temperature measurement of the reference voltage output.

The invention discloses a low ripple wave boosting type charge pump which comprises a single-capacitor voltage doubling circuit, wherein a continuous feedback circuit is arranged between the output voltage and the input voltage of the single-capacitor voltage doubling circuit; the continuous feedback circuit comprises an output voltage sampling branch circuit, an operation amplifier and an adjusting pipe which are sequentially connected; the detecting voltage and the reference voltage of the output voltage sampling branch circuit are respectively connected to both input ends of the operation amplifier, the output end of the operation amplifier is connected to the input end of the adjusting pipe, and a feedback mechanism of the continuous feedback circuit finally stabilizes the output voltage to a preset value. The continuous feedback mechanism comprising the output voltage sampling branch circuit, the operation amplifier and an active adjusting pipe is added; on one hand, when the factor of input voltage or temperature, and the like is changed, the stability of the output voltage is maintained by feedback; on the other hand, a ripple wave of the output voltage does not comprise the unideal factor of offset voltage, and the like due to the continuity of the feedback, thereby having a lower ripple wave.