67results about How to "Cancel offset voltage" patented technology

The invention provides a chopped wave band-gap reference circuit which comprises a starting circuit module, a clamping operational amplifier module, an offset voltage eliminating module and a band-gap reference module, wherein the starting circuit module is used for supplying a starting voltage to the band-gap reference module and is closed after the band-gap reference module is started; the clamping operational amplifier module is used for clamping voltages at two nodes of the band-gap reference module; the offset voltage eliminating module is used for eliminating an offset voltage of the clamping operational amplifier module; the band-gap reference module is used for generating the voltage which does not change following the temperature; the clamping operational amplifier module comprises a first chopped wave circuit, a second chopped wave circuit and a filtering circuit for a switch capacitor. A chopped wave technique is adopted by the chopped wave band-gap reference circuit for eliminating the offset voltage and acquiring a high-precision output voltage. The switch capacitor instead of a traditional RC technique is adopted by a filter, so that the area of the filter is reduced, the chip cost is lowered, and the integration degree is increased.

The invention relates to a complementary metal oxide semiconductor (CMOS)-process-based Hall switch offset voltage elimination method and a CMOS-process-based Hall switch offset voltage elimination circuit. A first clock signal and a second clock signal which are not overlapped with each other are adopted based on a rotary current method, wherein the first clock signal controls the amplification and storage of Hall voltage when a Hall slice is in a 0-degree state, and divides the second clock signal into a third clock signal and a fourth clock signal; the third clock signal controls the amplification and storage of the Hall voltage in a 90-degree state; and the fourth clock signal controls operations and comparison between the Hall voltage and threshold voltage in the 0-degree state and the 90-degree state to eliminate the offset voltage of the Hall slice. Compared with the prior art, the invention can use relatively fewer components and parts based on a CMOS process, so that a Hall switch can be applied to the detection of weak magnetic fields under the requirements of miniaturization and low power consumption.

The invention discloses an integrated Hall magnetic sensor packaging stress compensation circuit and method. The integral circuit comprises a stress detection circuit, a bias circuit and a stress compensation circuit. The stress detection circuit comprises three circuit portions, i.e., a stress sensor, a differential-difference amplifier (DDA) and an analog-to-digital converter (ADC). The bias circuit comprises three portions, i.e., a reference current portion, an image current source and a proportion micro current source. The bias circuit and a Hall sensor are integrated to the stress sensor of the same chip, weak electric signals proportional to packaging stress are generated, the electric signals are transmitted to the DDA together with imbalance compensation voltages Voff of the stress sensor and are input to the ADC for analog-to-digital conversion of the signals after being amplified by the DDA, converted digital signals are accessed to the stress compensation circuit, the size and polarity of stress compensation currents are controlled, generated stress compensation currents and bias current I0 are input to a Hall device together, and currents generated by stress in the Hall device are finally eliminated.

The invention provides a comparator and a relaxation oscillator. The comparator comprises a comparator circuit including a current mode comparator circuit; and the current mode comparator circuit consists of a first current mode comparator circuit and a second current mode comparator circuit, wherein the first current mode comparator circuit and the second current mode comparator circuit are connected with a first input terminal and a second input terminal of the comparator circuit electrically. The first current mode comparator circuit includes two N type MOS tubes and grids of the two N type MOS tubes are connected electrically; and the second current mode comparator circuit includes two P type MOS tubes and grids of the two P type MOS tubes are connected electrically. The oscillator includes the comparator. According to the invention, the production cost can be lowered; the development period can be shortened; the frequency stability is improved; and the ultra-low power consumption is realized.

The invention relates to a low-noise linear Hall sensor reading circuit and a working method thereof. The circuit comprises a Hall element, a rotary current circuit, a first amplifier, a chopper, a second amplifier, a PTAT current generation circuit, a switch capacitance notching filter and a buffer, wherein the Hall element is connected with the rotary current circuit, the output end of the rotary current circuit is connected with the input end of the first amplifier, the output end of the first amplifier is connected with the input end of the chopper, the output end of the chopper is connected with the input end of the second amplifier, the output end of the second amplifier is connected with the input end of the switch capacitance notching filter, the output end of the switch capacitance notching filter is connected with the input end of the buffer, the PTAT current generation circuit is connected with the input end of the second amplifier, and the output end of the buffer servers as the output end of the low-noise linear Hall sensor reading circuit. According to the circuit and the working method thereof provided by the invention, the ripple amplitude of the circuit can be reduced while the offset voltage and 1/f noise of the circuit can be effectively eliminated, and thus the whole circuit accuracy is improved.

The invention discloses an operational amplifier circuit. The operational amplifier circuit comprises an operational amplifier and a chopping offset elimination circuit for eliminating an offset signal and flicker noise of the operational amplifier. The invention further discloses a reference voltage generating circuit module. The reference voltage generating circuit module comprises a reference voltage generating circuit, an operational amplifier, a chopping offset elimination circuit and a filtering circuit, wherein the reference voltage generating circuit is used for generating voltage with a zero temperature coefficient and current with a zero temperature coefficient; the operational amplifier is used for providing feedback for the reference voltage generating circuit in order that the output of the reference voltage generating circuit is stabilized at a required working point; the chopping offset elimination circuit is used for modulating the inherent offset voltage and the low-frequency flicker noise of the operational amplifier in order to modulate the influence of the offset of the operational amplifier on a reference voltage generated by the reference voltage generating circuit; and the filtering circuit is used for filtering the offset signal modulated by the offset elimination circuit and keeping a useful reference voltage signal. Through adoption of the operational amplifier circuit and the reference voltage generating circuit module, the offset and the flicker noise of the operational amplifier can be eliminated, and the accuracy is increased.

The invention provides a high-precision voltage detection circuit, which comprises a modulator, a counter, a frequency divider module and an MCU (microprocessor control unit) processing module. The ratio of to-be-detected voltage to reference voltage is modulated into a modulation square wave signal through the modulator, the counter and the frequency divider, the voltage detection precision is determined by the ratio of high-level clock counting number to low-level clock counting number of the modulation square wave signal, and the counter and the frequency divider generate alternate feedback control signals to control the modulator, so the out-of-regulation voltage of the modulator is omitted, the voltage detection precision is greatly improved, the detection data is further corrected by the MCU processing module, and the accuracy of detection is improved again.

The invention discloses a circuit structure for reading the orthogonal rotating current of a Hall sensor. The circuit structure comprises a constant current source, six N-channel metal oxide semiconductor (NMOS) switches, two P-channel metal oxide semiconductor (PMOS) switches, an amplifier and a square Hall disk, wherein the eight MOS switches can perform on/off selecting operation by providing two clocks which are not overlapped with each other; the square Hall disk leads out a terminal from four corners respectively; the terminals are connected with two PMOS switches and two NMOS switches respectively; the constant current source is connected with the other end of each of the two PMOS switches respectively; two ends of the residual four NMOS switches are connected with the four terminals of the Hall disk and two input ends of the amplifier respectively; and the generated Hall voltage signal is amplified by the amplifier. By the circuit structure, the offset voltage and noise can be combined with input offset and noise of the back-end amplifier, so that the next level of signal processing circuit can eliminate the offset voltage and the noise conveniently.

The invention discloses a temperature sensor integrated on a CMOS image sensor and a control method thereof. The temperature sensor comprises a temperature-to-voltage module and a single-integral ADCmodule. The temperature-to-voltage conversion module comprises a proportional current generation circuit; the proportional current generation circuit converts a current source into two paths of bias currents with a fixed proportion; the bias currents are iput into collectors of two NPN-type bipolar transistors in the core temperature sensing module, base-emitter voltages of the two NPN-type bipolar transistors are respectively input into the single-integral ADC module after being sampled by the switched capacitor amplifier, and the single-integral ADC module quantizes and outputs sampled nd amplified analog voltage values. According to the control method of the temperature sensor, a method of twice sampling and twice conversion is adopted, and the precision of the on-chip temperature sensor is improved on the premise of not increasing the complexity of a circuit.

The invention discloses a high precision temperature sensor requiring no calibration. The sensor herein is characterized in that the sensor is composed of two parts. The first part is for generating two accurate VBE voltages and a reference voltage VRER which does not change over temperature. The second part is for amplifying the VBE voltages through an amplifier, outputting a TSVIP and a TSVIN toan ADC, configuring TS_TM<1:0>, the ADC separately performing measurement, which further eliminates factors that cause the errors. The first part includes a bipolar transistor chopper operational amplifier, a current mirror circuit, a resistance dividing circuit and a RC filtering circuit. The second part is composed of amplifiers. According to the invention, the sensor herein can achieve +-1 DEGC temperature measurement without dependence on calibration, and can greatly increase the measurement precision of temperature sensors.

The invention provides an integral analog-to-digital converter which comprises a buffer, an integrator, a comparing module and a self-zeroing auxiliary circuit, wherein the buffer is used for increasing a driving force of an input signal and a reference signal of the analog-to-digital converter; the integrator is used for integrating the output signal of the buffer; the comparing module is used for comparing the output voltage of the integrator with a reference voltage so as to generate a marking signal; the self-zeroing auxiliary circuit is used for eliminating offset voltages of the buffer, the integrator and the comparing module during a self-zeroing period. By storing the offset voltages into an integrating capacitor and a self-zeroing capacitor, the offset voltages of the buffer, the integrator and the comparing module are eliminated, no extra frequency compensating circuits need to be added during the realization process, and the complexity and the design difficulties of circuits are reduced significantly.

The invention provides an operational amplifier calibrating method and a circuit. The method includes the steps that an operational amplifier obtains an input first signal and an input second signal,conducts amplifying treatment to obtain a corresponding output third signal and a corresponding output fourth signal, and inputs the third signal and the fourth signal to the input end of an integrator; the integrator conducts integral treatment according to the received third signal and the received fourth signal, generates a corresponding output fifth signal and a corresponding output sixth signal, and feeds the fifth signal and the sixth signal to the operational amplifier; the operational amplifier conducts equalization treatment according to the received fifth signal and the received sixth signal and controls the third signal and the fourth signal output by the operational amplifier. The system comprises the operational amplifier and the integrator. The feedback circuit is composed ofthe integrator, so the voltage of the input differential of the operational amplifier on a transistor substrate is adjusted, and the aim of eliminating the offset voltage of the operational amplifieris realized.

The invention relates to a measurement device and method for a differential capacitance type instrument. The device comprises an alternating excitation signal generator, a circuit option switch circuit, an AD (analog-to-digital) converter and a digital signal processor, wherein after the alternating excitation signal generator generates an alternating excitation signal with fixed frequency and fixed amplitude, the alternating excitation signal is applied to two ends of the differential capacitance type instrument through the circuit option switch circuit to realize positive excitation and negative excitation of the differential capacitance type instrument; the output end of an intermediate polar plate of the differential capacitance type instrument is sequentially connected with the AD converter and the digital signal processor, the spectrum data amplitude maximum value acquired by converting the output signal of the intermediate polar plate of the differential capacitance type instrument in the positive excitation and the negative excitation, a variation of a measured physical quantity of the differential capacitance type instrument is acquired according to a certain linear relationship, so that the differential capacitance type instrument can be measured. According to the measurement device, a high accuracy measurement result can be acquired for the differential capacitance type instrument, so that the reliability of a differential resistance type sensor can be improved.

The invention discloses a pre-amplifier circuit of a CMOS comparator to solve the technical problem that an existing pre-amplifier circuit operates slowly. According to the technical scheme, an NMOS transistor MN1 and an NMOS transistor MN2 serve as differential input geminate transistors. A PMOS transistor MP1 and a PMOS transistor MP2 serve as loads, and a switch S1 and a switch S2 are connected between a grid electrode and a drain electrode of the PMOS transistor MP1 and between a grid electrode and a drain electrode of the PMOS transistor MP2 respectively. One end of a storage capacitor C1 and one end of a storage capacitor C2 are connected to the grid electrode of the PMOS transistor MP1 and the grid electrode of the PMOS transistor MP2 respectively, and the other end of the storage capacitor C1 and the other end of the storage capacitor C2 are connected to a power source VDD. Due to the fact that the storage capacitor C1 and the storage capacitor C2 are not arranged on a signal channel, the output pole and the bandwidth of a pre-amplifier are not affected, the offset voltage is eliminated, and the operating speed of the pre-amplifier is not affected. Therefore, the pre-amplifier circuit of the CMOS comparator has the advantages of being high in speed and precision.

The present invention relates to a Hall device applied to a three-dimensional Hall sensor and an offset cancellation method. The Hall device can be integrated on a chip to realize a single-chip integrated three-dimensional Hall sensor. The Hall device includes a horizontal Hall device and a vertical Hall device. The invention also proposes a quadrature coupled rotating current technique. By improving the structures of the horizontal Hall device and the vertical Hall device, the performance is improved, thus the horizontal Hall device and the vertical Hall device can be applied to the single-chip integrated three-dimensional Hall sensor, according to the method of the invention, the elimination of offset voltage can be achieved, the three-dimensional detection of a magnetic field can be realized by the single chip, and the method has a great help to the application of the magnetic field detection.

The invention relates to a temperature compensation offset eliminated RC oscillator and a method thereof. The RC oscillator comprises a reference current generating module and a clock signal generating module, wherein the reference current generating module consists of two operational amplifiers, two current sources, two field-effect tubes, a resistor and a subtractor; the clock signal generatingmodule consists of a comparator, a buffer, a capacitor, a current source, a current sink and a current mirror; the input end of the current is connected with the output end of the subtractor; the output end of the comparator controls all switches of the RC oscillator; and a signal from the output end of the comparator passes through the buffer and then becomes an output clock signal of the RC oscillator. The temperature compensation offset eliminated RC oscillator has the advantages that: error sources, namely the resistance-temperature coefficient and input offset voltage of the comparator, influencing the output frequency of the oscillator in the conventional technology are eliminated, and the precision of the output frequency is greatly improved.

The invention provides a ramp generator. The ramp generator comprises a first switch; an operational amplifier, wherein the first input end of the operational amplifier is connected with analog voltage through a first switch, the second input end of the operational amplifier is connected with reference voltage, the output end of the operational amplifier outputs ramp signals, the output end is connected to the first input end through a reset capacitor, and an offset voltage is generated at the first input end; a second switch which is connected with the reset capacitor in parallel; a third switch which is connected in series between a reset capacitor and the second switch; and a fourth switch which is connected in series between the reset capacitor and the reference voltage, wherein when the second switch and the fourth switch are both switched on and the first switch and the third switch are both switched off, the reset capacitor stores and eliminates the offset voltage. According to the pixel column reading circuit, the offset voltage in the ramp generator can be eliminated, so that the offset voltage of the pixel column reading circuit is eliminated, and the image quality of the CMOS image sensor is improved.

The invention relates to the field of integrated circuits and aims to reduce influence of offset voltages as much as possible. The technical scheme adopted in the invention is as follows: a high-precision band-gap reference circuit comprises PMOS (P-channel Metal Oxide Semiconductor) tubes P1, P2, P3 and P4, NMOS ((N-channel Metal Oxide Semiconductor) tubes N1 and N2, triodes Q1 and Q2 and ten coms switches, wherein two branch circuits N1 and N2 are connected with a point C and a point D in turn and are also connected with a point A and a point B in turn; or Q1 and Q2 are connected with P1 and P2 in turn. The technical scheme of the invention is mainly applied to the design and the manufacture of the high-precision band-gap reference circuit.

The invention provides a comparator and an analog-to-digital converter, the comparator comprises an input unit, a load unit, a control switch and an adjusting unit, the input end of the input unit receives a first input signal and a second input signal, and the load unit is connected with the input unit; the gain of the comparator is adjusted by adjusting the gain of the load unit to adjust the gate voltage of the geminate transistor, and the adjusting unit is connected with the input unit and adjusts the gain to adjust the gate voltage of the geminate transistor according to the enabling state of the control switch; the invention further provides an analog-to-digital converter, the gain of the comparator is small in an offset elimination state, so that the offset voltage amplification factor of the comparator is small, the gain of the comparator is large in a signal amplification state, the input differential mode signal amplification factor of the comparator is large, and the influence of the offset voltage of the comparator on the comparison result of the comparator is eliminated. The comparator speed is improved, the layout area is reduced, and the offset voltage of the comparator is obviously eliminated.