Hall device applied to three-dimensional Hall sensor, and method thereof
A Hall sensor and Hall device technology, applied in the direction of the magnitude/direction of the magnetic field, instruments, three-component magnetometer, etc., can solve the problems of increasing the area of the Hall device, asymmetric structure, high offset voltage, etc., to eliminate Effects of offset voltage, reduced layout area, and low initial offset
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2019-01-25
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Abstract
Description
technical field
[0001] The invention relates to a Hall device applied to a three-dimensional Hall sensor and a method thereof. Background technique
[0002] At present, the three-dimensional Hall sensor uses the front-end Hall device to complete the magnetoelectric conversion function. The structure is mainly discrete, including a set of horizontal Hall devices and two groups of vertical Hall devices. The horizontal Hall device is mainly a cross-shaped structure, which is used to detect the magnetic field perpendicular to the surface of the chip. A bias voltage is applied at both ends of the symmetry, and a current flows through the device. When there is a magnetic field, the carriers are subjected to the Lorentz force. The effect of the offset produces a Hall voltage at the remaining two ends. The vertical Hall device is used to detect the magnetic field parallel to the surface of the chip. Therefore, two sets of Hall devices are required, corresponding to the detection of...
Examples
Embodiment Construction
[0031] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0032] Please refer to figure 1 , the present invention provides a Hall device applied to a three-dimensional Hall sensor, the Hall device is two completely symmetrical deep N wells with a cross structure; the four ends and the center of the deep N wells with a cross structure are respectively A heavily doped N+ region layer is provided, and a highly doped P+ region layer is arranged between the four terminal heavily doped N+ region layers and the center heavily doped N+ region layer.
[0033] In an embodiment of the present invention, the Hall device is based on a silicon substrate.
[0034] In an embodiment of the present invention, the cross structure is formed by stacking two three-hole vertical Hall devices.
[0035] In an embodiment of the present invention, the three-hole vertical Hall device is provided with three heavily doped N+ regions on a...