40 results about "Low offset" patented technology

The invention discloses a novel chopping correlation double-sampling stable multi-path amplifying circuit and method, and relates to integrated circuit design. A Miller compensation capacitor in a chopping stable multi-path CSMP amplification circuit architecture is utilized to design a chopping correlation double-sampling circuit, and compared with a traditional correlation double-sampling circuit, a group of sampling capacitors and sampling switches are reduced. Large capacitance and large resistance required by a traditional high-pass filter circuit are eliminated, and the layout area and the current required for driving a high-pass filter capacitor are reduced; and thermal noise caused by large resistance in the passive high-pass filter is reduced, and the input equivalent noise density is improved. Through an offset calibration technology, the stability of the CSMP architecture is ensured, and the offset voltage is reduced at the same time; output ripples are suppressed by using the high-pass performance of the novel chopping correlation double-sampling circuit, 1 / f noise is reduced, and input equivalent noise density is reduced. The advantages of the chopping correlation double sampling technology and the stable multi-path amplification circuit are combined, and the advantages of low offset, low output ripple and low input equivalent noise density are achieved.

Described herein are techniques that improve efficiency of analog-to-digital conversion circuits by reducing idling time, during which the ADC circuit is not converting an analog signal to a digital representation, which reduces associated power consumption from keeping the ADC circuit running during idling time. In some embodiments, chop circuits may be used in combination with a plurality of track-and-hold circuits to acquire one polarity of an input signal and convert another polarity of the input signal during a same sampling period. A chop circuit may be configured to alternate between generating a first polarity of the input signal and a second polarity of the input signal. A first T / H circuit may be configured to acquire one polarity of the input signal from the chop circuit while a second T / H circuit provides another polarity of the input signal, previously acquired from the chop circuit, to an ADC for conversion.

The present invention belongs to the field of measurement and discloses a Hall sensor circuit comprising a Hall sensor, a rotary switch circuit connected to the Hall sensor, and a ripple-eliminating chopper amplifier connected to the rotary switch circuit; the ripple-eliminating chopper amplifier comprises a first amplifier and a second amplifier connected in series, and also comprises a first negative feedback circuit; the first negative feedback circuit comprises a ripple-eliminating loop and a transconductance amplifier connected to the ripple-eliminating loop, the output of the transconductance amplifier being connected to the input of the second amplifier; the ripple-eliminating loop comprises a chopper and an integrator, wherein the chopper input is coupled to the output of the second amplifier, the chopper output is coupled to the input of the integrator, and the output of the integrator is coupled to the transconductance amplifier. The above technical solution achieves high bandwidth, fast response speed, high measurement accuracy, low noise, and low offset voltage.

The invention belongs to the technical field of integrated circuits, and relates to a low-offset rail-to-rail operational amplifier. Comprising a three-stage main operational amplifier circuit which is composed of an input stage module, a middle stage module and an output stage module which are connected in sequence; one end of the fuse trimming module is connected to rail-to-rail input differential signals Vin + and Vin-, and the other end of the fuse trimming module is connected to the first end of the input stage module; the fuse trimming module comprises: switching tubes MD1-MD8; the drain ends of the switching tubes MD1-MD8 are connected to the input stage module, the gate ends of the switching tubes MD1-MD8 are connected to a digital control signal, and the source ends of the switching tubes MD1-MD8 are sequentially connected to a grounded eight-time current source I1, a grounded four-time current source I1, a grounded two-time current source I1 and a grounded current source I1. According to the invention, the switching-on and switching-off of an input differential pair are controlled by detecting the size of a common-mode input level, so that constant transconductance is realized; the input offset voltage of the operational amplifier is eliminated through the fuse trimming module, so that the low offset requirement of the operational amplifier is met.

A magnetic field magnetic field sensor and method of making the sensor. The sensor and method of making the sensor may comprise a material or structure that prevents the admission of light in certain wavelengths to enhance the stability of the magnetic field sensor over a period of time. The sensor and method of making the sensor may comprise an adsorption prevention layer which protects the semiconductor portion of the magnetic. The sensor may also comprise an insulating layer formed between semiconductor layers and a substrate layer.

The present application relates to the technical field of electronic circuit, and especially relates to a readout circuit of a terahertz detection array, which comprises: a readout link at least comprising a current feedback instrumentation amplifier, a programmable gain amplifier and an incremental analog-to-digital converter connected in sequence; the current feedback instrumentation amplifier amplifies the signal output by the detector and outputs a first-stage amplified signal, the current feedback instrumentation amplifier comprises an instrumentation amplifier body and a first ripple suppression module, the first ripple suppression module comprises a first redundant segmented current steering DAC and a first DAC code register; the programmable gain amplifier further amplifies the first-stage amplified signal, the programmable gain amplifier comprises a gain amplifier body and a second ripple suppression module, and the second ripple suppression module comprises a second redundant segmented current steering DAC and a second DAC code register. The present application effectively reduces the chip area and power consumption while ensuring that the readout circuit of the terahertz detection array has high gain, low noise and low offset.

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a sigma-delta modulator having a modulator input and a modulator output, first system-level chopping switches located at the modulator input, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the sigma-delta modulator, second system-level chopping switches located downstream of the sigma-delta modulator and the auxiliary path, and a signal combiner configured to combine a modulator output signal generated by the sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

A reference buffer is disclosed. The reference buffer includes an amplifier configured to amplify a difference between a reference output voltage and a reference input voltage during a closed-loop phase of the reference buffer. The reference buffer also includes a sample circuit configured to sample an amplifier output voltage during the closed-loop phase. The reference buffer further includes a buffer circuit having a buffer input coupled to the sample circuit and a buffer output configured to provide the reference output voltage. The reference buffer also includes first and second switch circuits. The first switch circuit is configured to isolate the sample circuit from the output stage of the amplifier during an open-loop phase of the reference buffer. The second switch circuit is configured to isolate the input stage from the output of the reference buffer during the open-loop phase.

A reference buffer is disclosed. The reference buffer includes an amplifier configured to amplify a difference between a reference output voltage and a reference input voltage during a closed-loop phase of the reference buffer. The reference buffer also includes a sample circuit configured to sample an amplifier output voltage during the closed-loop phase. The reference buffer further includes a buffer circuit having a buffer input coupled to the sample circuit and a buffer output configured to provide the reference output voltage. The reference buffer also includes first and second switch circuits. The first switch circuit is configured to isolate the sample circuit from the output stage of the amplifier during an open-loop phase of the reference buffer. The second switch circuit is configured to isolate the input stage from the output of the reference buffer during the open-loop phase.

The invention discloses a chopping operational amplifier for reducing switch artifacts by using an ORL. The chopping operational amplifier comprises a chopping module, a two-stage amplification module and an ORL module, the chopping module comprises a chopper I and a chopper II; the two-stage amplification module comprises a first-stage amplification module and an output-stage amplification module; the input end of the chopper I is used for acquiring an input signal, the output end of the chopper I is connected with the input end of the first-stage amplification module, and the chopper I is used for generating a modulation signal according to the input signal and transmitting the modulation signal to the first-stage amplification module; the output end of the first-stage amplification module is connected with the input end of the second chopper, and the first-stage amplification module is used for generating a first output signal according to the modulation signal and transmitting the first output signal to the second chopper. The output end of the chopper II is connected with the input end of the output stage amplification module, and is used for generating a demodulation signal according to the first output signal and transmitting the demodulation signal to the output stage amplification module, and on the basis of a pure chopping technology, an ORL is further expanded and added, so that the circuit realizes lower offset voltage and smaller switch artifacts.

The invention discloses a rail-to-rail operational amplifier circuit with low offset voltage, low noise and high precision, and relates to the technical field of integrated circuits. The amplifying circuit comprises an input stage circuit, an intermediate stage circuit, a compensating circuit and an output stage circuit, the input stage circuit is used for realizing rail-to-rail input through a group of PMOS (P-channel Metal Oxide Semiconductor) and NMOS (N-channel Metal Oxide Semiconductor) differential pairs, the intermediate stage circuit is used for improving the precision and stabilizing a common mode through a pair of operational amplifier tubes, the compensation circuit is used for realizing voltage clamping of the circuit, and the output stage circuit is used for realizing rail-to-rail output and driving a load. According to the invention, the amplitude of input and output signals can basically reach a positive and negative power rail, the high current consumption caused by the conventional design is avoided in the design of the input stage, the precision of the circuit can be greatly improved by the design of the middle stage, and the circuit can be applied to a high-precision signal processing circuit.

The invention discloses a sensing amplification circuit, a memory, a driving method and electronic equipment, relates to the technical field of semiconductors, and is used for reducing offset noise and improving sensing sensitivity. The sensing amplification circuit comprises a sensing amplifier, a first control sub-circuit, a second control sub-circuit and a first charging circuit, required potentials are charged into a first bit line and a second bit line through the first charging circuit, and the sensing amplifier is isolated from the first bit line and the second bit line through the first control sub-circuit and the second control sub-circuit. According to the embodiment of the invention, the influence of threshold voltage offset caused by mismatch of electrical parameters of a transistor in the sensing amplifier on the potentials of the first bit line and the second bit line can be avoided, the problem of fluctuation of the potentials of the first bit line and the second bit line is solved, the offset noise is further reduced, and the sensing sensitivity is improved.

The invention belongs to the field of amplifiers, and relates to a broadband electric signal measuring method, a high-bandwidth low-offset amplifier comprises a composite operational amplifier composed of a precision operational amplifier U1, a radio frequency low-noise amplifier U2 and a current feedback operational amplifier U3; a current signal passes through a high-bandwidth low-offset amplifier by using a shunt, is amplified by an operational amplifier and is collected to an ADC (Analog to Digital Converter), the collected current signal is a sinusoidal signal, and autocorrelation calculation is carried out by using continuous 1 million points collected by the ADC; calculating the squared value of the amplitude by using the peak value of the autocorrelation function of the sine wave superposed with the width noise, and calculating to obtain the amplitude As of the collected sine wave; collecting once according to a standard signal, wherein the amplitude of the standard signal is Aa; the calibration coefficient k is equal to As / Aa, then collected current signal data is Aa ', and Aa' * k is the truth value of the current signal extracted from the noise. The low-offset, high-bandwidth, high-gain and high-slew-rate amplifier can be achieved.

The utility model belongs to the technical field of small current measurement, and particularly relates to a transimpedance amplification circuit which comprises a feedback resistor, an anti-interference circuit and a signal following circuit, the anti-interference circuit is connected with the signal following circuit, one end of the feedback circuit is connected with one end of the anti-interference circuit, and the other end of the feedback circuit is connected with one end of the signal following circuit; the ADC conversion circuit is connected with the signal following circuit, and the processing circuit is connected with the ADC conversion circuit. According to the device, a negative feedback loop is formed through the feedback resistor, the anti-interference circuit and the signal following circuit, due to the effect of the negative feedback loop, the change of feedback current causes the adjustment of output voltage, and the output voltage tends to the input current, so that the input current is converted into the output voltage; and the amplification factor is relatively high and the imbalance is relatively low.

The invention discloses a method for measuring radio frequency power through an automatic balance bridge, and relates to the technical field of radio frequency power measurement. According to the method for measuring the radio frequency power through the automatic balanced bridge, a controllable current source drives current to flow through a 200-ohm standard resistor and a negative temperature coefficient thermistor; acquiring voltage signals of the two by using the same precision instrument amplifier, and inputting the voltage signals into a servo amplifier subjected to low-offset adjustment; the servo amplifier controls the main power transistor to adjust the power of the combinational circuit according to the voltage difference value, power heating is increased to reduce the resistance when the voltage of the thermistor is higher than the standard resistance, and otherwise, the resistance is increased by reducing the power and reducing the heat; when the two voltages are balanced, the resistances are equal; based on a direct current substitution principle, the radio frequency power is calculated by using a formula # imgabs0 # through the output voltage of the standard resistor when the radio frequency power is not applied and when the radio frequency power is applied. The method realizes high-precision radio frequency power measurement, and is suitable for the fields of wireless communication and the like.

Process window qualification (PWQ) layouts can be used to determine a presence of a pattern anomaly associated with the pattern, patterning process, or patterning apparatus. For example, a modulated die or field can be compared to a slightly lower offset modulated die or field. In another example, the high to low corners for a particular condition or combination of conditions are compared. In yet another example, process modulation parameters can be used to estimate criticality of particular weak points of interest.

The invention discloses an ultralow offset voltage trimming operational amplifier based on automatic trimming and a trimming method. The amplifier comprises a voltage reference source, a first two-way selection switch, a second two-way selection switch, a third two-way selection switch, a core operational amplifier, a low-pass filter, a comparator, an SAR logic module, a trimming network, a first resistor and a second resistor. The method comprises the following steps: judging an input offset voltage and a common-mode voltage, and outputting a judgment result; adjusting the control word according to a judgment result, carrying out successive approximation, and outputting an initial control word signal; and trimming the input offset voltage of the core operational amplifier according to the initial control word signal, and outputting the trimmed input offset voltage. According to the embodiment of the invention, the input offset voltage of the operational amplifier can be reduced to a microvolt level, and the voltage trimming precision of the operational amplifier is improved. The circuit can be widely applied to the technical field of integrated circuits.

The invention discloses a pre-amplifier circuit applied to a sensor chip, and the pre-amplifier circuit comprises an amplifier main body circuit which is of a differential symmetric design structure and is used for realizing low offset voltage by using an NPN type triode as an input tube of the pre-amplifier circuit, meanwhile, stable gain output of the pre-amplifier circuit is realized through a feedback loop arranged in the circuit; and the common-mode feedback circuit is used for raising the output common-mode level of the amplifier main body circuit by utilizing an emitter follower structure of the NPN type triode and eliminating the influence of the base current of the NPN type triode on the output common-mode level by utilizing the base compensation current. According to the invention, an NPN type triode is used as an input tube of the amplifier to realize low offset voltage, relatively few circuit devices are adopted to further realize low noise performance, a feedback loop is arranged in the circuit to realize gain stability of the pre-amplifier, and a common-mode feedback circuit is used to stably output common-mode level.

The invention belongs to the technical field of integrated circuits, and relates to a chopping self-stabilization zero fully differential operational amplifier circuit with digital calibration, which comprises a switch module, a transconductance module, a transimpedance amplification module, a capacitor module, a digital calibration module, a common mode feedback module and an output module, wherein the switch module is used for realizing chopping and zero self-stabilization, the digital calibration module is used for preliminarily calibrating the offset voltage of the main amplifier, the common-mode feedback module is used for stabilizing the output common-mode voltage of the transimpedance amplification module, meanwhile, the common-mode feedback module can also reduce burrs of output signals, and the output module is used for outputting differential signals. After the digital calibration module preliminarily calibrates the offset voltage of the main amplifier, chopping and self-zero-stabilizing are realized by switching a switch in the switch module, so that the offset voltage of the operational amplifier is greatly reduced, and meanwhile, the noise of the operational amplifier is also reduced to a relatively low value; therefore, the operational amplifier has the characteristics of low offset voltage, low noise, low ripple and high precision.

The present invention discloses a rail-to-rail operational amplifier circuit with low offset voltage, low noise and high precision, which relates to the field of integrated circuit technology. The amplifier circuit includes an input stage circuit, an intermediate stage circuit, a compensation circuit and an output stage circuit; the input stage circuit is used to achieve rail-to-rail input through a group of PMOS and NMOS differential pairs, the intermediate stage circuit is used to improve precision and stabilize the common mode through a pair of operational amplifier transistors, the compensation circuit is used to achieve voltage clamping of the circuit, and the output stage circuit is used to achieve rail-to-rail output and drive the load. The present invention enables the input and output signal swings to basically reach the positive and negative power supply rails. In the design of the input stage, the high current consumption caused by conventional designs is avoided. At the same time, the design of the intermediate stage can greatly increase the precision of the circuit, and it can be applied to high-precision signal processing circuits.

This invention relates to a low-temperature drift, high-precision heat flux conversion circuit, characterized by comprising: using two operational amplifiers U1A and U1B with identical parameters on the same substrate, whose temperature drifts are similar, and setting the two operational amplifiers to be in opposite directions to cancel out the effects of their offset voltages and temperature drifts, first forming a fully differential amplifier circuit to amplify the small signal from the heat flux sensor; the amplified signal is then passed through two other operational amplifiers U2A and U2B on the same substrate to form an additive bias circuit, obtaining a high-precision voltage signal V0 with adjustable bias, low temperature drift, and low offset. The beneficial effect of this invention is that it reduces the output offset voltage, thereby reducing the impact of input offset voltage and temperature drift on the accuracy of heat flux acquisition, and improving the accuracy of heat flux sampling.

The present invention discloses an efficient clock tree synthesis method based on complementary Manhattan rings, which includes dividing the layout into multiple regions, pre-inserting a number of buffers in each region, initially forming clustering rings centered on each buffer, and the size of the clustering ring of each buffer being complementary to the distance from the buffer to the center of the region; cyclically accessing each clustering ring to find clusters that can be merged until the number of clusters converges; constructing a clock tree using an offset-controllable fishbone tree structure; using geometric operations to judge the overlap situation of the buffers and calculating the free regions, and through inflating and grid-dividing the free regions, obtaining the insertable positions of the buffers, and then adjusting the positions of the buffers based on the relationship with the upper and lower level buffers. By combining various strategies such as clustering optimization and buffer position adjustment, the present invention achieves low delay and fewer buffer numbers on the basis of low offset, and is applicable to the clock tree synthesis design of high-performance integrated circuits.

The application relates to low temperature drift low adjustment RC oscillator, relates to integrated circuit technology, and the application comprises reference source circuit, the reference source circuit comprises reference current signal output end and reference voltage output end, characterized by further comprising shared comparison circuit, first capacitive oscillator with discharge switch, second capacitive oscillator with discharge switch, first comparator, second comparator and RS trigger, the application offsets temperature changes of the reference current and the reference voltage, so that the output clock frequency of the oscillator circuit is basically not changed with temperature, the oscillator circuit structure is symmetrical, and the error caused by the comparator hysteresis to the clock frequency is eliminated.

To provide an amplifier or the like which consumes less current and has a lower offset than a conventional technique.SOLUTION: A control circuit of a dynamic amplification device connects a load circuit and a current source to a differential amplifier, short-circuits and then opens each input terminal and each inverting output terminal of the differential amplifier, and holds each input voltage and an error of the differential amplifier in each sampling capacitor. A sampling operation of canceling an error of the differential amplifier, a reset operation of disconnecting the load circuit and the current source and connecting each inverting output terminal to a fixed potential, and an amplification operation of amplifying a difference between input voltages after the sampling operation by connecting the differential amplifier to the current source, setting each inverting output terminal of the differential amplifier to a high impedance, and integrating each output capacitor of the differential amplifier by either charging or discharging according to each input voltage of the differential amplifier are executed.SELECTED DRAWING: Figure 2

The invention discloses a low-temperature-drift low-offset curvature compensation band-gap reference circuit which comprises a starting circuit, a band-gap main body circuit and a second-order curvature compensation circuit which are connected in sequence. The starting circuit comprises PMOS (P-channel Metal Oxide Semiconductor) tubes M6, M8, M10, M11, M12, M17, M18 and M19 and NMOS (N-channel Metal Oxide Semiconductor) tubes M5, M7, M9, M13, M14, M15 and M16; the band gap main body circuit comprises PMOS (P-channel Metal Oxide Semiconductor) tubes M1, M2, M20, M22, M23, M24, M25, M26, M27, M28 and M29, NMOS (N-channel Metal Oxide Semiconductor) tubes M3, M4, M21 and M42, triodes Q1, Q2, Q3 and Q4, and resistors R1 and R2; and the second-order curvature compensation circuit comprises PMOS (P-channel Metal Oxide Semiconductor) tubes M30, M31, M33, M34, M36, M37, M38, M39, M40 and M41, NMOS (N-channel Metal Oxide Semiconductor) tubes M32 and M35, and resistors R3 and R4.

A deadtime generator configured to output a pair of non-overlapping clock signals. A circuit is provide that includes an input node for receiving a clock signal; a first signal path coupled to the input node and having a first output node for outputting a first modified clock signal, wherein the first signal path includes a feedback node coupled to an input of a feedback inverter; a second signal path coupled to the input node and having a second output node for outputting a second modified clock signal, wherein second signal path includes a Low-to-High skewed inverter; and a feedback signal path coupled to second signal path and having a High-to-Low skewed inverter with an output coupled to a gate of at least one transistor, wherein an output of the at least one transistor is coupled to the feedback node.

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a sigma-delta modulator having a modulator input and a modulator output, first system-level chopping switches located at the modulator input, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the sigma-delta modulator, second system-level chopping switches located downstream of the sigma-delta modulator and the auxiliary path, and a signal combiner configured to combine a modulator output signal generated by the sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

The application provides an ultra-low temperature drift bandgap reference voltage source compensation circuit, and belongs to the technical field of analog integrated circuits.The circuit comprises a bandgap reference main circuit, a high-order temperature compensation circuit, a chopper operational amplifier module and a trimming circuit module;the bandgap reference main circuit adopts a matching BJT with an emission area ratio of 47, and generates a first-order zero-temperature-coefficient reference voltage in combination with a low-temperature-coefficient resistance network;the high-order temperature compensation circuit generates a compensation current by copying a node voltage of the chopper operational amplifier, so as to offset high-order temperature nonlinear error;the chopper operational amplifier adopts a three-level nested double-channel topology, so as to realize low offset, low noise and high gain;the trimming circuit adopts a parallel and series combined trimming structure, so as to complete full-process-angle curvature correction.The temperature drift coefficient under the full-process-angle is as low as 0.25-0.33ppm / ℃, and the low-frequency noise density is 18nV / ;the circuit has the advantages of ultra-low temperature drift, low noise, low power consumption and high stability, and is suitable for various high-precision analog and mixed-signal integrated circuits.

The invention discloses an operational-amplifier-free band-gap reference circuit with high power supply rejection ratio and low offset, which belongs to the field of electronic circuits and comprises a pre-voltage-stabilizing circuit, an operational-amplifier-free band-gap reference circuit, a segmented temperature compensation circuit and a starting circuit. The starting circuit is connected with the pre-voltage-stabilizing circuit and the operational-amplifier-free band-gap reference circuit, the pre-voltage-stabilizing circuit is connected with the input end of the operational-amplifier-free band-gap reference circuit, and the output end of the operational-amplifier-free band-gap reference circuit is connected with the segmented temperature compensation circuit. The band-gap reference circuit adopts an operational-amplifier-free structure and a negative feedback clamping technology, and has a simple circuit structure, small circuit imbalance and a high power supply rejection ratio; according to the band-gap reference circuit, the pre-voltage-stabilizing circuit greatly improves the power supply rejection ratio which cannot be achieved by a traditional band-gap reference circuit; the segmented temperature compensation circuit generates high-order current, counteracts part of nonlinearity in PTAT current, and reduces the temperature coefficient of the reference voltage.

This invention provides a signal gain adjustment circuit with an adaptive mechanism. An amplifier receives an analog signal and generates an adjustment analog signal, which is then sent to an analog-to-digital converter to generate an output digital signal. A gain control capacitor array and the amplifier jointly determine the gain of the adjustment analog signal relative to the analog signal. In operation, the control circuit receives the actual level of the output digital signal to determine and estimate the level offset, and generates an adjustment control signal accordingly. Each coarse-adjustment capacitor in the coarse-adjustment capacitor array has a first adjustment amount relative to the maximum gain value. Each fine-adjustment capacitor in the fine-adjustment capacitor array has a second adjustment amount, less than the first adjustment amount, relative to the maximum gain value. The coarse-adjustment and fine-adjustment capacitor arrays determine the capacitor enable combination based on the adjustment control signal, thereby adjusting the gain to reduce the offset.