Amplifier with programmable
gain (“PGA”) (100), comprising: a
differential amplifier (A1) with one input pair (102, 104) and one output pair (106, 108), a pair of input capacitors (C IN , C IP ) with output terminals, each connected to inputs (102, 104) of the
differential amplifier (A1), a pair of feedback capacitors (C FN , C FP ), which are each connected between the outputs of the
differential amplifier (A1) and corresponding inputs of the differential
amplifier (A1), a first
chopper circuit (110) which is configured to connect the input capacitors (C IN , C IP ) to connect to the corresponding input terminals of the PGA (100), a second
chopper circuit (120) configured to connect the output terminals (106, 108) of the differential
amplifier (A1) to corresponding output terminals (VON, VOP) of the PGA (100), a first
voltage source (V ICM ), which is configured to be connected to input terminals (102, 104) of the differential
amplifier (A1) via corresponding sample switches, the corresponding sample switches being configured to close in response to a first
control signal (CO) and the first
voltage source (V ICM ) has a
voltage that is set to a common-mode voltage of the differential amplifier (A1), and wherein the amplifier (A1) provides a second
voltage source (V CMA ) which is configured with input terminals of the input capacitors (C IN , C IP) to be connected via appropriate scanning switches, the appropriate scanning switches being configured to close in response to a second
control signal (COB) and the second
voltage source (V CMA ) has a voltage that is set to a common-mode
signal of signals to be input into the PGA (100).