421 results about "Voltage shift" patented technology

A thin-film transistor includes a gate electrode having first and second gate electrode edges on opposed sides, and a drain electrode having a first edge that overlaps the first gate electrode edge, and a second edge that overlaps the second gate electrode edge. A diode array is fabricated by successive deposition of a conductive layer, a doped semiconductor layer and an undoped semiconductor layer adjacent to the substrate. A display pixel unit provides reduced capacitative coupling between a pixel electrode and a source line. The source line includes an extension that provides a source for the transistor. A patterned conductive portion is disposed adjacent to the source line. Another display pixel unit provides reduced pixel electrode voltage shifts using a source line and a balance line.

A high-stability shift circuit using amorphous silicon thin film transistors, which utilizes two out-of-phase pulses to control the operating mechanism and the bias-relations among transistors in the shift circuit. This makes the transistors under the driving conditions of positive / negative-alternating biases so as to restrain the voltage shift of the transistors such that the threshold voltage will not excessively increase along with the increasing operating time. This can not only increase the lifetime of the amorphous silicon thin film transistors but also extend the operating time of the shift circuit.

A method and circuit for achieving minimum latency data transfer between two mesochronous (same frequency, different phase) clock domains is disclosed. This circuit supports arbitrary phase relationships between two clock domains and is tolerant of temperature and voltage shifts after initialization while maintaining the same output data latency. In one embodiment, this circuit is used on a bus-system to re-time data from receive-domain, clocks to transmit-domain clocks. In such a system the phase relationships between these two clocks is set by the device bus location and thus is not precisely known. By supporting arbitrary phase resynchronization, this disclosure allows for theoretically infinite bus-length and thus no limitation on device count, as well as arbitrary placement of devices along the bus. This ultimately allows support of multiple latency-domains for very long buses.

When programming a contiguous page of memory storage units, every time a memory storage unit has reached its targeted state and is program-inhibited or locked out from further programming, it creates a perturbation on an adjacent memory storage unit still under programming. The present invention provides as part of a programming circuit and method in which an offset to the perturbation is added to the adjacent memory storage unit still under programming. The offset is added as voltage offset to a bit line of a storage unit under programming. The voltage offset is a predetermined function of whether none or one or both of its neighbors are in a mode that creates perturbation, such as in a program inhibit mode. In this way, an error inherent in programming in parallel high-density memory storage units is eliminated or minimized.

Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected.

A shift register circuit comprises a plurality of stages, each stage being for providing an output signal to an output load and comprising a pull up transistor for pulling the output signal up to a high voltage rail and a pull down transistor for pulling the output signal down to a low voltage rail. Each stage comprises a circuit for sampling the threshold voltage of at least one of the pull up and pull down transistors and for adding the sampled threshold voltage to a control voltage offset, to provide a threshold- voltage-compensated signal for controlling the gate of the at least one of the pull up and pull down transistors. This provides threshold voltage sampling, in particular for the thin film transistor whose threshold voltage drift must be compensated (for example the pull-down thin film transistor).

In a drive device for an active type light emitting display panel which can apply a reverse bias voltage to an EL element, in order to be able to compensate deterioration in light-emitting efficiency of the EL element accompanied by applying of the reverse bias voltage and the like, one pixel 10 is composed of a controlling TFT (Tr1), the driving TFT (Tr2 ) , a capacitor C1, and the EL element E1. Switching switches SW1, SW2 mutually enables a supplying state of a forward current to the EL element E1 and an applying state of the reverse bias voltage to be selected . In one control form according to the present invention, when the applying state of the reverse bias voltage shifts to the supplying state of the forward current, by switching one switch first, the anode and cathode of the EL element E1 are made to the same electrical potential to allow electrical charges to be discharged. Thus, charge of the forward current for a parasitic capacitance of the EL element E1 can be performed rapidly, and rising of the lighting operation of the EL element can be advanced.

A control circuit for controlling a hysteretic regulator to operate at substantially fixed frequency has a voltage offset circuit which receives a first feedback signal and generates a pair of upper and lower offset voltages; a control reference stage which receives a reference voltage and the upper and lower offset voltages and outputs upper and lower control reference voltages; and a window comparator which receives the upper and lower control reference voltages and an output voltage feedback signal and outputs a pair of upper and lower control voltages for controlling switching of the hysteretic regulator at a fixed frequency. The first feedback signal may be representative of a switching frequency, a temperature or an output voltage of the hysteretic regulator, for example. The voltage offset circuit may further receive a second and / or an additional feedback signal. The first, second and / or additional feedback signals further may be weighted. According to particularly useful embodiments of the invention, the control method for a hysteretic regulator may use both output voltage and switching frequency as primary feedback signals, thereby allowing the window limits (control voltages) to be positioned completely independently and in any possible configuration about the nominal voltage. In other words, the two window limits can be positioned symmetrically or asymmetrically about the nominal voltage, and at the same time the lower window limit can be positioned either below, above, or equal to the upper window limit.