The invention provides a circuit structure for reducing input offset voltage of a two-stage operational amplifier, which comprises a switching control circuit, a first-stage differential amplification circuit, a second-stage common-source amplification circuit and a compensation network, wherein the output end of the switching control circuit is connected with the input end of the first-stage differential amplification circuit, the output end of the first-stage differential amplification circuit is connected with the input end of the second-stage common-source amplification circuit, and the compensation network is further connected between the input end and the output end of the second-stage common-source amplification circuit. The circuit structure has the benefits that the offset of theoperational amplifier is reduced by adopting an MOS (metal oxide semiconductor) switching tube to control and exchange signals at the positive and the negative input ends and the signals at the output end of the operational amplifier; as only the MOS switching tube is increased in the circuit, the circuit structure only needs very small area and very low power consumption; and the circuit does not affect the gain of the operational amplifier, the phase margin, the power supply voltage rejection ratio, the common-mode input range and other performance indexes while reducing the input offset voltage of the operational amplifier, and can be applied in mainstream CMOS (complementary metal oxide semiconductor) circuit systems.