171 results about "Bit numbering" patented technology

The invention discloses a fusion multiply-add operation circuit compatible with multiple floating-point number formats, and the circuit comprises an input device which is used for obtaining three floating-point numbers and control information in a fusion multiply-add operation instruction; the input decoding device is used for analyzing the control information and extracting the symbol, the index and the mantissa of each floating-point number; the multiplication correlation device is used for calculating an initial index, a mantissa product and an initial symbol; the addend aligning and shifting device is used for completing addend mantissa aligning and shifting; the additive operation correlation device is used for calculating an addition result, a symbol, a normalized shift bit number and a direction flag bit according to the mantissa product sum; the original result processing device is used for generating an initial rounding bit, a normalized shift pasting bit and intermediate result data; and the final result output device is used for outputting a final operation result compatible with the IEEE-754 or Point floating-point number according to the rounding information. The circuit area and power consumption are remarkably reduced through hardware integration, and meanwhile the calculation efficiency is improved.

The invention discloses a magnetic flux regulation crosstalk calibration method for quantum bits, and relates to the technical field of quantum, and the method comprises the steps: S1, obtaining an initial calibration parameter of a target quantum system through employing an initial crosstalk matrix; s2, generating a plurality of groups of random magnetic flux configuration signals containing magnetic flux regulation and control values by using the initial crosstalk matrix; s3, constructing a modified crosstalk matrix by using the random magnetic flux configuration signal; and S4, acquiring a correction calibration parameter by using the correction crosstalk matrix, performing error evaluation, if the error evaluation is met, completing correction, and if the error evaluation is not met, returning to the step S2. Compared with the prior art, the method has the advantages that the frequency offset matrix is constructed, the crosstalk matrix is corrected, and the corrected crosstalk matrix is generated by using the quasi-Monte Carlo method and the frequency offset matrix, so that the high sampling complexity in direct proportion to the square of the bit number in two-dimensional spectrum scanning is avoided; the method has the advantages of improving the calibration precision and reducing the complexity of a phase measurement experiment process.

The invention discloses an HPLC (High Performance Liquid Chromatography) signal processing method based on bit loading, and belongs to the technical field of power line carrier communication. The HPLC signal processing method based on bit loading comprises the following steps: reading bit data from a channel interleaving module, and sequentially writing the bit data into a first bit buffer queue according to a preset read bit number of the channel interleaving module; in the bit loading mode, aiming at the modulation mode corresponding to each subcarrier, determining a target bit number required to be filled by each subcarrier; different modulation modes correspond to different target bit numbers; and sequentially reading the bit data of the target bit number from the first bit buffer queue according to the write-in sequence, and mapping the bit data read as required to the corresponding subcarrier for modulation and transmission. According to the invention, rate efficient matching of data processing in a bit loading mode and data transmission without subcarrier cross-physical blocks are realized.

The invention discloses a dual-mode communication chip, and belongs to the technical field of communication. The dual-mode communication chip comprises an HPLC (High Performance Liquid Chromatography) signal transmitting end and an HPLC signal receiving end; the HPLC signal transmitting end is configured as a coding module and is used for coding the load data to obtain coded load data; the first storage module is used for storing the coded load data; the channel interleaving module is used for carrying out interleaving processing on the bit data read out from the first storage module; the first bit buffer queue is used for sequentially writing the bit data from the channel interleaving module according to a first bit number and sequentially reading the bit data according to a writing sequence according to a second bit number; and the bit mapping module is used for mapping the bit data from the first bit buffer queue to each subcarrier with a second bit number. According to the invention, rate efficient matching of data processing in a high-order modulation mode and data transmission without subcarrier cross-physical blocks are realized.

The application relates to a calculation method for realizing a Tanh excitation function based on FPGA, which comprises the following steps: obtaining the quantization bit number during FPGA realization, determining the decimal bit quantization bit number, determining the accuracy of input and output values of the Tanh excitation function and the range of the output values based on the decimal bit quantization bit number, processing the values greater than 0 based on four linear fittings, one quadratic fitting and two table storage respectively, and mapping and processing the values less than 0 based on the odd symmetry of the Tanh function. The application can realize the Tanh function with high accuracy under the condition that the FPGA resource is limited.

The embodiment of the application discloses a data format conversion device and method, electronic equipment and computer storage medium, the data format conversion device comprises: a first shift module, which is used for first extended shift of a normalized format number to be converted integer, and obtains a shift integer; the bit number of the shift integer is n times of the bit number of the integer to be converted; n is a positive integer; a second shift module is used for second extended shift of a normalized format number to be converted decimal, and obtains a shift decimal; an addition module is used for adding the shift integer and the shift decimal, and obtains a shift number; a floating point conversion module is used for floating point format conversion of the shift number, and obtains a floating point format number of the shift number; the floating point format number of the shift decimal is a target floating point number.

The application provides an uplink control information transmission method, a receiving method, a terminal and a network device, and the method comprises the following steps: in the case that a first uplink channel carrying a first HARQ-ACK and a second uplink channel carrying a second HARQ-ACK overlap in the time domain, determining a reference bit number of the second HARQ-ACK according to the bit number of the first HARQ-ACK; and transmitting the second HARQ-ACK and the first HARQ-ACK simultaneously on the same uplink channel according to the reference bit number. The application can ensure that the terminal and the network device have consistent understanding of the bit number of the HARQ-ACK transmitted by the terminal.

A circuit for encoding a C-PHY signal, a decoding circuit and a transmission device, the encoding circuit being characterized by: obtaining a C-PHY line state, forming a line state block, mapping the line state block into a binary number capable of uniquely identifying the line state block, and setting different line state blocks for an HS mode, an LP mode and an ALP mode, and binary coding mapping is carried out according to the corresponding line state block, so that the coding efficiency is improved under different conditions. Furthermore, a flag bit is set, so that the bit number of binary coding is reduced, and the coding efficiency is improved. According to the invention, the complexity of a coding circuit is reduced, the integrity of coding information is kept, and the coding and decoding efficiency and the transmission real-time performance are improved from multiple angles through a series of methods such as flag bits and line state sub-blocks.

The application provides a video decoding method, a video encoding method and a storage medium. The video decoding method comprises: decoding an additional bit number M from a code stream of a video, the additional bit number M indicating a number of additional general constraint information (GCI) bits contained in the code stream of the video, wherein the additional bits comprise flags indicating respective additional coding tools to be constrained for the video, and wherein an expected value of the additional bit number M is 0 or 6; and in response to determining that the value of the additional bit number M is equal to 0, indicating that the flags of the additional coding tools to be constrained for the video do not exist in the code stream of the video, and the value of the flags is inferred to be equal to a specific value.

The application discloses a power control method and device of an uplink control channel, so that when time-frequency resources of a first PUCCH used for carrying a first UCI and time-frequency resources of a second PUCCH used for carrying a second UCI overlap, a terminal transmits the first UCI and the second UCI through a third PUCCH by using a first power, wherein the first power is determined according to a bit number of the first UCI and / or a bit number of the second UCI, so that transmission reliability of the UCI in the scenario can be improved.

A digital power control method, comprising the following steps: (1) determining the power control coefficient bit number as PA according to the quantization level bit number OUT of the digital signal whose power needs to be adjusted; (2) calculating the power control coefficient A p , the calculation formula of the power control coefficient A p is as follows: x dB is the power value needing to be adjusted, the range of A p is (0~(2 PA-1 -1)); (3) quantizing A p into a binary number, the binary number bit number is PA, and multiplying the quantized binary number by the digital signal whose power needs to be adjusted as the last set power control coefficient, so that the power control can be realized. The present application has the characteristics of simple method and high control precision.

The present application relates to a PPDU transmission method and apparatus, and a readable storage medium, the method comprising: an AMP device sending an AMP PPDU, the AMP PPDU comprising a synchronization field, a signaling field, and a payload, the synchronization field being generated based on a synchronization sequence, the synchronization sequence being used to indicate or correspond to at least one data rate, the signaling field being generated based on the synchronization field, and the payload being generated based on the synchronization field; the first information in the signaling field is used to indicate a data rate of the payload in conjunction with the synchronization sequence. By adopting the method and the device, the bit number of the signaling field can be saved, and the detection reliability of the synchronization sequence can be improved. The method and the device can be applied to the AMP field, such as supporting WPT, WLAN or IEEE series protocols. The method is suitable for IEEE (Institute of Electrical and Electronic Engineers) 802.11 protocols related to AMP (Amplification Management Protocol) or other protocols suitable for IEEE 802.11 series, such as 802.11 a / b / g / n / ac / ax / bee / bn protocols and the like.

The application provides a compression parameter analysis calculation method and system of an LZ77 compression algorithm, comprising judging whether an LZ77 code of compressed data stream adopts a flag bit method or an escape code method; for the flag bit method, using obtained flag bit B, bit number D of distance code and bit number L of length code to decompress data stream S to obtain compressed data stream Q, and determining that the bit number of distance code is L; for the escape code method, analyzing distance code with distance K and extension code; in response to K>L, generating special compressible data with distance 1-4 to inject an LZ77 compressor to obtain compressed data, and calculating distance escape code and extension code with distance 1-4. The method calculates LZ77 compression parameters according to enumeration, so as to realize data decompression, solve the problem of decompression of a black box compressor, and has great innovation and practical significance in the application of data analysis.

Systems and methods for building and utilizing a k-dimensional tree that is complete and pointer-free tree are disclosed herein. In an embodiment, the method includes determining a relative magnitude between (i) half of a high-bit number being the largest number that is a power of two less than or equal to the number of data points at respective node, and (ii) the difference between the number of data points and the high-bit number, splitting the respective node with a hyperplane that places a number of points on the left side of the hyperplane equal to (a) the high-bit number or (b) the sum of half of the high-bit number and the difference between the number of data points and the high-bit number, until each branch of the KD-CPF tree terminates at a leaf node.

Provided are a data storage device and a decoding combination selecting method. The data storage device includes a non-volatile memory and a processing circuit. The non-volatile memory includes a plurality of blocks. Each block includes a plurality of pages. A decoding combination selecting method is executed by the processing circuit to include: periodically reading a page in the non-volatile memory to update state parameters of a first block including the page in a block state table; and selecting one of a plurality of decoding combinations based on the state parameters of the first block in the block state table to decode the first block. The state parameters include a charge leakage degree value, a potential offset degree value, a first offset voltage and a second offset voltage, and a first bit number and a second bit number respectively corresponding to the first offset voltage and the second offset voltage.

The application discloses a code rate control method for inhibiting super-large I frame. According to the coding state of a current video sequence, the upper limit value of the coding bit number of the I frame which will not cause code rate control abnormality is calculated. According to the actual coding bit number, the quantization parameter and the intra-frame coding complexity of the previous coded I frame, in combination with the upper limit value of the coding bit number and the intra-frame coding complexity of the to-be-coded I frame, the lower limit value of the quantization parameter of the to-be-coded I frame is calculated. According to the quantization parameter of the previous coded P frame or B frame, the quantization parameter of the to-be-coded I frame which has inhibiting effect on the breathing effect is calculated. The larger value of the lower limit value of the quantization parameter of the to-be-coded I frame and the quantization parameter of the to-be-coded I frame which has inhibiting effect on the breathing effect is selected as the quantization parameter of the to-be-coded I frame, which is used in the actual coding process of the to-be-coded I frame. The application takes the video frame level quantization parameter as the operation core of the code rate control algorithm, which is more suitable for hardware implementation.

The application relates to a power line carrier target data modulation method and device, a storage medium and a chip. The method corrects the signal-to-noise ratio of each resource group based on a preset diversity number, then determines the bit number of each to-be-transmitted symbol sent based on the corrected signal-to-noise ratio, then calculates the to-be-transmitted symbol number according to the bit number of target data and the preset diversity number, and finally modulates the target data based on the modulation mode corresponding to the minimum to-be-transmitted symbol number and the preset diversity number by comparing the to-be-transmitted symbol numbers under different preset diversity numbers. The application dynamically adjusts the resource group configuration parameters according to the signal-to-noise ratio of each resource group, thereby adapting to the change of a channel condition, improving a communication rate and a communication success rate.

The application relates to the technical field of ID generation, in particular to a dynamic self-description unique ID generation method and system. The method comprises the following steps: S1, obtaining an instance code, and calculating the effective binary bit number of the instance code as a length indication field; S2, obtaining a current system timestamp, performing a rollback state judgment based on the timestamp and a historical time maintained by the system, setting a rollback state field according to a judgment result, and the rollback state field at least comprising a rollback identification bit and a plurality of cycle state counter bits; the rollback identification bit is used for identifying whether in a time rollback window, and the cycle state counter bits are used for distinguishing different running periods and continuous rollback events; S3, comparing the relationship between the length indication field and a preset mode switching threshold, and determining an ID dynamic part according to a comparison result, wherein the dynamic part comprises an instance code and a natural sequence number; and S4, splicing the timestamp, the length indication field, the rollback state field and the dynamic part to obtain a globally unique ID.

The invention discloses an encoder protocol conversion method and module applied to a servo driving device, and belongs to the technical field of servo control, and the method comprises the steps: constructing and storing a simulation algorithm which is used for converting first state data, obtained through A-Format protocol conversion, of an absolute value encoder into first state data; converting and simulating second state data output by the SSI encoder according to a preset variable parameter; obtaining first state data output by the current encoder and a preset variable parameter, generating second state data, and sending the second state data to the servo driver supporting the SSI protocol; the preset variable parameters are used for configuring the updating frequency of the state data and the cutting bit number of the position data and setting a single-circle or multi-circle working mode, the compatibility of a traditional servo driver to an encoder supporting an A-Format protocol can be effectively expanded through the scheme, a protocol conversion algorithm is achieved through hardware, and the reliability of the servo driver is improved. Robustness is high, delay is low, data transmission is stable, and power consumption is low; encoder parameters can be configured and stored, and compatibility with all absolute value encoders in the market is high.

A data storage device includes a non-volatile memory and a processing circuit, the non-volatile memory including a plurality of blocks, each block including a plurality of pages, the decoding combination selection method is executed by a processing circuit and comprises the following steps: periodically reading any page in a non-volatile memory to update a state parameter of a first block comprising the any page in a block state table; and selecting one of a plurality of decoding combinations according to the state parameter of the first block in the block state table so as to decode the first block, wherein the state parameters comprise a charge leakage degree value, a potential offset degree value, a first offset voltage, a second offset voltage, a first bit number and a second bit number, wherein the first bit number and the second bit number correspond to the first offset voltage and the second offset voltage respectively.

The application relates to an encoding method, a decoding method, an encoder, a decoder, a computing device, a medium and a program product. The encoding method comprises the following steps: dividing tensor data to be encoded into a plurality of data blocks, wherein the plurality of data blocks correspond to at least one data format; matching a scaling factor for a current data block in the plurality of data blocks, so that data in the current data block shares the scaling factor, and the highest bit of the scaling factor indicates a corresponding data format matched with the current data block; and obtaining an encoded data block with a data representation with a predetermined bit number based on the scaling factor and the corresponding data format. The application can improve the flexibility of the constructed low-precision data representation, and facilitate adaptive adjustment according to the characteristics of different neural network layers or computing tasks.

The application provides a vue-based amount component implementation method and system, including the following steps: S1, encapsulating a formatted amount component based on a vue framework, setting parameters and a processing method corresponding to the parameters; S2, encapsulating a method function in the amount component; S3, registering the encapsulated amount component, introducing the amount component into a function module, and configuring attribute parameters to be transmitted; and S4, inputting an amount in the amount component after the attribute parameters are configured, to realize customized conversion of the amount. The application realizes various operations on the amount, standardizes the amount, realizes distinguishing of currency symbols of input amounts and display forms of amounts of different currencies, realizes bit number verification of the amount, and realizes conversion between a digital amount and Chinese characters of a capital amount.

The embodiment of the invention discloses a coding and decoding method, a code stream, a coder, a decoder and a storage medium, and the method comprises the steps: decoding the code stream, and determining a value of first syntax element information and a value of at least one piece of second syntax element information; wherein the first syntax element information is used for indicating the number of bits occupied by the point value of the current macro block, the ith second syntax element information is used for indicating the ith bit corresponding to the point value of the current macro block, and i is an integer greater than or equal to 0 and less than the value of the first syntax element information; and determining a point value of the current macro block according to the value of the first syntax element information and the value of the at least one piece of second syntax element information. Therefore, the coding and decoding efficiency can be improved.

The invention relates to an auxiliary control system-based AC / DC power supply system station end equipment management method and system, which relates to the field of data processing, and processes an AC control mode, a DC control mode and environmental parameters from an AC / DC power supply system station end and equipment service time through an equipment state simulator bound with preset bit number equipment. Obtaining an equipment state confidence interval; receiving equipment state monitoring time sequence information, and comparing the equipment state monitoring time sequence information with the equipment state confidence interval to obtain a deviation vector time sequence matrix; and based on a historical sample library, counting a trigger period concentrated value of a fault sample set of the preset bit number equipment model satisfying the deviation vector time sequence matrix, and performing monitoring period management on the preset bit number equipment, thereby solving the problem that accurate monitoring and management cannot be performed according to the differential characteristics of the AC / DC power supply system station end equipment. And the accuracy and the efficiency of equipment health management are not enough.

The application discloses a kind of digital hybrid coding methods based on large model, including the following steps: S1, pre-processing to be encoded data;S2, feature learning method driven by diffusion model is used to feature coding to pre-processing data;S3, neural network coding is carried out to feature coding data, and based on variable bit rate quantization method dynamically adjusts encoding bit number;S4, adaptive entropy coding is carried out to neural network coding data, based on normalized stream entropy coding method carries out probability density transformation;S5, discrete transform coding is carried out to entropy coding data, and hierarchical sub-block quantization method is used to execute hierarchical quantization to different frequency components;S6, based on A3C optimization transform coding data's code length distribution and entropy coding parameter, extract lightweight coding model from diffusion model using knowledge distillation method, generate final optimization coding data.The application improves data compression efficiency and coding quality significantly by hybrid coding and dynamic optimization strategy.

The application provides a serial transceiver-based data transmission method, a transceiver, a medium and equipment, and the method comprises the following steps: a serial transceiver switches clock frequency in the process of transmitting frame data, sends clock frequency switching information to a sending end parallel-serial conversion unit, and repeatedly writes current frame data into a sending data buffer; the sending end parallel-serial conversion unit reads parallel valid data of a preset bit number in the current frame data, counts the read bit number through a counter, and after receiving the clock frequency switching information, judges whether the count value is equal to the preset bit number value; if yes, it is determined that the parallel valid data is serialized, and serial data is obtained; the receiving end serial-parallel conversion unit converts the serial data into parallel data, and after detecting a frame header in the parallel data, it is determined that the frame header is in the aligned frame data, and the frame data is written into a receiving data buffer. The application realizes switching of data transmission rate of the serial transceiver in the data transmission process.

Computer-implemented role management procedure for at least one service (S1, S2, S3), in particular a microservice, in a distributed system environment, wherein this procedure comprises the following process steps: - Providing, by an entity providing an authentication service (AS), a look-up table (LUT0, LUT1) for the at least one service over a predefinable usage period, wherein the look-up table includes role names and their respective associated bit numbers, wherein the roles express one or more authorizations to use the at least one service by at least one user, and the bit number refers to a defined bit in the payload of an authentication token, which is used to identify the service authorization of the at least one user. - Sending a request to subscribe to one or more such services for a subscription period, wherein the request includes such an authentication token, - Comparison, by the aforementioned body, using the look-up table, to determine whether at least one bit set in the user data of the authentication token corresponds to a role that permits at least one service and whether the subscription period falls within or corresponds to the usage period. - the look-up table is updated when at least one additional bit number relating to such a defined bit has been added or removed, - Allowing the requested subscription if the matching is successful, and - otherwise, the requested subscription will be rejected.

The invention discloses a Chinese character braille conversion method and system oriented to embedded equipment. The method comprises the following steps: firstly, linearly storing a Chinese character pinyin library according to a GB2312 coding sequence, wherein each Chinese character pinyin data record adopts a fixed-length L byte; secondly, analyzing an area code byte Qh and a bit number byte Q1 from the GB2312 code; calculating a physical offset address of the Chinese character pinyin data according to the area code byte Qh and the bit number byte Q1, and adding the physical offset address with the initial physical address to obtain a final physical address; directly reading the Chinese character pinyin data with the fixed length of L from the final physical address; and finally, converting the Chinese character pinyin data into 6-bit braille codes, converting the 6-bit braille codes into 8-bit data through bit splicing and regrouping, and outputting the 8-bit data to an 8-bit data latch to drive braille dot matrix display. According to the method, traversal searching is replaced by direct address calculation, the algorithm time complexity is improved, and the method is suitable for an embedded environment and has the advantages of being high in efficiency and low in resource occupation.

A method for wireless communication includes: a terminal device detects, in a first search space, a PDCCH scrambled by at least one Group Radio Network Temporary Identifier (G-RNTI), where the first search space includes at least one of a Common Search Space (CSS) or a User Equipment (UE) specific Search Space (USS), and a number of types of bit numbers of Downlink Control Information (DCI) carried by the PDCCH scrambled by the at least one G-RNTI is less than or equal to a first threshold.

The invention provides a Hash slot watermark embedding and extracting method and device based on structured data, and relates to the field of electronic watermarking, and the embedding method comprises the steps: obtaining to-be-embedded watermark data and to-be-embedded structured data, and determining the total slot number of the to-be-embedded watermark data according to the length of the to-be-embedded watermark data and the line preset embedding bit number; generating a slot index value of the target line according to the identifier of the target line of the to-be-embedded structured data, a first preset part of the embeddable data of the target line and the total slot number; according to the slot index value and the line preset embedding bit number, determining a watermark bit fragment needing to be embedded in the target line from the to-be-embedded watermark data; and embedding the watermark bit segment into a second preset part of the embeddable data of the target row. Generating a slot index value through an identifier and an embeddable data fixed part, wherein watermark embedding does not depend on a data physical sequence; other column missing can still reduce the watermark only by relying on the identification and embeddable data.