Circuit structure for reducing input offset voltage of two-stage operational amplifier
An operational amplifier, offset voltage technology, applied in the direction of differential amplifiers, DC-coupled DC amplifiers, etc., can solve the problems of increasing circuit area, circuit complexity, etc., to reduce input offset voltage, low power consumption, and reduce offset. Effect
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[0017] The present invention will be described in detail below with reference to the drawings and specific embodiments.
[0018] Such as figure 1 As shown, the traditional two-stage operational amplifier circuit includes a first-stage ordinary differential amplifier circuit, a second-stage common source amplifier circuit and a compensation network; the first-stage ordinary differential amplifier circuit consists of a first NMOS tube m1, a second NMOS tube m2, and The third NMOS tube m5 is composed of the first PMOS tube m3 and the second PMOS tube m4. The second-level common-source amplifier circuit is composed of the fourth NMOS tube m7 and the seventh PMOS tube m6. The compensation network includes a series-connected zero suppression resistor R z And compensation capacitor C c . In addition, the reference current source I ref And the fifth NMOS tube m8 provides mirror currents for the third NMOS tube m5 and the fourth NMOS tube m7. Wherein, the source terminals of the first PM...
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