1420results about How to "Reduce offset" patented technology

An improved cutting head for a food product on a slicing machine including upper and lower mounting rings, a plurality of cutter support segments connected to the mounting rings, a cutting blade attached to a front edge portion of each cutter support segment, and opposed first and second pivot pins extending from upper and lower portions of the cutter support segment and through the upper and lower mounting rings. Each of the pivot pins are positioned at a location closely adjacent to a forward edge of the cutter support segment and substantially near a cutting edge of the cutting blade.

Accelerometer offset is reduced by forming mass support structures within an inner periphery of the mass, affixing the mass support structures to the substrate by at least one anchor positioned near the mass' center of mass, and affixing the sensing fingers proximate to the anchor. The mass support structures can be affixed to the substrate using a single anchor or multiple anchors that are positioned close together. The sensing fingers can be affixed to the substrate or to the mass support structures. The mass is typically suspended from within its periphery but toward its outer periphery.

A balanced positioning apparatus comprises a balance mass which is supported so as to be moveable in the three degrees of freedom, such as X and Y translations and rotation about the Z-axis. Drive forces in these degrees of freedom act directly between the positioning body and the balance mass. Reaction forces arising from positioning movements result in corresponding movement of the balance mass and all reaction forces are kept within the balanced positioning system. The balance mass may be a rectangular balance frame having the stators of two linear motors forming the uprights of an H-drive mounted on opposite sides. The cross-piece of the H-drive spans the frame and the positioned object is positioned within the central opening of the frame.

An ADC is disclosed which has, as a first stage, a successive approximation converter, or other compensated, direct comparison converter, followed by a sigma delta modulation converter as a second stage. The sigma delta converter may beneficially be a first order modulator. The resulting ADC combines accuracy with low power consumption per conversion, and thus is particularly suited for use in temperature sensors for applications such as RFID transponders. Such a temperature sensor and an RFID transponder are also disclosed. There is also disclosed a method of analog-to-digital conversion, comprising a first successive approximation register or other compensated, direct comparison conversion stage followed by a sigma delta modulation stage, which, further, may be combined with providing a proportional-to-absolute-temperature (PTAT) signal, for low-power, accurate temperature sensing.

A suspended-load backpack designed to permit the load to move relative to the backpack frame during walking and running so that the large movements between the load and the frame of the backpack reduce the fluctuations of absolute vertical motion of the load. Because the hip (and thus the pack frame) go up a down a good deal during walking, a large relative movement between the frame and the load reduces the absolute excursion of the load. This movement may be, in turn, transferred to a motor through, for example, a rack and pinion gear, to convert the mechanical movement to electrical energy. The movement may also be converted to electrical energy by using an electroactive polymer (EAP) to connect the suspended load to the frame. Such designs allow the load to move in a controlled fashion to prevent the patient from losing his or her balance as the load moves up and down along the backpack frame. Such movement of the suspended-load relative to the frame also reduces the forces on the wearer's shoulders while walking or running, thus reducing the likelihood of orthopedic injury.

The invention relates to a shift register and a grid line drive device thereof. The shift register comprises a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a first capacitor, a discharge module and a compensation module. A gird of the first thin film transistor is connected with a first node, a source electrode of the first thin film transistor is connected with a clock signal end, and a drain electrode of the first thin film transistor is connected with a same-level output end; a grid of the second thin film transistor is connected with a second node, a source electrode of the second thin film transistor is connected with the same-level output end, and a drain electrode of the second thin film transistor is connected with a low level signal end; a grid of the third thin film transistor is connected with the first node, a source electrode of the third thin film transistor is connected with the low level signal end, and a drain electrode of the third thin film transistor is connected with the second node; a grid of the fourth thin film transistor is connected with the second node, a source electrode of the fourth thin film transistor is connected with the low level signal end, and a drain electrode of the fourth thin film transistor is connected with the first node; the first capacitor is connected between the clock signal end and the second node; the discharge module is connected between the clock signal end and the same-level output end; and the compensation module is connected between the first node and the low level signal end. The invention has the advantages of low cost, low power consumption, long service life, high stability, strong interference resistance, small delay, and the like.

A UPS includes an AC output, power factor control circuitry; and a DC bus coupled to the power factor control circuitry where the power factor control circuitry is configured to determine a difference in instantaneous power supplied to the AC output and to adjust a voltage of the DC bus based, at least partly, on the difference. In one embodiment, the UPS includes a single phase AC input. In another embodiment, the power factor control circuitry is configured to determine a cumulative difference in instantaneous power supplied to the AC output.

The embodiment of the invention provides a mask plate assembly, an installation method thereof and an evaporation device, and relates to the technical field of display. The offset of the mask plate when a mask plate is attached to a backboard can be reduced, and then the product yield is improved. The mask plate assembly comprises a supporting frame and the mask plate fixed to the supporting frame. The mask plate comprises an effective mask area and an ineffective mask area surrounding the effective mask area. The mask plate assembly further comprises a first supporting strip fixed to the supporting frame. The first supporting strip is arranged on the side, away from the supporting frame, of the mask plate, the projection of the first supporting strip in the plane where the supporting frame is located and the projection of the mask plate in the plane where the supporting frame is located have a first overlapped part, and the first overlapped part is located in the projection area of the ineffective mask area in the plane where the supporting frame is located.

A method and apparatus for deriving MVP (motion vector predictor) for a block for three-dimensional video coding or multi-view video coding are disclosed. Embodiments according to the present invention replace an unavailable inter-view MV of one neighboring block with a disparity vector derived from depth data of a subset of a depth block corresponding to one neighboring block. A method and apparatus for generating additional candidates for motion vector prediction associated with Merge mode or AMVP (Inter) mode for a block are disclosed. Embodiments according to the present invention generate one or more additional MVP candidates to add to the MVP list if the MVP list size is less than a given list size. The additional MVP candidates are generated either by reducing precision of an available MVP in the MVP list or by adding an offset to the available MVP in the MVP list.

The invention discloses a wind farm energy storage capacity optimization method in consideration of optimal desired output and charge state. The method comprises the steps as follows: firstly, a computing method of an optimal desired output is proposed and utilizes a function with minimum square deviation of offset of a grid-connected power target value as an objective function, setting subjectivity of a stabilizing fluctuation output power target value is eliminated, and the computing method serves as the premise of energy storage capacity optimization; secondly, an energy storage SOC (state of charge) parameter is introduced, charge-discharge power is timely adjusted on the basis of the fuzzy control theory, SOC and charge-discharge states, an energy storage charge-discharge strategy is built, and excessive charge and discharge are effectively restrained; and finally, an optimal model is built with minimum sum of the penalty cost associated with the SOC and the operation cost, so that the energy storage capacity optimization integrating a schedule decision-making requirements, energy storage operating service life and economic efficiency is achieved, and related optimizing problems are solved with improved PSO (particle swarm optimization). The solution algorithm provided by the method is fast, efficient, and strong in convergence capacity.

The invention discloses a driving method of a display panel. The display panel comprises a plurality of pixel groups, wherein each pixel group comprises two pixel units arranged adjacently along a first direction; each pixel unit comprises sub-pixels arranged adjacently along a first direction; and a driving method of the display panel comprises the following steps: applying a driving voltage with opposite polarity to the two pixel units in the same pixel group; applying a driving voltage with opposite polarity to two adjacent pixel units; applying a driving voltage with same polarity to the sub-pixels in the same pixel unit; and separately applying a driving voltage with different voltage grades to the sub-pixels in two adjacent pixel units. The invention also discloses a driving apparatus of the display panel and a display apparatus. By adopting the display method of the display panel, the driving apparatus of the display panel and the display apparatus, the display effect of the display panel can be improved.

The invention provides a zero-counterweight barycenter deploying method for a parallel tiling tank satellite. The method comprises the following steps: (1) preliminarily calculating a satellite barycenter position; (2) preliminarily calculating an adjustable scope of a barycenter; (3) after testing mass characteristics of the satellite, acquiring a measured value of the barycenter, analyzing and calculating the mass and position of a to-be-adjusted propellant according to the measured value, and causing the barycenter to approach to the original point; (4) performing propellant filling for the satellite according to a calculating result of the filling quantity of the propellant of each tank, controlling different filling quantities, and meanwhile, setting a work state after filling. The invention provides the new barycenter deploying method for a parallel tiling tank layout high-orbital satellite; under the condition of not increasing the total mass of the satellite, the original barycenter offset of the satellite is reduced, so that the barycenter variation of a satellite orbital transfer section is reduced, the disturbance torque is reduced, the safety of the satellite orbital transfer is ensured, the consumption of the propellant is reduced, and the service life of the satellite is prolonged.

A method for operating a sensor element having two contact terminal pairs, comprises steps of providing a first measurement value by applying a first controlled variable having a first polarity between the first terminal pair, and coupling the second terminal pair with output terminals; providing a second measurement value by applying a second controlled variable, having an opposed polarity, between the first terminal pair, and coupling the second terminal pair to the output terminals; providing a third measurement value by applying the first variable between the second terminal pair, and coupling the first terminal pair with the output terminals, providing a fourth measurement value by applying the second variable between the second terminal pair, and coupling the first terminal pair with the output terminals; and determining a sensor signal on the basis of a difference between the first and second values and a difference between the third and fourth values.

The present invention relates to a magnetoresistive sensor for measuring a magnetic field. A calculation of the sensitivity to external magnetic fields is provided, and it is shown to be related to the shape anisotropy of the magnetoresistive sensing elements. Moreover, it is shown that sensitivity may be made highest when the shape of the magnetoresistive element is long parallel to the sensing axis, and a magnetic bias field strong enough to saturate the magnetoresistive element's magnetization, Hcross, is applied perpendicular to the sensing axis. A monolithic permanent magnet is provided to generate the Hcross and it may be applied at an angle in order to counteract non-ideal fields along the sense axis direction. The high sensitivity magnetoresistive element can be used in many electrical form-factors. Six exemplary bridge configurations are described herein.

A UPS includes an AC output, power factor control circuitry; and a DC bus coupled to the power factor control circuitry where the power factor control circuitry is configured to determine a difference in instantaneous power supplied to the AC output and to adjust a voltage of the DC bus based, at least partly, on the difference. In one embodiment, the UPS includes a single phase AC input. In another embodiment, the power factor control circuitry is configured to determine a cumulative difference in instantaneous power supplied to the AC output.

The embodiment of the invention discloses a display panel, a driving method and a display device. The display panel comprises a substrate base plate, wherein the sub-pixels are located on one side of the substrate base plate; a switch module; wherein the first end is electrically connected with the first end of the driving module, and the second end is connected with the bias compensation voltage end; the picture updating period comprises a data writing stage and a maintaining stage; the maintaining stage comprises a first stage and a second stage; the driving module is used for generating a driving current according to the data voltage transmitted by the data writing module in a data writing stage; the driving circuit is also used for providing driving current for the light-emitting element in a second stage; the switch module is used for providing bias compensation voltage for the first end of the driving module in a first stage. The problem of insufficient brightness of an existing display panel due to the hysteresis effect of the driving transistor is solved, the offset of the bias voltage of the driving transistor can be reduced in advance, the electrical performance of the driving transistor is improved, the accuracy of the light-emitting brightness in the light-emitting stage is guaranteed, and the display effect of the display panel is improved.

The invention provides a display device, a display panel thereof, and a transparent display panel. A first sub-pixel of the transparent display panel is arranged to comprise a light-transmitting area and a non-light-transmitting area, wherein the non-light-transmitting area is provided with a first light reflecting anode, a first light-emitting structure layer and a first cathode in a stacked mode, and the light-transmitting area completely wraps the non-light-transmitting area, or the non-light-transmitting area completely wraps the light-transmitting area. The light emitted by the first light-emitting structure layer can be reflected back and forth between the first light-reflecting anode and the first cathode for multiple times to form a microcavity effect, so that the light-emitting efficiency is enhanced, the frequency spectrum is narrowed, and the display quality of the transparent display panel is improved; when the full screen displays, the color coordinates of the light-transmitting display area and the non-light-transmitting display area are basically consistent, and deviation is avoided. The non-light-transmitting area is completely wrapped by the light-transmitting area, or the non-light-transmitting area is completely wrapped by the light-transmitting area, so that light emitted by one first sub-pixel can be uniformly diffused to all pixels around, the color coordinate offset is reduced, and the color rendering consistency under different visual angles is improved.

A differential amplifier includes an input stage, an output stage, and a control unit. The input stage generates differential currents in response to a voltage difference between differential input signals. The output stage generates an output signal at an output node. The control unit is coupled between the input stage and the output stage and includes a floating current source comprised of a cascode load for biasing the output stage with a quiescent current. Such a cascode load increases DC gain of the differential amplifier.

Data transfer scheme wherein data transfer rates can be effectively doubled with no increase in the clock speed of the interface. This is accomplished by allowing more than one data transfer to occur on a single clock cycle. This transfer scheme increases the transfer rate of the interface by multiplexing two data groups on the same interface. These data groups are transmitted from a source phase latch at approximately the same time as two strobe signals which have low skew with respect to the data. The master and slave strobe signals are logically combined to create an even latch enable signal and an odd latch enable signal that are used to latch and de-multiplex the multiplexed data groups at a receiving end of a pair of flow-though source synchronous latches.

An amplifier arrangement and a method for compensating for an offset in an amplifier is provided. A respective switch for connecting together the inputs in a compensation operating mode and for interrupting the feedback path in this operating mode is provided in an amplifier. A control device detects an output signal and drives a controllable current source, which can be coupled to one of the two inputs of the amplifier, in such a manner that a compensation current which minimizes the offset is provided. The arrangement and method can be used, for example, in transmission arrangements.

Methods, circuits, and apparatuses that provide Buffer Amplifier, containing Amplifiers and Buffer Drivers, one or more of the following: ultra low power Buffer Amplifier, capable of having high gain, low noise, high speed, near rail-to-rail input-output voltage span, high sink-source current drive capability for an external load, and able to operate at low power supply voltages. Methods, circuits, and apparatuses that provide regulated cascode (RGC) current mirrors (CM) capable of operating at low power supply and having wide input-output voltage spans.

The present invention relates to the field of automotive heat exchangers, and, in particular, to heat exchanger tanks with headers. This invention eliminates the need for use of an inner flange on the header using a collar that also acts as a rib, thereby providing a compact foot plus header tank arrangement with lower stress on the gasket mating surface of the header and tank. The present invention also provides a method for providing improved headering means for automotive heat exchangers with plastic tanks and headers.