34results about "Reference comparison" patented technology

The invention relates to an electrical system (1) comprising an electronic control unit (2) having at least one switch (5) with an output connected on one side to a load (3) and on the other side to a current source (10), the control unit (2) being configured to activate and deactivate the switch (5) and to establish an open-load diagnosis by measuring the voltage at the output of the switch (5) after the switch (5) has been deactivated. The invention also relates to a motor vehicle comprising such an electrical system (1). For the abstract: Figure 2.

Methods, apparatuses and systems for providing offset calibration and fault monitoring are disclosed herein. An example controller component may comprise: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a second branch of the resistance-based bridge circuit.

The present invention relates to a method for detecting an electric arc for a battery system (10) and comprising a step of determining a value of the operating voltage (VB) at the terminal terminals (2) of the battery system (10) and a value of the current (IB), further comprising the following steps of calculating a first ratio corresponding to a first voltage difference divided by the value of the operating voltage (VB) and a second ratio corresponding to a second difference divided by the value of the current (IB), monitoring a first detection criterion consisting of verifying whether the first ratio is equal to the second ratio and, a second detection criterion, whether the first voltage difference is greater than a first predetermined threshold, and generating an alert of an electric arc fault in the event of detection of the first and second criteria simultaneously. Figure 1.

The invention relates to a method (606) for determining peaks of incremental capacity curves of a battery cell, characterized in that it comprises: - an input of a sequence of actions (A1…AN), each characterized by predefined parameter values ​​(p, T, c, d, lc, r1, r2, SoCmin, SoCmax, DoD, N, F), to a learning model (208) previously trained by supervised training to provide, in response, for each action (A1…AN), at least one principal peak (P11, P21…P1N, P2N) of the incremental capacity curve associated with the action considered. Figure for the abstract: Fig. 5

The invention relates to a method (100) for predicting the end of life of a lead-acid battery. The method comprises, for each segment of a plurality of segments of a "constant voltage" phase, or CV phase, of a battery charging cycle: a collection (110) of several current measurements to form a "floating current" signal for the segment considered, a decomposition into empirical modes (120) of the floating current signal, a calculation (140) of an intrinsic energy for each intrinsic component obtained by the decomposition, a calculation (150) of a total intrinsic energy as a function of the intrinsic energies of the different intrinsic components, an evaluation (160) of an end-of-life detection criterion for the battery as a function of the total intrinsic energy. Figure for the abstract: Fig. 1

Measuring bridge (1) comprising a first matching element (2), a second matching element (3) and a third matching element (4) , wherein all matching elements (2, 3, 4) consist of at least three resistors (21, 22, 23, 31, 32, 33, 41, 42, 43) arranged in a T-structure, wherein a second resistor (32) of the second matching element (3) is connected to a second resistor (22) of the first matching element (2) and a third resistor (43) of the third matching element (4) is connected to a third resistor (23) of the first matching element (2) and wherein a second resistor (42) of the third matching element (4) can be connected to a measuring object (7), wherein a third resistor (33) of the second matching element (3) can be connected to a calibration standard (5), characterized by that a first resistor (31, 41) of the second and third matching element (3, 4) is connected to a signal input of a component (11) in the form of a balun (111) or a differential amplifier (112) that suppresses a common-mode component on its two signal inputs.

A signal processing circuit comprising: a first element and a second element connected in series between a first DC power supply and ground, the respective resistance values of which vary in response to a change in a physical quantity of an observation target; an operational amplifier having an inverting input terminal connected to a midpoint between the first element and the second element, a non-inverting input terminal connected to a second DC power supply, and an output terminal; and a feedback resistor connected between the output terminal and the inverting input terminal.

A voltage supervisor (VS) or voltage sensing circuitry or architecture that can detect fast voltage transients. To detect fast voltage transients, a dedicated differential pair is routed between a point of load, such as a die or other chip, processor, etc., and the circuitry of the voltage supervisor. By connecting the differential pair at the point of load, fast voltage transients may be detected at the load level (e.g., at the point of load) and thereafter used to enable, disable, and / or restart an electronic device, such as a die, chip, processor, or other electronic component or system.

Differential electrical protection device, associated electrical installation and control method The present invention relates to a differential electrical protection device (10) comprising a power supply circuit (16), configured to be powered with a power supply voltage (Ue), a coil (21), configured to switch contacts (23, 24) into an opening configuration, a control element (26), configured to switch between a conducting state and a blocked state, and an electronic control unit (18) comprising a power supply regulation module (42), configured to measure an internal current representative of the power supply voltage (Ue), and an information processing unit (90) configured to determine a phase of the power supply voltage (Ue), the information processing unit (90) comprising a control module,configured to control the control element (26) in the on state when a detection module detects a differential fault and the phase of the supply voltage (Ue) is equal to a tripping phase. Figure for the abstract: Figure 1,

The invention relates to a method for checking an intermediate circuit capacitance (121, 122, 123) in a direct voltage network, in particular in a vehicle, wherein the intermediate circuit capacitance (121, 122, 123) is connected between a direct voltage source (110) and a power converter circuit (130), wherein the power converter circuit (130) has a direct voltage side and an alternating voltage side and is designed to convert current between the direct voltage side and the alternating voltage side, wherein the power converter circuit (130) has a plurality of half-bridges (131, 132, 133), each having a high-side switching element (141, 142, 143) and a low-side switching element (144, 145, 146), comprising closing a high-side switching element (141) of a first half-bridge (131) of the plurality of Half-bridges (131, 132, 133) of the power converter circuit (130) and closing a low-side switching element (146) of a second half-bridge (133) of the plurality of half-bridges (131,132, 133) of the converter circuit (130) for a predetermined time interval when a predetermined condition is met; determining voltage values on the DC side of the converter circuit (130) during the predetermined time interval; and checking whether a fault and / or wear of the intermediate circuit capacitance (121, 122, 123) is present depending on the determined voltage values.

The invention relates to a method (100) for detecting a failure of a lead-acid battery. The method comprises, for each segment of a plurality of segments of a "constant voltage" phase, or CV phase, of a battery charging cycle: a collection (110) of several current measurements to form a "floating current" signal for the segment considered, a decomposition into empirical modes (120) of the floating current signal, a calculation (140) of an intrinsic energy for each intrinsic component obtained by the decomposition, a calculation (150) of a total intrinsic energy normalized as a function of the intrinsic energies and of a maximum intrinsic energy determined among the intrinsic energies of the different components, an evaluation (160) of a criterion for detecting a failure of the battery as a function of the total normalized intrinsic energy. Figure for the abstract: Fig. 1

Method for determining the resistance deflection of a Wheatstone bridge in a high-temperature environment, where The Wheatstone bridge is powered by an ASIC circuit, and the output voltage derived from the Wheatstone bridge is used as an input voltage signal (V). IN ) is passed to an ASIC signal path and in a first step is converted into a current signal, wherein in a second step the current signal is converted into a time signal and the time signal into a pulse width modulated (PWM) signal, wherein the value of a relative resistance deflection (ΔR / R) of the Wheatstone bridge is determined from the time lengths within the phase sequence of the pulse width modulated signal, characterized by the fact that the input voltage (V IN) before being passed to an instrumentation amplifier (INA) to a first switching matrix (SW1), whereby the first switching matrix performs a time-controlled switching between the input voltage signal (V) IN ), an inverted input voltage signal (V INV ), a zero-voltage signal V IN =0, V inp =V inn =V REF / 2 and a span-voltage signal V IN =V REF / K is performed, where K is a device-dependent factor, wherein a second switching matrix initiates a charging and discharging cycle of a capacity (C) and a conversion of a differential signal between V inp and V inn a time signal is generated and a digital component (DIG) switches between the charging and discharging cycles of the capacity, the pulse width modulated signal (PWM) is output via a comparator circuit (COMP) and the digital section (DIG).

Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

The method comprises a data acquisition step, a thermal distribution estimation step within the cell (MP), and a thermal gradient calculation step based on the thermal distribution. The estimation step includes calculations based on an application of the Fourier heat equation, using the so-called "finite volume" method, and a mesh (MD) modeling a spiral layer winding of the cell. The mesh comprises parallelepiped cells (Mi1, Mi3) modeling a central part (PC) and rounded cells (Mi2, Mi4) modeling lateral flanks (FG, FD) of the winding. According to the invention, the rounded cells of one flank and the rounded cells of the other flank have different radii of curvature (rmax, rmin), with a rounded cell of one flank having, within the same layer of the winding, a radius greater than that of a corresponding rounded cell of the other flank. Figure 5

A method includes setting first and second capacitor plates of a capacitive structure to an initial displacement position; applying a known control voltage to at least one of the first and second capacitor plates to generate a first displacement; measuring a first capacitance of the capacitive structure at the first displacement; setting the first and second capacitor plates to a second displacement; measuring a second capacitance of the capacitive structure at the second displacement; determining the difference between the first and second capacitances to determine the difference between the first and second displacements; and adjusting the control voltage based on results of the determining operation.

Measurement circuitry comprising: a first half bridge, comprising: a first impedance coupled between an input voltage node for receiving an input voltage and a first node; and a second impedance coupled between the first node and a reference voltage node, the first impedance or the second impedance comprising a first voltage-controlled oscillator (VCO) having a first input coupled to the first node and a first output for outputting a first oscillating signal having a first frequency proportional to a current flowing in the half bridge.

A strain gauge assembly includes: a strain gauge comprising a plurality of resistive elements connected as a Wheatstone bridge or half Wheatstone bridge; an excitation signal generator arranged to provide an excitation signal to two resistive elements of the strain gauge; phase shifting circuitry arranged to determine phase shifts in the excitation signal responsive to changes in resistance of the two resistive elements and an end stage configured to output a measure indicative of the phase shift as an indication of strain on the assembly.

A sensor readout system (100) is provided. The sensor readout system (100) comprises a signal generator (101) configured to generate a biasing signal (102), a first chopper (103) configured to modulate the biasing signal (102) using a chopping signal (117) with a chopping frequency fchop to generate a modulated biasing signal (104) . It also comprises a Wheatstone bridge circuit (105) comprising four resistive branches (R1, R2, R3, R4), at least one of the four resistive branches comprises an impedance-based sensor (Rs1, Rs2, Rs3). The Wheatstone bridge circuit (105) is configured to receive the modulated biasing signal (104) and to generate a sensing signal (106) based on the modulated biasing signal (104). A second chopper (107) is configured to modulate the sensing signal (106) using the chopping signal (117) with the chopping frequency fchop to generate a modulated sensing signal (108) .

Energy storage device (1), with: a plurality of parallel-connected power supply branches (Z), each coupled between an output terminal (1a, 1b, 1c) and a reference potential rail (4), wherein each of the power supply branches (Z) has a plurality of series-connected energy storage modules (3), each comprising: an energy storage cell module (5) which has at least one energy storage cell (5a, 5k), a coupling device (7) with coupling elements (7a, 7d; 7b, 7c) which are designed to selectively connect the energy storage cell module (5) to the respective energy supply branch (Z) or to bypass it in the respective energy supply branch (Z), and a current sensor device (8, 9a, 9b) which is connected in series to the at least one energy storage cell (5a, 5k) and which is designed to measure a current through the energy storage cell module (5) and to output it as a module current measurement signal; and a control unit (6) which is coupled to each of the current sensor devices (8, 9a, 9b) and which is designed to process the module current measurement signals of the current sensor devices (8, 9a, 9b), wherein the control unit (6) is further designed to control the coupling devices (7) of the energy storage modules (3) either in pulse-width modulated operation or in continuous current operation, and to average only the module current measurement signals of the current sensor devices (8, 9a, 9b) of those energy storage modules (3) which are controlled in continuous current operation to form a branch current measurement signal.

A method and apparatus for sensing common-mode feedback current are provided. The common-mode feedback current can flow through the common-mode resistive divider of a piezoresistive bridge. A first current mirror mirrors the common-mode feedback current and provides a first mirrored common-mode current. A current-converging stage receives the first mirrored common-mode current and determines the bridge current of the piezoresistive bridge based on the first mirrored common-mode feedback current. Before determining the bridge current, a second current mirror can be used to mirror the first current mirror.

A continuous time single drive capacitance-to-voltage (C2V) converter can be employed for single sensor, balanced single sensor, or differential sensor. First sensor and / or second sensor can be employed to sense a condition. A capacitive bridge can comprise a first capacitive digital-to-analog-converter (DAC) and second capacitive DAC as a differential node. First capacitive DAC can be associated with first sensor, and second capacitive DAC can be associated with a third capacitive DAC, in series with first sensor, if single sensor is implemented or the second sensor if balanced single sensor or differential sensor is implemented. Capacitive bridge can be connected to differential input of a capacitive feedback amplifier that can be a continuous time amplifier with no signal sampling and no noise folding. Capacitive feedback amplifier can comprise capacitively coupled input common mode feedback, which can remove noise from a sensor drive, and output common mode feedback.

The present disclosure relates to methods and apparatus for improving common mode rejection ratio and systems including such apparatus. Changes in common mode voltage may adversely affect differential sampling circuits. Changes in common mode voltage may change the on-resistance of transistor switches, which may mean that small signal changes are not correctly observed for larger common mode signals. The present disclosure relates to methods for improving the ability to resolve small differential signal changes by changing the power supply or drive voltage to components to compensate for common mode voltage changes.

The present invention relates to a method for monitoring the energy level of an electrical energy source capable of delivering a reference electrical power PRef for a reference duration DTref for a reference load level NRef. Said source comprises at least one electrical energy storage device and several sensors. The method includes acquiring parameters of said electrical energy source (10) via said sensors, and then calculating a main consumption duration DTprin during which said source is capable of supplying an electrical current carrying said reference electrical power PRef, as a function of said source parameters. Subsequently, a main display of key symbols (31) indicating said main consumption duration DTprin is provided to show an operator how long the source can supply said reference electrical power PRef.Abbreviated figure: figure 6.

The present invention relates to a method for monitoring an energy level of an electrical energy source capable of delivering a reference electrical power PRef during a reference duration DTRef for a reference load level NRef. Said source comprises at least one electrical energy storage device and several sensors. Said method comprises an acquisition of parameters of said electrical energy source (10) via said sensors, then a calculation of a main consumption duration DTprin during which said source is capable of providing an electric current carrying said reference electrical power PRef, as a function of said parameters of said source. Then, a main display of main symbols (31) indicating said main consumption duration DTprin is carried out in order to indicate to an operator for how long the source can provide said reference electrical power PRef.Abbreviated figure: figure 6.

The invention relates to a silicon capacitor wafer test system and test method, which is applied to the field of wafer test and comprises a wafer acquisition module and a wafer test module. The wafer acquisition module is used for automatically acquiring a to-be-tested wafer when receiving a wafer test instruction, and placing the to-be-tested wafer at a preset test position; the wafer test module is used for testing the wafer to be tested and outputting a test result; the wafer test module comprises a control board card, a plurality of digital bridge board cards and a plurality of voltage and current source board cards; the control board card is used for controlling the wafer test module to test the wafer to be tested; the plurality of digital bridge board cards are used for testing the capacitance value of the wafer to be tested in parallel; and the plurality of voltage and current source board cards are used for testing the capacitance leakage current of the wafer to be tested in parallel. The wafer testing method has the technical effects of preventing the wafer from being damaged, improving the wafer testing efficiency and being suitable for batch testing of wafers.

The invention relates to a method (100) for predicting the end of life of a lead-acid battery. The method comprises, for each segment of a plurality of segments of a "constant voltage" phase, or CV phase, of a battery charging cycle: a collection (110) of several current measurements to form a "floating current" signal for the segment considered, a decomposition into empirical modes (120) of the floating current signal, a calculation (140) of an intrinsic energy for each intrinsic component obtained by the decomposition, a calculation (150) of a total intrinsic energy as a function of the intrinsic energies of the different intrinsic components, an evaluation (160) of an end-of-life detection criterion for the battery as a function of the total intrinsic energy. Figure for the abstract: Fig. 1

The invention relates to a method (606) for determining peaks of incremental capacity curves of a battery cell, characterized in that it comprises: - an input of a sequence of actions (A1…AN), each characterized by predefined parameter values ​​(p, T, c, d, lc, r1, r2, SoCmin, SoCmax, DoD, N, F), to a learning model (208) previously trained by supervised training to provide, in response, for each action (A1…AN), at least one principal peak (P11, P21…P1N, P2N) of the incremental capacity curve associated with the action considered. Figure for the abstract: Fig. 5

A process that exhibits: Detecting at least one operating parameter in an electronic circuit that includes a monitored LED chain (3); Setting a voltage threshold (S3) TH ) based on at least one detected operating parameter; Detecting a chain voltage (S3) across the monitored LED chain (3); Comparing the chain tension (S3) with the tension threshold (S3 TH ), and Detecting a defect in the LED chain (3) based on comparison, where at least one operating parameter is a voltage (V) F3m ) above a monitored LED (3 m ) in the LED chain, where the setting of the voltage threshold (S3) TH ) increasing the voltage threshold (S3 TH ), if the voltage (V F3m ) increases, shows.

The invention relates to a method for controlling a superconducting power line (100) implemented in a control circuit (10). The method comprises obtaining (S1) information representing a first electric current in said superconducting power line, and then, if (S2) said information representing a first electric current is greater than or equal to a first predetermined threshold value, generating a current (S3), called a second current, in a superconducting coil (108) arranged near said power line (100). The value of said second current is determined from said information representing said first current. The invention also relates to a control circuit (10) configured for implementing the method.Thus, it is possible to reversibly operate current limiting functions by initiating a quench phenomenon in the said superconducting power supply line. Fig. 1.

Disclosed herein are methods, devices, and systems for providing offset calibration and fault monitoring. An exemplary controller component may include: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit, the first diagnostic circuit configured to monitor the output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit, the second diagnostic circuit configured to monitor the output of a second branch of the resistance-based bridge circuit.