27results about "Electric unknown time interval measurement" patented technology

Monitoring track tension of track-enabled work machines using work machine acceleration and transmission speed sensors is provided. When a speed change of a work machine is detected, a timer is started. When an acceleration or deceleration of the work machine is detected, the timer is stopped. Elapsed time between the start of the speed change and the detection of acceleration or deceleration may indicate an amount of time required for taking up slack or sag in a work machine track. If the time required for taking up the slack or sag is excessive, an indication may be received that the track is too loose. If time required for taking up the slack or sag is minimal, an indication may be received that the track is too tight. The determination of the time required for taking up the slack or sag may indicate that tension in the track requires adjustment.

A processing system includes a peripheral device configured to store security information and having a clock input to receive a gated clock; a watch clock generator configured to generate a watch clock having a reduced duty cycle relative to the system clock; and clock control circuitry configured to select the system clock as a gated clock during normal operation of the peripheral device and select the watch clock as a gated clock during a low power mode of the peripheral device. The watch clock generator may include a counter that counts system clock cycles and a clock pulse selector, such as a mode circuit, configured to select the cycles of the system clock to generate a watch clock. For multiple peripherals, the delay circuitry may skew a watch clock between two or more peripherals. A plurality of watch clocks having different delayed duty cycles may be generated, each for a corresponding group of a plurality of groups of peripherals.

This utility model discloses a comprehensive monitoring sensor for the braking time of a start-stop mechanism brake, relating to the field of brake monitoring technology. The sensor includes an acceleration sensor, a high-voltage detection device, a brake wheel accessory, and a fixing device. The brake wheel accessory includes a mounting frame and a permanent magnet. The fixing device includes a mounting base, with a base fixedly connected to its upper surface. A top cover is positioned directly above the base, and a connecting buckle is provided at the connection between the base and the top cover. Both the base and the top cover contain PCB boards. The outer surface of the PCB boards contains a microcontroller, parallel-input / serial-output IC chips, a Hall effect ring array sensor, and electrical connection pads. This utility model achieves integrated monitoring of brake action time, braking time, running time, brake wheel speed, number of braking cycles, and brake anomalies.

The application relates to a TDC system, in particular to a high-resolution TDC system based on a complementary blind mechanism and a time interval measurement method; a first processing chip, as a main processing channel, is responsible for high-speed coarse-grained sampling of a to-be-measured analog signal, determination of a blind area position of a time interval, provision of a coarse delay measurement value, and calculation of a fine time measurement value sent by a second processing chip to obtain a high-precision time interval measurement result; the second processing chip, as an auxiliary processing channel, is responsible for fine complementary blind of the blind area determined by the first processing chip, fine-grained sampling of the to-be-measured analog signal, accurate measurement of a high-resolution fine time measurement value in the blind area, and sending to the first processing chip; the technical scheme provided by the application can effectively overcome the defects of the prior art, i.e., the high-performance TDC solution does not simultaneously consider high resolution, high data bandwidth, high integration and reasonable cost.

The present application relates to the technical field of precise time synchronization and trigger control, and particularly relates to a multi-stage system synchronous trigger device and method based on laser pulses. The multi-stage system synchronous trigger device based on laser pulses comprises: a photoelectric detection module, configured to receive laser pulses and convert the laser pulses into initial electrical signals; a constant fraction timing module, connected with the photoelectric detection module, configured to extract a zero-crossing point irrelevant to the amplitude of the laser pulses from the initial electrical signals, take the trigger time of the zero-crossing point as a time zero point, and output a reference trigger signal corresponding to the time zero point; and a trigger signal distribution module, connected with the constant fraction timing module, configured to distribute the reference trigger signal to multiple subsequent devices, so that the trigger time of each subsequent device is traced back to the time zero point.

The application belongs to the field of integrated circuit design, and discloses an undersampling analog-digital conversion circuit for a high-speed radio frequency direct sampling receiver, which comprises a radio frequency input end, a first-stage sampling and holding module, a layered charge distribution time interleaver, a plurality of time domain unit analog-digital conversion channels, and a clock generation and distribution module. By introducing passive charge distribution and a plurality of sub-buffers after single-stage sampling and holding, and by carefully optimizing the time windows and load distribution of each stage, the application can eliminate or significantly weaken the deviation and bandwidth mismatch problems caused by time interleaving from the architecture; at the same time, by using a "ping-pong passive residual transmission" accelerated hybrid time domain unit ADC structure, a high-speed unit ADC at a level of 3GS / s is realized, the length of high-frequency signal wiring and the distributed parasitic are further reduced, and thus the overall spectral purity and energy efficiency are improved.

This application proposes an anomaly timing processing system and method, relating to the field of electronic digital data processing. The proposed anomaly timing processing system includes an anomaly processing circuit and a timing circuit. The anomaly processing circuit is configured to receive an anomaly signal from a chip, wherein the anomaly signal includes a first type of anomaly signal. The anomaly processing circuit is further configured to receive a timing signal from the timing circuit and generate a first driving signal based on the timing signal and the anomaly signal, for enabling control of the timing circuit. The timing circuit is configured to generate a timing signal with a preset period based on its clock signal under the enabling control of the first driving signal. The timing circuit is also configured to generate a first reporting signal based on the first driving signal and the timing signal. The proposed anomaly timing processing system can generate a reporting signal of suitable duration according to the duration of the anomaly signal and can also achieve flexible processing of different types of anomalies.

The application relates to a correction method and system of a ring oscillator structure TDC, and relates to the technical field of time-to-digital conversion.The application is used to solve the problem that the sampling circuit of the existing ring oscillator structure TDC may be wrong when sampling the output changing delay unit, leading to inaccurate measured time interval.The application can eliminate the error caused by sampling the delay unit near the signal transmission edge by finding the boundary of the ring oscillator unit state change, i.e. the position of the signal transmission, and correcting the sampled ring oscillator state through logical judgment.

A system and method for estimating vehicle battery charging time using big data are provided. The system may include: a big data server configured to collect charging-related parameters of batteries in multiple vehicles to group the vehicles into groups based on the collected charging-related parameters, and to calculate and send a first estimated charging time for the group to which a vehicle belongs during vehicle charging; and a controller installed in each of the multiple vehicles and configured to calculate a second estimated charging time based on the state of the battery in the vehicle when the corresponding battery in the vehicle is being charged, and to calculate a final estimated charging time for the battery by combining the first and second estimated charging times.

This invention proposes a high-speed, high-linearity voltage-to-time converter circuit, comprising a sampling switch, a sampling capacitor, a comparator, and a current source. Existing voltage-to-time converters charge or discharge the sampled capacitor using the current source. After charging or discharging to the threshold voltage across the comparator, the comparator output inverts, thus converting two different voltage signals into a time difference signal with the comparator output inverted. This invention, building upon this, performs sampling and charging separately on both sides of the capacitor and utilizes a non-overlapping clock to control sampling, charging, and reset, overcoming the influence of different initial voltages on the sampling capacitor on the charging current, further improving the linearity of the voltage-to-time domain conversion.

The application provides a TDC circuit, a time interval measurement circuit and an electronic device, comprising: a first ring delay chain, a second ring delay chain, a first timer, and a second timer; the first ring delay chain is configured to cyclically transmit the timing start signal; the second ring delay chain is configured to cyclically transmit the timing end signal; the first counter is configured to count the number of cycles of the cyclic transmission of the timing start signal during the cyclic transmission of the timing start signal, and obtain first count information; the second counter is configured to count the number of cycles of the cyclic transmission of the timing start signal during the cyclic transmission of the timing start signal, and obtain second count information; and a processing module is configured to obtain the first count information and the second count information, and determine current time interval information based on the first count information and the second count information.

This application discloses a method, apparatus, device, and storage medium for digitizing flicker pulses. The method includes: presetting multiple thresholds, wherein the number of thresholds is greater than or equal to three; sampling the flicker pulse based on the multiple thresholds to obtain multiple sets of sampling point data corresponding to the multiple thresholds; determining two or three target thresholds from the multiple thresholds, wherein when there are two target thresholds, the largest or second largest threshold and the smallest or second smallest threshold are selected as target thresholds; when there are three target thresholds, the ratio of the threshold size interval between two adjacent target thresholds approaches 1 or is equal to 1; and determining the expression function corresponding to the flicker pulse based on the sampling point data corresponding to the at least three target thresholds. This application can achieve real-time processing of flicker pulses with low computational resource consumption.

The application discloses a design method of a time-to-digital converter based on a negative feedback time error amplifier, and relates to the field of semiconductor integrated circuit chip design. Specifically, the application is characterized in that: a traditional time-to-digital converter with a single delay chain is analyzed, the relative error of two delays is taken as the conversion precision, a high-precision time-to-digital converter with a Vernier delay chain is designed, coarse adjustment is realized, a time-to-digital converter with a multi-stage phase interpolation technology is used to improve the precision, fine adjustment is realized, the coarse adjustment and the fine adjustment are combined, a time error amplifier is inserted, a high-precision time-to-digital converter based on a time error amplifier is obtained, and the output signal of an SR latch is fed back to the input, and a plurality of time-to-digital converters based on the time error amplifier are cascaded. According to the method that the output signal of the SR latch is fed back to the input, the overall linearity of the time error amplifier is improved, and the design freedom of the time-to-digital converter can be greatly improved by using the time error amplifier based on the negative feedback.

The application discloses a multitask work hour measurement cycle timing system and method, and belongs to the technical field of timing equipment. The system comprises a multitask management module, a timing control module, a time display module, a data storage module, a data management module, a mobile adaptation module and an offline support module, can simultaneously independently time a plurality of production tasks, each timing unit can be independently named and equipped with a complete control button; the method realizes efficient timing through six steps of task initialization, timing control, cycle recording, data storage, data management and desktop shortcut creation. The system supports cycle recording one-key operation, centralized data storage and CSV format export, is adapted to multiple devices through responsive design and supports desktop shortcut creation, can clearly distinguish different tasks, and provides an accurate, convenient and systematic work hour measurement solution for industrial production.

The application discloses a time interval measuring device based on time-amplitude conversion, which generates a control signal according to a control word from a host computer to control the operation of the device; then, the FPGA controls an analog channel to measure the channel delay τ AB or τ BA , and completes the input signal preprocessing; then, a waveform comparison transformation integrates the output signal of the analog channel into a to-be-measured pulse signal which can be correctly processed by the FPGA; then, the FPGA performs time coarse counting, sub-period time extraction, sub-period time pulse widening and error correction on the to-be-measured pulse signal; finally, a time-amplitude conversion unit is used for sampling and quantization.

This utility model discloses a visual dynamic timer, including a timer body, a magnetic piece, and a support frame. The magnetic piece is embedded in the back of the timer body, and a groove for accommodating the support frame is recessed in the back of the timer body below the magnetic piece. The support frame is rotatably mounted in the groove. A spring-loaded portion is provided on the timer body within the groove, which elastically abuts against the support frame. When the support frame is rotated outward at a certain angle, the timer body and the support frame close together to form a V-shaped support structure. The technical solution proposed by this utility model integrates three mounting structures on the timer body, enabling flat placement, magnetic fixation, and bracket fixation, making it suitable for different usage scenarios. In addition, the scale area dynamically changes according to the time ratio, providing more direct visual feedback.

A voltage-to-time converter is provided, including a first amplifier stage, a second amplifier stage, and an inverter. The first amplifier stage is configured to receive a first input voltage and a second input voltage and generate a first voltage signal having a first slew rate to respond to a differential voltage between the first input voltage and the second input voltage. The second input voltage is higher than the first input voltage. The second amplifier stage is coupled to the first amplifier stage and configured to convert the first voltage signal to a second voltage signal having a second slew rate using a hybrid complementary push-pull structure. The second slew rate is higher than the first slew rate. The inverter is coupled to the second stage and configured to convert the second voltage signal to generate a time representation signal. Embodiments of the present application also provide a method of operating a voltage-to-time converter.

The present disclosure relates to the field of head-mounted display devices, and more particularly, to a test system and method for a head-mounted display device. The test system comprises a connecting mechanism for rigidly connecting a detection device and a head-mounted display device to enable synchronous movement of the detection device and the head-mounted display device, wherein the head-mounted display device displays a target image when motion is detected; the detection device comprises an inertial measurement unit and a light sensor, the detection device detects a first time point of movement of the detection device through the inertial measurement unit, and detects a second time point of display of the target image by the head-mounted display device through the light sensor, and determines a difference between the second time point and the first time point as an MTP time of the head-mounted display device.

A tachymeter device for indicating an average speed of a moving object and a wristwatch comprising such a tachymeter device comprise a timer and an activator for manually starting the timer, when the object passes a starting mark, and stopping the timer, when the object passes a defined distance from the starting mark. They further comprise a housing, a scale for indicating an average speed of the moving object and a pointer for indicating a measured average speed on the scale, wherein the measured average speed is derived from said defined distance and a time to cover said defined distance measured by the timer. The scale is designed as a scale part that is arranged detachably at the housing. The scale part is selected from a set of scales parts comprising a plurality of differing scale parts each having a scale with speed indication for indicating speed ranges corresponding to differing pre-defined distances.

A popcorn machine is provided herein. The popcorn machine comprises a kettle configured to cook popcorn kernels, a heater configured to heat the kettle, a first sensor configured to detect a first operational parameter during cooking of the popcorn kernels, a second sensor configured to detect a second operational parameter during cooking of the popcorn kernels, a drive assembly operatively coupled to the kettle and configured to automatically dump the kettle, and a controller communicatively coupled to the first sensor, the second sensor, and the drive assembly. The controller is configured to compare the first operational parameter to a first threshold value, compare the second operational parameter to a second threshold value, and activate the drive assembly to automatically dump the kettle when both the first operational parameter satisfies the first threshold value and the second operational parameter satisfies the second threshold value.

The utility model discloses a traffic light visual timer, including timer main part, the timer main part is built -in with PCB mainboard, the PCB mainboard one end from top to bottom interval is provided with three groups LED lamp of electric connection with it, three groups LED lamp can emit red, yellow, green three colors at least, the periphery direction of three groups LED lamp is provided with square lamp frame on timer main part, three lampshades are provided from top to bottom in square lamp frame, three lampshades with three groups LED lamp one -to -one corresponding setting, three groups LED lamp respectively according to countdown remaining time's length shows green, yellow, red three colors in turn, for simulating the same working condition with traffic light. The utility model provides technical scheme, and the timer provides the visual time prompt of high direct view through the operation logic of simulation traffic signal lamp, can effectively help student to perceive time elapse, divide task stage, cultivate self -discipline and time management ability.

The application provides a device and method for measuring the lifting time of an electric barrier, which comprises a voltage angle sensor, a signal conditioning circuit, an analog-to-digital converter and a microcontroller. The voltage angle sensor is installed on the barrier to monitor the inclination angle of the barrier and output a voltage signal corresponding to the inclination angle; the analog-to-digital converter is used to convert the analog voltage signal output by the signal conditioning circuit into a digital voltage signal; the microcontroller is connected to the analog-to-digital converter, and the microcontroller is configured to read the digital voltage signal output by the analog-to-digital converter at a preset sampling frequency. The application can not only calculate the total lifting time of the barrier, but also obtain the real-time running angular velocity and acceleration of the barrier, so as to facilitate the accurate identification of early hidden faults such as motor weakness, guide rail jamming and spring fatigue, and realize predictive maintenance.

The application provides a high-precision time measurement system and method, wherein the time measurement method comprises a signal conditioning circuit, a PLL frequency division, a coarse measurement module, a fine measurement module, a temperature compensation module, data processing and a network interface for external communication. The high-precision time measurement system comprises a reference clock source, a signal conditioning circuit, a core FPGA and a communication interface. The application adopts an adaptive interpolation type TDC and a temperature compensation technology to realize high-precision time measurement. The time frequency measurement technology can be applied to laser radar, intelligent driving and the like, has high precision and low non-linear error, the system maintains extremely high long-term stability in a wide temperature range, greatly reduces a measurement dead zone, is suitable for high-speed continuous event measurement, and reduces cost. And the high programmability of the FPGA makes the system easy to integrate with other digital systems and expand functions.

The application relates to the technical field of time display, and provides a microsecond-level time display device, which comprises an FPGA control device and a display device; the FPGA control device comprises a 1MHz main frequency output end, a 1 / 32MHz frequency division output end and a 1 / 1024MHz frequency division output end; the display device comprises more than 32 unit modules, each unit module comprises a D flip-flop, a shift register and 32 display lamp components; the 1MHz main frequency output end is connected with the clock enable end of each D flip-flop; the 1 / 32MHz frequency division output end is connected with the clock enable end of each shift register; the 1 / 1024MHz frequency division output end is connected with the signal input end of the D flip-flop of the first unit module, and the signal input end of the D flip-flop of other unit modules is connected with the signal output end of the D flip-flop of the previous unit module; the signal output end of the D flip-flop is connected with the signal input end of the shift register; and each display lamp component is connected with the signal output end of one shift register. The scheme can accurately provide absolute time and the precision is in the microsecond level.

The application discloses a high-precision digital time converter circuit with a calibration loop, comprising: a pulse generation circuit and a calibration loop; wherein the pulse generation circuit comprises: a sub-digital time converter DTC_1, a sub-digital time converter DTC_2 and a D flip-flop; the calibration loop comprises: a charge pump and a loop filter. The pulse generation circuit can generate a 100M speed, 25% duty cycle pulse signal CLK_S based on two charging constant slope sub-digital time converters and a D flip-flop; the calibration loop uses the charge pump and the loop filter to output a calibration signal VCTRL, adjusts the pulse width of the pulse signal CLK_S to be equal to the pulse width of a reference signal CLK_REF, and outputs the adjusted pulse signal CLK_S; by changing an external control code, the overall pulse signal is phase shifted, and a phase-locked loop circuit in the traditional technology is omitted; while reducing the power consumption and area of the circuit, higher precision is ensured, and the cost is reduced.

The application relates to the technical field of an aero-engine ground test equipment, and discloses an engine rotor inertia time measuring device which comprises a rotating speed sensor, a filter module, a voltage stabilizing module, an operational amplifier module, a half-wave rectification module, a comparison circuit module, an optical coupling conversion module and a PLC controller; the measuring circuit is completed by using components such as operational amplifiers, comparators and optical couplings, the functions of filtering, amplifying and stop-rotation signal identification are realized, and the output signal is directly output to the PLC module of an engine test bench to realize parking time recording. The engine rotor inertia time measuring device is composed of low-cost mature products, is compatible with existing test bench equipment and engine equipment, and has a measurement precision meeting the demand; and the operation process of engine rotor parking inertia measurement is optimized, so that the dependence of engine rotor parking inertia measurement on manpower can be effectively reduced.