360results about "Nanostructure application" patented technology

A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The magnetic element may also include a barrier layer, a second pinned layer. Alternatively, second pinned and second spacer layers and a second free layer magnetostatically coupled to the free layer are included. In one aspect, the free layer(s) include ferromagnetic material(s) diluted with nonmagnetic material(s) and / or ferrimagnetically doped to provide low saturation magnetization(s).

A magnetic memory element switchable by current injection includes a plurality of magnetic layers, at least one of the plurality of magnetic layers having a perpendicular magnetic anisotropy component and including a current-switchable magnetic moment, and at least one barrier layer formed adjacent to the plurality of magnetic layers (e.g., between two of the magnetic layers). The memory element has the switching threshold current and device impedance suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuits.

A method and system for providing a magnetic element capable of being written using spin-transfer effect while generating a high output signal and a magnetic memory using the magnetic element are disclosed. The magnetic element includes a first ferromagnetic pinned layer, a nonmagnetic spacer layer, a ferromagnetic free layer, an insulating barrier layer and a second ferromagnetic pinned layer. The pinned layer has a magnetization pinned in a first direction. The nonmagnetic spacer layer is conductive and is between the first pinned layer and the free layer. The barrier layer resides between the free layer and the second pinned layer and is an insulator having a thickness allowing electron tunneling through the barrier layer. The second pinned layer has a magnetization pinned in a second direction. The magnetic element is configured to allow the magnetization of the free layer to change direction due to spin transfer when a write current is passed through the magnetic element.

The present invention provides an improved top spin valve and method of fabrication. In the preferred embodiment of the top spin valve of the present invention, a seed layer is formed of non-magnetic material having the elements Ni and Cr. In the preferred embodiments, the seed layer material has an ion milling rate comparable to that of the free layer material. This allows free layer sidewalls to be formed with shorter tails, improving free layer-to-magnetic bias layer junction, thus improving free layer domain structure and track width. In one embodiment, the seed layer may have NiFeCr, with Cr from about 20% to 50%. In another embodiment, the seed layer may have NiCr, with about 40%. Some embodiments may have the seed layer formed on an optional Ta pre-seed layer. Such embodiments provide an improved fcc (111) texture particularly for NiFe and for NiFe / CoFe free layers grown on a seed layer improving spin valve performance, and especially in embodiments having very thin NiFe free layers, ultra thin NiFe free layers, and free layers without NiFe, such as a free layer of CoFe. Such a seed layer can improve AFM pinning layer texture to improve the exchange bias, thus providing better thermal stability. Such a seed layer also provides high resistivity and can improve the magnetostriction of adjacent NiFe free layer material or improve the soft properties of an adjacent CoFe free layer.

A method and system for providing a magnetic element is disclosed. The method and system include providing a pinned layer, a magnetic current confined layer, and a free layer. The pinned layer is ferromagnetic and has a first pinned layer magnetization. The magnetic current confined layer has at least one channel in an insulating matrix and resides between the pinned layer and the free layer. The channel(s) are ferromagnetic, conductive, and extend through the insulating matrix between the free layer and the pinned layer. The size(s) of the channel(s) are sufficiently small that charge carriers can give rise to ballistic magnetoresistance in the magnetic current confined layer. The free layer is ferromagnetic and has a free layer magnetization. Preferably, the method and system also include providing a second pinned layer and a nonmagnetic spacer layer between the second pinned layer and the free layer. In this aspect, the magnetic element is configured to allow the free layer magnetization to be switched using spin transfer.

Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed plane direction of the seed layer. An oxide layer may be provided between the lower electrode and the magnetic tunnel junction. The lower electrode may be a titanium-rich TiN layer having more than 50 atomic percent titanium content. Analogous fabrication methods are also described.

A nanopost glass array contains up to 1012 / cm2 of magnetizable nanoposts having diameter of 10-1000 nm that are straight and parallel to each other and are typically of a uniform diameter relative to each other and along the post length. The array is made using a reference electrode and a nanochannel glass template structure connected to each other electrically through an electrical source and both disposed in a plating solution. A magnetizable material is electroplated from the plating solution into the channels of the template structure.

A magnetic tunnel element that can be used, for example, as part of a read head or a magnetic memory cell, includes a first layer formed from an amorphous material, an amorphous tunnel barrier layer, and an interface layer between the first layer and the tunnel barrier layer. The interface layer is formed from a material that is crystalline when the material is in isolation from both the first layer and the tunnel barrier layer. Alternatively, the thickness of the interface layer is selected so that the interface layer is not crystalline. The first layer is formed from at least one material selected from the group consisting of amorphous ferromagnetic material, amorphous ferrimagnetic materials, and amorphous non-magnetic materials. The interface layer is formed from a material selected from the group consisting of a ferromagnetic material and a ferrimagnetic material.

A magnetoresistance device is provided for improving thermal stability of a magnetoresistance element by preventing interdiffusion between a conductor (such as a via and an interconnection) for connecting the magnetoresistance element to another element and layers constituting the magnetoresistance element. A magnetoresistance device is composed of a magnetoresistance element, a non-magnetic conductor providing electrical connection between said magnetoresistance element to another element, and a diffusion barrier structure disposed between said conductor and said magnetoresistance element, the magnetoresistance element including a free ferromagnetic layer having reversible spontaneous magnetization, a fixed ferromagnetic layer having fixed spontaneous magnetization, and a tunnel dielectric layer disposed between said free and fixed ferroelectric layer.

Methods are provided for forming uniformly thin layers in magnetic devices. Atomic layer deposition (ALD) can produce layers that are uniformly thick on an atomic scale. Magnetic tunnel junction dielectrics, for example, can be provided with perfect uniformity in thickness of 4 monolayers or less. Furthermore, conductive layers, including magnetic and non-magnetic layers, can be provided by ALD without spiking and other non-uniformity problems. The disclosed methods include forming metal oxide layers by multiple cycles of ALD and subsequently reducing the oxides to metal. The oxides tend to maintain more stable interfaces during formation.

A nanowire structure and device for use in large area electronics and methods of making the same is provided. The nanowire structure includes a nanowire defining an axis, where the nanowire includes a first end and a second end. The first end is axially spaced from the second end. Further, the nanowire structure includes magnetic segments that are coupled to the first and second ends of the nanowire.

It has been found that the insertion of a copper laminate within CoFe, or a CoFe / NiFe composite, leads to higher values of CPP GMR and DRA. However, this type of structure exhibits very negative magnetostriction, in the range of high −10−6 to −10−5. This problem has been overcome by giving the copper laminates an oxygen exposure treatment When this is done, the free layer is found to have a very low positive magnetostriction constant. Additionally, the value of the magnetostriction constant can be adjusted by varying the thickness of the free layer and / or the position and number of the oxygen treated copper laminates.

An atomic layer deposition (ALD) process deposits thin films for microelectronic structures, such as advanced gap and tunnel junction applications, by plasma annealing at varying film thicknesses to obtain desired intrinsic film stress and breakdown film strength. The primary advantage of the ALD process is the near 100% step coverage with properties that are uniform along sidewalls. The process provides smooth (Ra˜2 Å), pure (impurities<1 at. %), AlOx films with improved breakdown strength (9–10 MV / cm) with a commercially feasible throughput.

This magnetic multilayer device comprises, on a substrate, an alternating sequence of magnetic metallic layers M and oxide, hydride or nitride layers O. The number of layers M equals at least two. The layers M are continuous. There is interfacial magnetic anisotropy perpendicular to the plane of the layers at the level of the M / O interfaces.

A CPP-GMR spin value sensor structure with an improved MR ratio and increased resistance is disclosed. All layers except certain pinned layers, copper spacers, and a Ta capping layer are oxygen doped by adding a partial O2 pressure to the Ar sputtering gas during deposition. Oxygen doped CoFe free and pinned layers are made slightly thicker to offset a small decrease in magnetic moment caused by the oxygen dopant. Incorporating oxygen in the MnPt AFM layer enhances the exchange bias strength. An insertion layer such as a nano-oxide layer is included in one or more of the free, pinned, and spacer layers to increase interfacial scattering. The thickness of all layers except the copper spacer may be increased to enhance bulk scattering. A CPP-GMR single or dual spin valve of the present invention has up to a threefold increase in resistance and a 2 to 3% increase in MR ratio.

A fabrication process for a tunneling magnetoresistance (TMR) sensor is disclosed. In particular, a unique method of forming a barrier layer of the TMR sensor is utilized so that the TMR sensor exhibits good magnetic and TMR properties. In one particular example, the barrier layer is formed by depositing a metallic film in an argon gas in a DC magnetron sputtering module, depositing an oxygen-doped metallic film in mixed xenon and oxygen gases in an ion-beam sputtering module, and oxidizing these films in an oxygen gas in an oxygen treatment module. This three-step barrier layer formation process minimizes oxygen penetration into ferromagnetic (FM) sense and pinned layers of the TMR sensor and optimally controls oxygen doping into the barrier layer. As a result, the FM sense and pinned layers exhibit controlled magnetic properties, the barrier layer provides a low junction resistance-area product, and the TMR sensor exhibits a high TMR coefficient.

An MTJ (magnetic tunneling junction) device particularly suitable for use as an MRAM (magnetic random access memory) or a tunneling magnetoresistive (TMR) read sensor, is formed on a seed layer which allows the tunneling barrier layer to be ultra-thin, smooth, and to have a high breakdown voltage. The seed layer is a layer of NiCr which is formed on a sputter-etched layer of Ta. The tunneling barrier layer for the MRAM is formed from a thin layer of Al which is radically oxidized (ROX), in-situ, to form the layer with characteristics described above. The tunneling barrier layer for the read sensor formed from a thin layer of Al or a HfAl bilayer which is naturally oxidized (NOX), in situ, to form the barrier layer. The resulting device has generally improved performance characteristics in terms of GMR ratio and junction resistance.

A magnetoresistive effect element (1) has an arrangement in which a pair of ferromagnetic material layers (magnetization fixed layer (5) and magnetization free layer (7)) is opposed to each other through an intermediate layer (6) to obtain a magnetoresistive change by causing a current to flow in the direction perpendicular to the layer surface and in which the ferromagnetic material layers are annealed by anneal including rotating field anneal and the following static field anneal. A magnetic memory device comprises this magnetoresistive effect element (1) and bit lines and word lines sandwiching the magnetoresistive effect element (1) in the thickness direction. When the magnetoresistive effect element (1) and the magnetic memory device are manufactured, the ferromagnetic material layers (5, 7) are annealed by rotating field anneal and the following static field anneal. There are provided the magnetoresistive effect element that can obtain excellent magnetic characteristics by controlling magnetic anisotropies of the ferromagnetic material layers, the magnetic memory device including this magnetoresistive effect element and which may have excellent write characteristics, and methods for manufacturing these magnetoresistive effect element and magnetic memory device.