193 results about "Squelch" patented technology

A device for recording and playing back a selected episode from an input analog audio-visual signal. A "deferred recording" feature allows the user to briefly delay his/her decision to record a live signal episode until after the signal episode has at least partially transpired. Thus, the user can first evaluate the episode prior to deciding whether to record it. The recorded signal episode contains both preamble and postamble segments, i.e. the signal segments preceding and following activation of a record switch. The analog playback signal is directed to an A/V output device so it can be heard/viewed by the user. Some embodiments provide for recording multiple signal episodes, multi-signal channel episodes, variable length episodes, simultaneous record and playback, episode deletion, variation of sampling rate, skip forward, reverse, and squelch.

An apparatus and a method are provided for selectively enabling and disabling a squelch circuit in a Serial Advanced Technology Attachment (SATA) host or SATA device while maintaining proper operation of the host and device. An apparatus and method are provided which allow the squelch circuit to be selectively enabled and disabled across SATA power states (PHY Ready, Partial, and Slumber) and in Advanced Host Controller Interface (AHCI) Listen mode.

A device for generating a crest factor reduced signal is disclosed. The device comprises an interface for receiving an input signal; a peak identifier for identifying one or more peak regions of the input signal; a squelch level determiner for determining a reduction of the input signal near the one or more peak regions; a squelcher for reducing the one or more peak regions of the input signal as indicated by the squelch level determiner; and an interface for outputting a crest factor reduced signal. The crest factor reduced signal has a reduced dynamic range due to the reduction of the one or more peak regions of the input signal. The crest factor reduced signal also has been filtered to reduce undesired frequency components by: calculating a difference between a squelched signal from the squelcher and the input signal, band-pass filtering the difference to generate a result, and summing the result with the input signal that has been delayed.

The present invention provides an OOB detection circuit capable of making accurate signal determination even in the case where a characteristic fluctuation occurs in an analog circuit, thereby preventing deterioration in the yield of a product. To an amplitude determining circuit, a characteristic adjustment register for changing setting of an amplitude threshold adjustment mechanism for distinguishing a burst and a squelch from each other provided for the amplitude determining circuit is coupled. The characteristic adjustment register is controlled by a self determination circuit. An output of the amplitude determination circuit is supplied to a time determining circuit and also to the self determination circuit. On the basis of the output of the amplitude determining circuit, the self determination circuit controls the characteristic adjustment register.

Embodiments of the present invention can be used to enhance signals in a peer-to-peer radio system, such as a two-way radio system. In one embodiment, the invention includes receiving a communications signal on a channel from a remote radio at a radio using a plurality of antenna elements, such as an antenna array. The received communications signal includes a squelch code. The radio detects the squelch code, and enhances the received communications signal using the squelch code.

A ‘smart’ sub-channel hopping control mechanism executes one or more sub-channel selection discriminators to enable the communications controller of a spectral reuse transceiver to delineate on which of a plurality sub-channels the spectral reuse transceiver may transmit, so as to substantially reduce the likelihood of triggering squelch circuits of silent radios of primary (licensed) channel users.

Disclosed is a transmission envelope detector referred to a squelch detection circuit for effectively detecting an element of transmission data in a high speed serial data transmission system. The squelch detection circuit of the invention includes a differential input level shifter, a first reference voltage generator, an amplifier, a second reference voltage generator, and a comparator. The squelch detection circuit can detect whether the transmission data is a noise or signal element even at a cross point of the transmission data, resulting in achieving stable data transmission.

An electrical circuit detects a “squelch,” or “out-of-band,” state of a differential signal pair having a positive (“p”) signal line and a negative (“n”) signal line. In one embodiment of the invention, a first and a second comparator each have positive inputs driven by the positive and negative signal lines, respectively. The negative inputs of the comparators are driven by the outputs of separate digital-to-analog converters (DACs) which are set to a lower squelch threshold voltage. The outputs of the comparators then drive the inputs of a logical AND gate, the output of which indicates the current squelch state of the differential signal pair.

A semiconductor integrated circuit has a squelch circuit which has a first noninverting input terminal and a first inverting input terminal, which compares differential amplitude between a signal which is input to the first noninverting input terminal and a signal which is input to the first inverting input terminal with a preset threshold, and which outputs a signal depending upon a result of the comparison. The semiconductor integrated circuit has a first switch circuit between a first reception terminal and the first noninverting input terminal. The semiconductor integrated circuit has a second switch circuit between a second reception terminal and the first inverting input terminal. The semiconductor integrated circuit has a third switch circuit between the first reception terminal and the first inverting input terminal. The semiconductor integrated circuit has a fourth switch circuit between the second reception terminal and the first noninverting input terminal.

The invention provides an apparatus and a method for determining the frequency of a radio frequency signal. The coherency of a received signal is determined and only the frequency of a coherent signal is determined. Zero amplitude transitions of coherent signals are counted in respective time periods. If the counts in each time period agree within a quantization error, the accumulated counts for a fixed time period are employed to determine a frequency. The frequency determining apparatus and method are particularly useful with a frequency agile radio receiver for detecting the presence of radio frequency signals from nearby mobile and stationary transmitters. Upon determination of the frequency of the nearby transmitter, the channel of transmission can be determined from a memory within the receiver and the receiver can be tuned to monitor the transmission. Additional tests to verify the frequency determination may be applied using squelch and window detector circuits of the radio receiver.

A method for protecting Ethernet data packets transmitted over SDH/SONET traffic in a ring-like optical network formed by a number of nodes, the method includes utilizing MS-SPRING/BLSR system for SDH/SONET traffic protection and, in case of one or more network failures that result in at least one isolated node in the network, the method comprises preventing initiation of a squelching algorithm of the MS-SPRING/BLSR system with respect to the SDH/SONET virtual containers carrying the data Ethernet packets, while ensuring that the standardized use of byte J1 is prevented with respect to the same SDH/SONET virtual containers carrying the Ethernet packets.

The invention relates to a digital interphone with a digital and analogue hybrid receiving function. A receiving circuit consists of a voice coding and decoding chip and a digital interphone baseband signal processing chip SCT3252, identifies a digital call and an analogue call by using a continuous tone controlled squelch system (CTCSS)/continuous digital controlled squelch system (CDCSS) technology, performs analogue demodulation on a code within the first 20ms in a decoding stage, extracts a CTCSS code from the code, performs digital demodulation on the code, is shifted into a digital receiving state if not extracting the CTCSS code, and is shifted into an analogue receiving state if extracting the CTCSS code which is consistent with a CTCSS code set by the digital interphone, so that digital and analogue hybrid receiving is realized. The spectral efficiency is improved; and the digital interphone is a solution for frequency congestion, and has far-reaching significance.

A signal of interest (SOI) may be selected from among a plurality of cochannel signals based on one or more internal or external structural feature/s of the SOI, e.g., automatically selected based on any one or more internal or external structural features of the SOI that is known a priori. Examples of such internal structural features include, but are not limited to, number, frequency and/or absolute or relative signal strength (signal to noise ratio) of one or more transmitted signal components (e.g., pilot tones, squelch tones, etc.) present in the SOI; absence of a signal component at a given frequency in the SOI (i.e., present as a “dead spot” at a given frequency within the SOI); signal strength versus frequency profile of the SOI, signal strength versus time domain profile of the SOI, transient characteristics, time versus frequency profile, etc.

A system and method for measuring the response time of a differential signal pair squelch detection circuit is provided. First, both the positive and negative signal lines of the differential signal pair are driven with square waves of different frequencies, typically by way of a signal generator. Thereafter, either the phase or the frequency of the two square waves is gradually altered until the duty cycle of a squelch detect signal of the squelch detection circuit falls below fifty percent. The resulting period of the square waves, or the relative phase between the two, is then utilized to calculate the response time of the squelch detection circuit.

An automatic adjustment circuit for amplitude of differential signal has a differential signal transceiver that transmits differential signals, an amplitude setting register in which plural setting values for setting amplitude of the differential signals are stored, an amplitude control circuit that controls the amplitude of the differential signals, a pattern generating circuit that outputs a test pattern, a multiplexer, a squelch detection receiver, a test loop-back circuit, a squelch-signal-change-detection expected-value memory that stores an expected value of a change in a squelch signal, a squelch-signal-change detection counter that counts the change in the squelch signal, a comparator that compares the expected value and a count value and outputs a difference value of the values, a comparison result memory that stores the difference value, and a controller.

The invention relates to squelch technology and discloses a new digital squelch method aiming at the defect in traditional squelch technology. The method can reduce the cost of squelch, improve the reliability of squelch and realize accurate squelch. The technical scheme is mainly characterized by comprising the following steps: setting an intermediate frequency squelch threshold value and an intermediate frequency carrier-to-noise ratio, and comparing to judge whether an intermediate frequency signal exists or not and the signal strength if the intermediate frequency signal exists; setting an audio frequency squelch threshold value and an audio frequency carrier-to-noise ratio, and comparing to judge whether an audio frequency signal exists or not and the signal strength if the audio frequency signal exists; and combing the judgment results of intermediate frequency squelch and audio frequency squelch to judge the quality of voice signal and to determine whether to carry out the squelch process. The digital squelch method provided by the invention is suitable for the squelch process of voice communication equipment.

A receiver for a differential signal transmitted over a serial interface includes a squelch detector, a differential amplifier, a start pattern detector, an end pattern detector, and a controller. The squelch detector is configured to output a squelch signal when determining that the differential signal is present on the serial interface. The differential amplifier is configured to extract binary data from the differential signal. The start pattern detector is configured to indicate a first state when detecting a given start pattern in the binary data. The end pattern detector is configured to indicate a second state when detecting a given end pattern in the binary data. The controller is configured to activate the start pattern detector in response to the squelch signal. The controller is configured to validate the differential signal in the first state. The controller is configured to end receiving the differential signal in the second state.

A media player system and method includes a microphone, a hearing appliance, a converter, a flash memory, a comparing unit, a timer, and a switching unit (e.g., anti-voice operated switch). The microphone associated with a squelch control unit receives and samples an external sound as a user listens to a media file via the hearing appliance. The converter digitizes the external sound and the comparing unit compares the digitized sound with one or more keywords stored in the flash memory. The switching unit automatically temporarily mutes the audio stream for a predetermined time period thereby enabling the user to hear the external sound.