62 results about "Relaxation oscillator" patented technology

The disclosed apparatus for relaxation-oscillator-based thermal sensing can include a first oscillation count module. The first oscillation count module can include a first counter configured to count a first number of oscillations produced by a first relaxation oscillator. The apparatus can also include a second oscillation count module. The second oscillation count module can include a second counter configured to count a second number of oscillations produced by a second relaxation oscillator. The apparatus can additionally include a subtraction module configured to subtract the second number of oscillations from the first number of oscillations to generate a count difference. Various other apparatuses, systems, and methods are also disclosed.

An environmental detection device including a housing, a capacitance detection circuit comprising a capacitor within the housing, and a chamber within the housing. The chamber including an air inlet to allow air to pass through the housing into the chamber and an environmental sensor to detect an environmental characteristic. The device including a first mesh structure at least partially covering the air inlet of the chamber, a first metallic conductor comprising at least a first portion of the first mesh structure, a second metallic conductor separated from the first metallic conductor by at least one dielectric material, a first electrical connection from the first metallic conductor to the relaxation oscillator circuit, and a second electrical connection from the second metallic conductor to a ground, wherein the first metallic conductor and the second metallic conductor form the capacitor of the relaxation oscillator circuit.

The invention discloses a hardware circuit for realizing limp control of a steering lamp function, and belongs to the technical field of automobile body control modules. According to the method, when the main control module of the BCM fails, the steering lamp limping control function is automatically started through a hardware circuit, it is ensured that the flickering function of the steering lamp or the danger warning lamp can still be achieved under the condition that the main control module of the vehicle fails, and the driving safety is improved. The hardware circuit comprises a main control module, an LIMPHOME logic judgment circuit, a relaxation oscillator circuit, a high-side driving circuit, a steering lamp switch and a steering lamp. The LIMPHOME logic judgment circuit detects a PWM output signal of the main control module through the capacitor charging and discharging circuit and judges whether the main control module works normally or not; when the master control module fails, the relaxation oscillator circuit generates a PWM control signal based on the turn light switch signal and the LIMPHOME logic output; and the high-side driving circuit drives the steering lamp to flicker according to the PWM signal. The method is realized through pure hardware, is low in cost, quick in response and high in reliability, and is suitable for various vehicle BCM systems.

A voltage mode relaxation oscillator includes a bandgap reference (BGR) circuit configured to generate a BGR voltage that does not depend on temperature and a BGR current that depends on temperature; a control voltage generating circuit configured to generate a control voltage that does not depend on temperature based on the BGR voltage; a reference current generating circuit configured to generate a reference current that does not depend on temperate based on the BGR current; and an oscillator circuit configured to generate a clock signal that does not depend on temperature based on the control voltage and the reference current.

A relaxation oscillator includes first to the sixth transistor, a resistor, a capacitor, an inverter, a pulse generator, and first to the third switch. The resistor is coupled between the third source and the third gate of the third transistor. The capacitor is coupled between the fourth source and the fourth gate of the fourth transistor. The input terminal of the inverter is coupled to the sixth drain of the sixth transistor. The pulse generator generates a pulse signal. The first switch is coupled between the inverter and a first reference voltage. The second switch is coupled between the inverter and the fifth transistor. The third switch is coupled between the fourth transistor and a second reference voltage. The first to third switches are turned on or off according to the pulse signal.

This invention discloses a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator, belonging to the field of integrated circuits. By storing time errors, it performs negative feedback control on the trigger times of the rising and falling edges of the output clock signal, automatically calibrating the output signal frequency. Furthermore, it achieves DC deviation elimination in the self-calibrating operational amplifier, significantly reducing offset voltage. This invention solves the problem of unstable signal output frequency in voltage-mode RC relaxation oscillator circuits due to changes in ambient temperature. It can be applied to Delta-Sigma ADC circuits, filter circuits, phase-locked loop circuits, etc., improving resistance to ambient temperature changes and compensating for comparator switching delays. t d This improves the linearity of the clock oscillator, enhances circuit reliability, and meets the accuracy requirements of highly integrated signal chain acquisition systems.

The present invention discloses a relaxation oscillator for eliminating comparator delay, comprising: a reference generation circuit for dividing a power supply VDD to generate a reference voltage; a capacitor charging and discharging circuit for charging via a resistor connected to the power supply VDD and discharging via a switch connected to a common ground VSS; a peak sampling circuit connected to the capacitor charging and discharging circuit for collecting the peak voltage of the capacitor when it is charged; a dynamic reference voltage generation circuit for providing a dynamic reference voltage to the comparator; and a clock generation circuit for providing a clock drive to switches in the capacitor charging and discharging circuit and the peak sampling circuit. The present invention samples the peak voltage of the capacitor charge via the peak sampling circuit, provides the dynamic reference voltage to the comparator via the dynamic reference voltage generation circuit, and utilizes a negative feedback mechanism to clamp the peak voltage of the capacitor charge to a set reference voltage, thereby eliminating the influence of the comparator delay on the oscillator frequency.

The invention provides a current trimming circuit and a chip, which are suitable for the field of high-precision PWM (Pulse Width Modulation) power supply management and motor driving chips. According to the invention, the problem of oscillator frequency error caused by process deviation is solved. The circuit comprises a trimming fuse switch module, a trimming current source driving module, a trimming current source module and a proportional current sampling module. Through a fuse trimming mode, an external trimming digital code is received, a corresponding trimming current source is driven, and an accurate charging current is provided for an external slope capacitor, so that the working frequency of the relaxation oscillator is calibrated. In addition, due to the design of the fuse switch module, normal overturning of a logic signal when the fuse is not completely burnt out is ensured, and the trimming robustness is improved. The proportional current sampling module reduces the noise and temperature influence through the operational amplifier feedback and mirror current technology, and improves the stability and matching precision of the current source. According to the technical scheme, the frequency accuracy of the oscillator is effectively improved, and the requirement for the driving capacity of the fuse switch is lowered.

The application discloses a low-temperature-drift calibratable RC relaxation oscillator circuit, which comprises an oscillator core module, a voltage reference module, a voltage-to-current conversion module and a current DAC module, wherein the voltage reference module generates a reference voltage VREF; the voltage-to-current conversion module converts the obtained reference voltage into a reference current IREF; the current DAC module provides the adjusted currents I1, I2 and I3 to the oscillator core module, and the non-linear influence of process corners on the output frequency of the RC oscillator is reduced by adjusting the currents; the oscillator core module finally generates a clock signal CLK, and the problems that the comparator delay and the comparator offset are greatly changed with temperature are reduced by using the current self-compensation technology and the chopping technology, and thus the performance of the oscillator output frequency is improved. Compared with the traditional RC relaxation oscillator, the application reduces the temperature drift of the output frequency and improves the accuracy of the frequency by structural optimization and technical innovation.

This invention relates to the field of circuit hardening technology, and provides a voltage-controlled oscillator (VCO) circuit and phase-locked loop (PLL) circuit that are resistant to single-event transients. Addressing the issue that traditional three-mode relaxation oscillator (VCO) circuits are unsuitable for low-voltage conditions, especially when the power supply voltage drops to around 0.8V, this invention employs six oscillation branches coupled into three large oscillation loop circuits to improve loop gain. Furthermore, by combining bias circuits, comparators, and voting circuits for each path, the problem of increasing nonlinearity is avoided. This achieves a combination of large oscillation loops, bias circuits, and a three-mode VCO architecture, resulting in a VCO circuit that maintains high-frequency stable operation under ultra-low voltage conditions such as 0.8V, thus achieving a single-event transient resistance effect, especially at low voltages of 0.8V.

The present invention discloses a high-precision voltage-mode relaxation oscillator, comprising: a reference current source; a bandgap reference voltage source; a three-terminal input and dual-output comparator, wherein the three-terminal input includes a positive terminal input connected to a reference voltage V REF and two negative terminal inputs respectively connected to the positive terminals of capacitors C1 and C2. The comparison results of the two negative terminal inputs with the positive terminal input are respectively the two output signals of the comparator. Two capacitors C1 and C2, whose negative terminals are both grounded, and whose positive terminals are respectively connected to the two negative terminal inputs of the comparator; a digital control circuit, which consists of a latch formed by two NOR gates and two inverters. The comparator adopted by the voltage-mode relaxation oscillator has a dual-output structure, and there is no need to additionally adopt a D flip-flop for sampling and frequency division. The control logic only adopts a latch formed by two NOR gates and two inverters, which improves the output frequency of the voltage-mode relaxation oscillator, reduces the power consumption and layout area of the circuit.

The invention provides a high-precision low-temperature-drift relaxation oscillation system with a symmetrical double-path architecture and a calibration method thereof. The system comprises a symmetric double-channel relaxation oscillator core framework, a fine adjustment circuit, a coarse adjustment circuit and a band-gap reference source module. The method comprises the following steps: S1, acquiring initial working parameters of a relaxation oscillator by a system, and determining an initial frequency value of the oscillator; s2, executing coarse adjustment calibration by a coarse adjustment circuit, and adjusting the frequency of the oscillator to be within a first preset range of a target frequency value; s3, the fine adjustment circuit executes fine adjustment calibration, and further adjusts the frequency of the oscillator to be within a second preset range of the target frequency value; s4, the band-gap reference source module executes temperature compensation calibration; s5, the system adjusts the proportion of the charging current and the discharging current, and duty ratio adjustment is executed; s6, the system executes frequency stability verification; and S7, generating a final calibration configuration and storing the final calibration configuration for long-term use of the oscillator. The invention is applied to the technical field of integrated circuits.

Relaxation oscillator comprising: a current source (11; 40; 50) for providing a charging current, a capacitor arrangement (12; 41; 51, 52) coupled to the current source (11; 40; 50), wherein the current source is configured to charge the capacitor arrangement (12; 41; 51, 52) during an operating period (Tideal), a detection arrangement (13; 43, 44, 45, 46) configured to detect when a voltage across the capacitor arrangement (12; 41; 51, 52) reaches a threshold voltage, and to discharge the capacitor arrangement (12; 41; 51, 52) in response to reaching the threshold voltage during the operating period (Tideal), wherein the charging and discharging of the capacitor arrangement (12; 41; 51, 52) in each operating period occurs exactly once, and a measuring device (14; 47, 48; 53) is set up to provide a measure of a propagation delay of the detection device (13;43, 44, 45, 46) to measure, wherein the relaxation oscillator is configured to increase a charging rate of the capacitor device (12; 41; 51, 52) for a duration based on the measure of the propagation delay, wherein the relaxation oscillator is configured to end the operating period (Tideal) following discharge and to begin a next operating period, at the beginning of which the capacitor device (12; 41; 51, 52) is recharged.;

The invention relates to a relaxation oscillator irrelevant to oscillation frequency and temperature. The relaxation oscillator comprises a reference module, a bias current source module and an oscillator core circuit module, the reference module is used for outputting zero temperature coefficient current; the bias current source module is used for finely adjusting the zero temperature coefficient current and outputting the zero temperature coefficient current after fine adjustment; and the oscillator core circuit module is used for charging and discharging the capacitor C by taking the fine-tuned zero temperature coefficient current as a charging and discharging current. According to the invention, the change rate of the current at-40 DEG C to 125 DEG C along with the temperature can be controlled below + / -0.6%.

The invention provides a PWM (Pulse Width Modulation) generator using LM393 and discrete components. The PWM generator comprises a relaxation oscillator module for generating a triangular wave signal, an LM393 comparator module for comparing the triangular wave signal with an external voltage to generate a PWM signal, and a pull-up circuit module for adjusting the level of an output signal. The oscillator module is composed of a power input end, a grounding end and a triangular wave signal output end, is connected with a power supply VCC and is grounded. The PWM signal output end of the comparator module is the output end of the generator. According to the invention, adjustable PWM signal output can be realized, the duty ratio control is flexible, the output frequency is up to 100KHz, and the circuit is suitable for various electronic control applications.

This invention proposes a high-precision relaxation oscillator for an ADC. The oscillator includes current sources I1 and I2, capacitor CRES, a comparator, inverters INV1 and INV2, an oscillator transistor group, and a voltage selection switch TG. The comparator is connected to the inverter INV1 and capacitor CRES, and also to the oscillator transistors M1 and M2. The comparator is connected to bias power supplies VB1, VB2, and VB3, and calibration signal ports Caln1~CalnN and Calp1~CalpN. By connecting calibration signals Vn1~VnN and Vp1~VpN, mismatch problems existing in the comparison process are calibrated. The oscillator achieves high precision by calibrating the comparator mismatch. The voltage selection switch selects the corresponding standard voltage according to the comparator output to achieve oscillation output. The circuit structure of this invention is simple, easy to integrate, highly operable, and has low power consumption, achieving high precision and suitable for application in ADC systems.

The application discloses a compact time domain reflectometer probe based on high-speed logic gates, which comprises a power filter module, an ultrafast edge pulse generation module, an impedance matching driving module and a signal separation and test port module, the power filter module supplies power for the ultrafast edge pulse generation module and the impedance matching driving module, the ultrafast edge pulse generation module is a relaxation oscillator, the relaxation oscillator outputs a square wave signal to the impedance matching driving module, the impedance matching driving module inputs the square wave signal after impedance matching to the signal separation and test port module, and the signal separation and test port module comprises a triangular resistance distribution network formed by three resistors. Compared with the existing simple TDR scheme or expensive professional equipment, the time domain reflectometer probe disclosed by the application has the advantages of high resolution, excellent impedance matching, compact structure, low cost and the like.

The utility model relates to a relaxation oscillator. Comprising a resistor, a capacitor, a voltage comparator, a low-pass filter and a temperature compensation circuit, the resistor and the capacitor are combined to form an RC charging circuit which is responsible for generating a gradually changing voltage. The voltage can generate charging and discharging fluctuations at the two ends of the capacitor as time goes on, and then periodic changes are provided for the oscillator. And the voltage comparator is used for monitoring the voltage on the capacitor. And two input ends of the comparator are respectively connected to a connection point of the capacitor and a reference voltage Vref. When the voltage at the two ends of the capacitor exceeds or is lower than the reference voltage Vref, the comparator outputs a digital signal (high or low) so as to trigger the oscillation behavior. And the output signal enters the low-pass filter after passing through the voltage comparator. The low-pass filter is used for smoothing signals, reducing high-frequency noise and stabilizing signal output.

The application discloses a relaxation oscillator based on a switched capacitor array and a peak feedback structure and a stabilizing method, the oscillator comprising a reference source, a switched capacitor array, a peak voltage feedback module, a comparator and a digital logic circuit, the switched capacitor array comprising two symmetric charge-discharge branches, each branch having a main charging capacitor and a tracking holding capacitor, and the peak voltage feedback module being composed of an operational amplifier, a feedback capacitor and a sampling switch. In operation, the capacitor voltage of one branch charged alternately is compared with a dynamic threshold, and the peak voltage on the tracking holding capacitor of the other branch is sampled to the feedback module at the switching moment, the comparator threshold is dynamically adjusted through the integral action, and finally the capacitor peak voltage is locked to the fixed reference voltage, so that the influence of non-ideal factors such as comparator delay on the oscillation period is systematically offset. The application also adopts a chopping comparator to eliminate the offset. The architecture significantly improves the stability of the oscillation frequency to the power supply voltage and temperature, and helps to realize low phase noise, and is suitable for high-precision on-chip clock sources.

The invention relates to a relaxation oscillator. The present invention can stably output a signal of a predetermined frequency. The present invention includes: a first transistor (M1) through which a constant current flows; a first capacitor (C1) charged by the current from the first transistor (M1); a second transistor (M2) that captures the charge charged by the first capacitor (C1); a third transistor (M3) through which a constant current flows; a second capacitor (C2) charged by the current from the third transistor (M3); a fourth transistor (M4) that captures the charge stored in the second capacitor (C2); and a flip-flop (FF) that changes from a first state to a second state when the charging voltage of the first capacitor (C1) reaches a predetermined value, changes from the second state to the first state when the charging voltage of the second capacitor (C2) reaches a predetermined value, turns the second transistor (M2) off and turns the fourth transistor (M4) on in the first state, and turns the fourth transistor (M4) off in the second state when the charging voltage of the second capacitor (C2) reaches a predetermined value. In the second state, the second transistor (M2) is turned on, and the fourth transistor (M4) is turned off; and outputs a signal of a predetermined frequency from the flip-flop (FF).

A relaxation oscillator includes first to sixth transistors, a resistor, a capacitor, an inverter, a pulse generator, and first to third switches. The resistor is coupled between a third source and a third gate of the third transistor. The capacitor is coupled between a fourth source and a fourth gate of the fourth transistor. The input end of the phase inverter is coupled with the sixth drain electrode of the sixth transistor. The pulse generator generates a pulse signal. The first switch is coupled between the inverter and a first reference voltage. The second switch is coupled between the inverter and the fifth transistor. The third switch is coupled between the fourth transistor and a second reference voltage. The first to third switches are switched on or switched off according to the pulse signal.

This invention discloses a fast-start relaxation oscillator and electronic device, relating to the field of oscillator technology. The circuit includes: a constant current source; a digital adjustment module for adjusting the current of the constant current source; a first charging circuit, with its input connected to the output of the digital adjustment module; a second charging circuit connected in parallel with the first charging circuit; a first comparator, with its positive input connected to the positive terminal of a first capacitor and its inverting input connected to a reference voltage; a second comparator, with its positive input connected to the positive terminal of a second capacitor and its inverting input connected to the reference voltage; and a transistor-level cross-coupled latch, with its input connected to the outputs of the first and second comparators, and its output connected to the controlled terminals of the first and second charging circuits. This circuit can eliminate the reset dead time problem through the alternating charging of the two capacitors.

The present application discloses a relaxation oscillator and motor, relating to the field of electronic power. The relaxation oscillator includes: a reference voltage module, a high-side comparator, a low-side comparator, a control module, and a filter. The control module is configured to set a high-side reset terminal to a high level when the high-side comparator outputs a high level, thereby clamping the output of the high-side comparator to a low level, thereby forming a preset narrow pulse at the high-side output terminal. The preset narrow pulse is sequentially composed of a low level, a high level, and a low level. The control module is also configured to set a low-side reset terminal to a low level when the low-side comparator outputs a high level, thereby clamping the output of the low-side comparator to a low level, thereby forming a preset narrow pulse at the low-side output terminal. The control module is also configured to jump the level of a clock signal outputted from a first output terminal when either the high-side comparator outputs a high level or the low-side comparator outputs a high level. The present application solves the problem of poor accuracy of the clock signal outputted by the relaxation oscillator.

The invention discloses a relaxation oscillator with adjustable frequency and temperature coefficient, and the relaxation oscillator comprises a band-gap reference module which is used for providing reference voltage for a high-precision reference current source and a comparator; the high-precision reference current source is used for generating charging current for the capacitor module according to the reference voltage; adjusting the size of the charging current and the temperature coefficient; the capacitor module is used for periodically exchanging the connection relation between voltage and reference voltage at two ends of the capacitor module and positive and negative input ends of the comparator; the comparator is used for comparing the voltage at the two ends of the capacitor module with the reference voltage to generate a square wave signal of which the frequency can be kept stable when the temperature changes; and a transmission gate switch in the capacitor module is used for compensating the offset voltage of the comparator. The relaxation oscillator can generate a square wave signal of which the frequency can be kept stable when the temperature changes, so that the frequency of the output square wave signal can be kept stable when the temperature changes.

To stably output a signal of a predetermined frequency.SOLUTION: A relaxation oscillator includes: a first transistor M1 that flows a constant current; a first capacitor C1 that is charged by a current from the first transistor M1; a second transistor M2 that pulls out the charge of the first capacitor C1; a third transistor M3 that flows a constant current; a second capacitor C2 that is charged by the current from the third transistor M3; a fourth transistor M4 that pulls out the charge accumulated in the second capacitor C2; and a flip-flop FF that changes from a first state to a second state when a charging voltage of the first capacitor C1 reaches a predetermined value, changes from the second state to the first state when the charging voltage of the second capacitor C2 reaches the predetermined value, turns off the second transistor M2 and turns on the fourth transistor M4 in the first state, and turns on the second transistor M2 and turns off the fourth transistor M4 in the second state. A signal of a predetermined frequency is output from the flip-flop FF.SELECTED DRAWING: Figure 1

The application provides a relaxation oscillator circuit and a control method, an integrated chip and an electronic device. A first control unit of the relaxation oscillator circuit is configured to perform digital logic determination on a wake-up indication signal and output a first control signal; a second control unit is configured to output a second control signal based on the wake-up indication signal; in a low-frequency mode and when the first control signal is a valid signal, the relaxation oscillator unit switches to a normal working high-frequency mode; in the low-frequency mode and when the second control signal is a valid signal and the first control signal is an invalid signal, the relaxation oscillator unit switches to a wake-up detection high-frequency mode; and in the wake-up detection high-frequency mode, if the first control signal output is a valid signal, the relaxation oscillator unit switches to the normal working high-frequency mode. The relaxation oscillator unit can be switched to the wake-up detection high-frequency mode or the working high-frequency mode under different conditions, which is beneficial to reducing power consumption and improving overall processing speed.

[Problem to be solved] The disclosure is to stably output a signal of a predetermined frequency.[Solution] The disclosure includes: a first transistor M1, through which a constant current is made to flow; a first capacitor C1, which is charged by a current from the first transistor M1; a second transistor M2, which draws a charge of the first capacitor C1; a third transistor M3, through which a constant current is made to flow; a second capacitor C2, which is charged by a current from the third transistor M3; a fourth transistor M4, which draws a stored charge of the second capacitor C2; and a flip-flop FF, whose state changes from a first state to a second state when a charging voltage of the first capacitor C1 reaches a predetermined value, and changes from the second state to the first state when a charging voltage of the second capacitor C2 reaches a predetermined value, the flip-flop FF causing the second transistor M2 to be turned off and the fourth transistor M4 to be turned on in the first state, and causing the second transistor M2 to be turned on and the fourth transistor M4 to be turned off in the second state; and the disclosure outputs a signal of a predetermined frequency from the flip-flop FF.

The application discloses a clock calibration structure and a calibration method thereof, and relates to the technical field of communication, and aims to solve the problem of low precision in the prior art and the problem that the chip precision counting demand cannot be met. The clock calibration circuit is composed of a relaxation oscillator, a crystal oscillator, a frequency synthesizer, a digital operation control circuit and a counter. The crystal oscillator is used for initial calibration of the frequency of the relaxation oscillator, and the frequency synthesizer is used for secondary calibration of the frequency of the relaxation oscillator. The problem that the ordinary relaxation oscillator in the prior art is realized by a resistor, a capacitor and a comparator, the precision is low, and the chip precision counting demand cannot be met is solved. The frequency of the relaxation oscillator is calibrated by the crystal oscillator and the frequency synthesizer, and the performance of the high-frequency-precision relaxation oscillator can be realized.

The invention discloses a low-temperature-drift high-frequency RC relaxation oscillator which comprises an AMP amplifier, a charging circuit, a low-delay CMP comparator, a quick charging circuit and an MNT transistor. The output end of the AMP amplifier is electrically connected with the input end of the charging circuit, and the first output end and the second output end of the charging circuit are grounded through an RT resistor and a CT capacitor respectively; the first output end of the charging circuit is electrically connected with the positive input end of the AMP amplifier, the second output end of the charging circuit is electrically connected with the positive input end of the low-delay CMP comparator, and reference voltage is input into the negative input end of the AMP amplifier and the negative input end of the low-delay CMP comparator; the output end of the low-delay CMP comparator is electrically connected with the grid electrode of the MNT transistor, and the drain electrode of the MNT transistor is electrically connected with the second output end of the charging circuit. A CK1 clock signal output by the low-delay CMP comparator is used for controlling the quick charging circuit to shorten the charging time of the CT capacitor; the oscillator outputs a high-frequency and high-precision clock signal, and the influence of delayed temperature drift on an output clock period is reduced.

The invention discloses a quick-start high-precision relaxation oscillator, and the relaxation oscillator comprises a reference voltage generation module which is used for generating a first reference voltage and a second reference voltage; the capacitor charging and discharging module is used for generating first and second real-time voltages which change periodically; the bypass reference voltage generation module is electrically connected with the reference voltage generation module and is used for generating bypass reference voltage based on the second reference voltage; the charging and discharging control module is electrically connected with the reference voltage generation module and the capacitor charging and discharging module and is used for controlling the capacitor charging and discharging module to alternately charge and discharge based on the first reference voltage and the first and second real-time voltages; the bypass control module is electrically connected with the reference voltage generation module and the bypass reference voltage generation module, and is used for controlling the charging current multiple of the capacitor charging and discharging module based on the first reference voltage and the bypass reference voltage. According to the invention, high-precision frequency output of the oscillator in a wide voltage and wide temperature range can be realized, and a stable and quick starting effect can be achieved in a second period.