219 results about "Relaxation oscillator" patented technology

A microcontroller having a dual mode relax oscillator that is trimmable. In one embodiment, the present invention provides a relaxation oscillator circuit comprising two current sources for establishing a reference voltage for use in causing the relaxation oscillator circuit to operate in two power modes, and a control coupled to both current sources for switching between power modes. In one embodiment, one power mode is a low power mode for standard operation of the microcontroller and one power mode is a very low power mode for use in a sleep mode. In one embodiment, the relaxation oscillator circuit further comprises digitally trimmable components operable to control a current charging a capacitor of the relaxation oscillator circuit to account for process variation in the capacitor, wherein the current is for controlling a frequency of the microcontroller.

The invention provides a relaxation oscillator of which the linearity is significantly improved. The relaxation oscillator comprises an oscillating circuit, a reference level self-regulating circuit and a transmission gate selective signal generating circuit. Capacitor voltage overshoot caused by delay of a control circuit is worked out by detecting the voltage peak of charge and discharge capacitors in the oscillating circuit, and accordingly the reference level of comparators in the oscillating circuit is reduced by a corresponding quantity to serve as a new reference level so that the oscillation amplitude of the charge and discharge capacitors can be just a theoretical value. According to the high-linearity relaxation oscillator, when the new reference level is larger than zero, influence, brought by the capacitor voltage overshoot caused by delay of the control circuit, of the charge and discharge capacitors on output frequency is eliminated, and the linearity of a frequency-control circuit of the relaxation oscillator is significantly improved. The transmission gate selective signal generating circuit provides the initial reference level for the comparators by controlling transmission gates and transmits the new reference level to the reverse phase ends of the comparators when the new reference level is generated, and therefore the initial reference level can be isolated from the reverse phase ends of the comparators.

Precision integrated time reference circuits are disclosed. Preferred embodiments provide time reference circuits that are relatively insensitive to variations in process, supply, and temperature. A preferred embodiment of the invention is disclosed in which a relaxation oscillator according to the invention includes a reference voltage circuit configured to maintain a reference voltage in proportion to actual circuit resistance values. Aspects of the invention also include dynamic compensation for variations in temperature.

The invention discloses an obtaining method of atomic clock reference frequency and atomic clock thereof. The method includes the following steps: a semiconductor laser is driven by a drive current source, and the semiconductor laser is modulated by microwave signals simultaneously; two pumping lasers with same frequency difference and modulating frequency of microwave signals can be generated; the two pumping lasers act on atoms having an Lambda three-level system; when the frequency of microwave signals has deviation with the interval of two lower levels of the Lambda three-level system of the atoms and when the frequency deviation is bigger than spectral half width of coherent population tripping (CPT), a relaxation oscillator signal with the same frequency as CPT detuning transient oscillation is generated; and the frequency of the relaxation oscillator signal is added with the modulating frequency of the microwave signals so as to obtain standard frequency of an atomic clock. The atomic clock designed according to the method has simple structure and omits a locking circuit of the traditional atomic clock, thereby improving the adaptability for the external environment.

The invention discloses a CMOS (complementary metal oxide semiconductor) relaxation oscillator with temperature and process self-compensating characteristics. The CMOS relaxation oscillator comprises a reference source, a capacitor charge and discharge circuit, a first comparator, a second comparator and an SR (set reset) latch, wherein the reference current of the reference source is connected with the capacitor charge and discharge circuit, the reference voltage of the reference source is respectively connected with the same-phase input end of the first comparator and the same-phase input end of the second comparator, the reverse-phase input end of the first comparator and the reverse-phase input end of the second comparator are respectively connected with the capacitor charge and discharge circuit, the output end of the first comparator is connected with the R end of the SR latch, and the output end of the second comparator is connected with the S end of the SR latch. The CMOS relaxation oscillator with temperature and process self-compensating characteristics can overcome the defects of high cost, low reliability, great process deviation and the like in the prior art for realizing the advantages of low cost, high reliability and small process deviation.

A temperature sensor that senses a temperature on the basis of a relaxation oscillator, includes: a bias circuit unit that outputs a bias current increasing with an increase in temperature; a capacitor voltage unit that charges a capacitor with the bias current and discharges the current when receiving a control signal; a pulse generating unit that outputs a pulse when the voltage of the capacitor is higher than a reference voltage, changes the pulse width of the pulse, and transmits the pulse corresponding to the control signal to the capacitor voltage unit; and a counter unit that counts and outputs, as a digital value, the number of pulses outputted from the pulse generating unit, on the basis of a reference frequency.

A relaxation oscillator for generating an oscillator output signal having a predetermined frequency. The relaxation oscillator includes an interleaved charge pump for providing a restoring charge to an integrator in response to at least one charge pump control signal. The relaxation oscillator further includes an integrator having an integrator input connected to the current summing node. The integrator is adapted to produce an integrator output signal having the predetermined frequency at an integrator output. A comparator having an input connected to the integrator output is adapted to generate the oscillator output signal having the predetermined frequency in response to the integrator output signal.

A nanoscale oscillation device is disclosed, wherein two nanoscale droplets are altered in size by mass transport, then contact each other and merge through surface tension. The device may also comprise a channel having an actuator responsive to mechanical oscillation caused by expansion and contraction of the droplets. It further has a structure for delivering atoms between droplets, wherein the droplets are nanoparticles. Provided are a first particle and a second particle on the channel member, both being made of a chargeable material, the second particle contacting the actuator portion; and electrodes connected to the channel member for delivering a potential gradient across the channel and traversing the first and second particles. The particles are spaced apart a specified distance so that atoms from one particle are delivered to the other particle by mass transport in response to the potential (e.g. voltage potential) and the first and second particles are liquid and touch at a predetermined point of growth, thereby causing merging of the second particle into the first particle by surface tension forces and reverse movement of the actuator. In a preferred embodiment, the channel comprises a carbon nanotube and the droplets comprise metal nanoparticles, e.g. indium, which is readily made liquid.

The invention discloses a relaxation oscillator with the frequency jittering function. The relaxation oscillator mainly solves the problem that an existing switching power source is relatively concentrated in energy of electromagnetic interference and has great influences on a power source system. The relaxation oscillator comprises an RC charge-discharge network (201), a first comparator (202), a second comparator (203), an RS trigger (204) and a frequency jittering control module (205). After a sawtooth voltage generated by the RC charge-discharge network (201) is compared with two threshold voltages through the two comparators, the sawtooth voltage is output to the RS trigger (204) to generate square signals with variable frequencies, charging or discharging of the RC charge-discharge network (201) is fed back and controlled by the square signals, the square signals simultaneously serve as clock signals to periodically change the charge-discharge capacitance in the RC charge-discharge network (201) through the frequency jittering control module (205), the frequencies of the output square signals are changed in a linear mode, and therefore the energy of the electromagnetic interference is dispersed. According to the relaxation oscillator, influences of the electromagnetic interference in a switching power source can be effectively reduced, and the relaxation oscillator can be used for management class chips of the switching power source.

A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and / or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). In desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.

The invention provides a relaxation oscillator with a low temperature drift characteristic and a debug method thereof, and relates to an oscillator field. The oscillator circuit comprises a bias module, a register and an oscillation module. The oscillation module is composed of a switching structural circuit, a comparator and a capacitor charging and discharging circuit. The oscillator uses switching structural circuit as a core, and a debug method of a current adjusting mode is combined, such that monolithic integration of the relaxation oscillator is realized while the oscillation frequency of the oscillator obtains excellent temperature stability. The disclosed switching structural circuit in the invention is provided for enable the relaxation oscillator to acquire the good temperature stability. According to a working principle of the circuit, the relaxation oscillator always possesses the good temperature stability no matter threshold voltages with different temperature characteristics are provided to the comparator by components in the switching structural circuit. The relaxation oscillator with the low temperature characteristic in the invention and the debug method thereof are suitable for any standard CMOS technologies.

The invention discloses a current mode comparator based low voltage low power consumption CMOS (Complementary Metal Oxide Semiconductors) relaxation oscillator and a method. The oscillator comprises a current reference source, a current mode comparator, a current source load RS trigger. Compared with current mode comparator based relaxation oscillators in the prior art, the current mode comparator based low voltage low power consumption CMOS relaxation oscillator has the advantages of reducing the sensibility of the RS trigger turnover electric level along with variation of power voltage due to the current source load RS trigger; providing large flexibility for the design of an output square wave signal duty ratio due to a double-capacitor structure; being simple in circuit structure, enabling output oscillation square wave signals to be designed into arbitrary duty ratio and meanwhile overcoming the disadvantages that the traditional relaxation oscillators cannot work under low power voltage and are large in power consumption, sensitive in output frequency along with variation of power voltage and temperature and the like; being particularly suitable for application fields of implantation medical treatment devices, wireless sensor network nodes and the like which require low power voltage and low power consumption.

The invention discloses a relaxation oscillator for increasing frequency-control current linearity. The relaxation oscillator comprises a charge and discharge circuit, a control circuit and a floating charge and discharge capacitor arranged between the charge and discharge circuit and the control circuit. The control circuit detects voltage of the floating charge and discharge capacitor and outputs a control signal. The output signal of the oscillator is determined by only the charge process of the floating charge and discharge capacitor, so that complete-period delay of the oscillator is decreased and frequency-control current linearity of the oscillator is increased. The floating charge and discharge capacitor is formed by parallelly connecting two equal capacitors C1 and C2, and two pole plates of the capacitors C1 and C2 are cross-connected with each other; two ends of the floating charge and discharge capacitor are symmetrical, so that the influence of micro stray capacitance at two ends of the floating charge and discharge capacitor upon the output of the oscillator is decreased.

The present invention discloses a temperature-compensated circuit and method thereof. Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

The invention discloses an on-chip clock generating circuit with lower power consumption. The on-chip clock generating circuit with the lower power consumption comprises a reference current source circuit, a frequency selection circuit, a controlled oscillating circuit and a wave-shaping circuit. The wave-shaping circuit is composed of a comparator, two cascade amplitude limiting circuits and an inverter chain and is used for carrying out amplitude limitation and shaping on the wave shape of output oscillating signals, lowers power consumption and outputs clock signals. The reference current source circuit generates reference current not varying along with the voltage of a power source and temperature, supplies multiple ways of image current sources to the frequency selection circuit, supplies controlled summarize current to a numerical control circuit, inputs the current to the controlled oscillating circuit, changes the frequency of a relaxation oscillator controlled by input current and realizes the functions configurable to the output clock signal frequency. The on-chip clock generating circuit with lower power consumption can be applied to a wake-up circuit and a sensor interface circuit in a wireless transmission radio frequency chip and an on-chip clock generating circuit in a data conversion circuit, and is particularly suitable for the occasions with wide variation range of temperature and voltage of the power source and with high low-power-consumption requirement.

The low-power relaxation oscillator comprises a first module (21) having a ramp generator formed by a reference current source (31) and a storage capacitor (32) defining a ramp voltage (Vramp1), and a voltage comparator (m1, m2) for comparing the ramp voltage with a reference voltage, a second module (22, 41, 42, Vramp2, m3, m4) similar to the first module and an asynchronous flip-flop (23) receiving the output signal of the comparator of the first module at a first input (s) and the output signal of the comparator of the second module at a second input (r). For each module a generator of said reference voltage is configured by adding a reference resistance (33, 43) between the reference current source and the storage capacitor. Thus, the generation of the reference voltage and the ramp voltage is conducted on the very same current branch. This enables the electrical power consumption of the oscillator to be reduced.

The invention relates to a relaxation oscillator with low power consumption, wherein the relaxation oscillator is invented for solving problems like high power consumption and the like in the prior art. The relaxation oscillator comprises a current source generation circuit, a charge and discharge circuit and a delay circuit. The current source generation circuit utilizes a cross voltage formed by connection of a gate and a drain of a first transistor so as to enable a resistor to generate a bias current; the charge and discharge circuits utilize a mirroring current of the bias current to enable a capacitance to be charged, so that a second transistor that has the same characteristics as the first transistor to be conducted; and with utilization of the delay circuit that is connected between a drain of the second transistor and a gate of a third transistor, the capacitance is able to be charged and discharged periodically, so that an oscillation frequency that is independent of a power source voltage is generated and a low power consumption effect is realized.

A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.

A relaxation oscillator improving the linearity of control current-output frequency significantly comprises an oscillating circuit, a delay error detection circuit and a modulating current generation circuit. The delay error detection circuit is used for detecting the peak voltage of charge-discharge capacitors in the oscillating circuit, generates delay error erasure signals according to the peak voltage and enables the oscillator to oscillate at preset frequency. The modulating current generation circuit generates a corresponding additional control current according to the peak voltage of the charge-discharge capacitors, increases the charge rate of the charge-discharge capacitors, eliminates delay influence from the oscillating circuit and improves the linearity of control current-output frequency. Due to the fact that the additional control current output by the modulating current generation circuit enables voltage of the charge-discharge capacitors C1 and C2 to be increased, jittering of the signals output by the relaxation oscillator can be reduced.

The invention provides a relaxation oscillator with average voltage feedback, comprising a two-capacitance relaxation oscillator unit and an average voltage generating circuit unit, wherein the two-capacitance relaxation oscillator unit comprises two current sources which are symmetrical with each other, two comparators, two charging and discharging capacitors, two transmission gates, two phase inverters and an S-R latch. The relaxation oscillator with average voltage feedback of the invention can be used for generating an adjustable threshold voltage for controlling overturn of a comparator by introducing a circuit of the average voltage feedback. When delay time of the comparator is added, the average value of a sawtooth voltage on the charging and discharging capacitor is added too. An average voltage generating circuit is used for adjusting the threshold voltage for overturning the comparator to reduce so that the comparator can be overturned in advance to hold the period of the oscillator not to be changed basically. Through this manner, the relaxation oscillator with average voltage feedback of the invention reduces the requirement of output frequency accuracy in a traditional relaxation oscillator to a response speed of the comparator and realizes closed-loop regulation to the output frequency of the oscillator with a comparator circuit with simple structure and the average voltage generating circuit.

A relaxation oscillator for a transponder capable of measuring one or more parameters (e.g., temperature, pressure) in an object and transmitting a data stream to an external reader / interrogator. The transponder typically operates in a passive mode, deriving its power from an RF interrogation signal received by an antenna system, but c=also operate in a battery-powered active mode. The transponder includes memory for storing measurements, calibration data programmable trim settings, transponder ID and the like. Measurement readings comprise counting oscillations of a measurement signal during a fixed time window. The measurement signal is generated by a relaxation oscillator driven by the alternating charging and discharging of measurement capacitors. wherein the capacitor charging rate is a function of current, and of capacitance. By using a mirror measurement current lo discharge the measurement capacitors, the discharge rate is made approximately equal to the charge rate. The measurement current can be scaled according to programmed trim settings to independently optimize readings for the different measured parameters.

The invention provides a high-precision and self-adapting relaxation oscillator. The high-precision and self-adapting relaxation oscillator offsets time delay produced by a charge-discharge control circuit arranged in an oscillating circuit according to a capacitor precharging principle, and comprises the oscillating circuit, a first capacitor precharging circuit and a second capacitor precharging circuit, wherein the capacitor precharging circuits are used for precharging a charge-discharge capacitor of the oscillator, the oscillating circuit performs charging and discharging on the basis of precharging level of the capacitor precharging circuits, error time delay produced by the capacitor during two times of charging is offset, so that the oscillator works at preset frequency, and frequency-control current linearity is remarkably improved. The time delay is not reduced by directly increasing speed of a comparator or an RS trigger, the time delay produced by the control circuit and influence of imbalance with external environment change are offset through two times of charging processes, the precision of the oscillator is obviously improved, and the oscillator has quite high temperature stability and power supply rejection, namely, adaptability.

The invention relates to a resistance capacitance type relaxation oscillator employing a half-period pre-charge compensation technology. Pre-charge is carried out in the half idle period in each period by use of a timing capacitor so as to compensate time delay td generated by comparators and a latch register. The resistance capacitance type relaxation oscillator comprises one reference voltage generation circuit, two timing capacitor charge and discharge circuits, two reference voltage switching circuits, the two comparators, the SR latch register, one charge and discharge control logic generation circuit and two output buffers. According to the invention, in the first oscillation period after the rising edge of an oscillator control signal arrives, the oscillator frequency is 1 / (2RC+td), and from the second period, the oscillation frequency is frequency 1 / (2RC) with the time delay td eliminated. According to the invention, errors introduced in an oscillator period by the time delay td generated by the comparators and the SR latch register are eliminated fundamentally, and the frequency precision of the oscillator is improved.

The invention discloses an RC relaxation oscillator of a comparator offset, and is used for solving the technical problems that the stabilities of the frequency and the duty ratio of the prior RC relaxation oscillator are bad. The RC relaxation oscillator provided by the technical scheme comprises a reference voltage generating circuit, a capacitor charging-discharging circuit, a comparator and an inverter chain. A charge pump is used to generating two periodic triangular wave signals, the phase difference of which is 180 degrees; and, the comparator compares two triangular wave signals to generate a clock signal. Since the peak-to-peak value of the triangular wave signals is determined by a fixed reference voltage and is irrelevant to the offset voltage of the comparator, the charging or discharging time of the capacitor remains unchanged at each working state, so that the frequency of the oscillator is not changed. Due to the comparator offset, the frequency and the duty ratio of the oscillator are not affected by the offset voltage of the comparator; and, the stabilities of the frequency and the duty ratio are good. And moreover, only one comparator is used, so that the amount of the comparators is reduced by half.

The invention provides a relaxation oscillator. The relaxation oscillator comprises a biasing circuit, an oscillation circuit and a clock generation circuit, wherein the biasing circuit is used for producing biasing current and providing charging current for the oscillation circuit through the biasing current; the oscillation circuit is connected with the biasing circuit and is used for integrating the charging current by using a capacitor so as to produce integrator voltage; reset pulse is produced according to the integrator voltage and is input into the clock generation circuit; the clock generation circuit is connected with the oscillation circuit and is used for producing a clock signal through the reset pulse and controlling the switching of a switch in the oscillation circuit through the clock signal, so that the oscillation circuit can alternately charge or discharge. According to the relaxation oscillator, the frequency stability of the relaxation oscillator can be improved.

Precision integrated time reference circuits are disclosed. Preferred embodiments provide time reference circuits that are relatively insensitive to variations in process, supply, and temperature. A preferred embodiment of the invention is disclosed in which a relaxation oscillator according to the invention includes a reference voltage circuit configured to maintain a reference voltage in proportion to actual circuit resistance values. Aspects of the invention also include dynamic compensation for variations in temperature.

A method for producing an oscillating signal comprises: generating an oscillating signal by discharging after charging to a high trigger level and charging after discharging to a low trigger level; and turbo-charging at the initial of a change-over from charging to discharging while resuming a normal charging / discharging thereafter, and vice versa. The present invention makes use of the turbo-charging / discharging for a linear compensation, such that the produced oscillating signal has the features of concurrently eliminating phase noises and jitters as well as maintaining the modulation linearity.

The keypad interface element of this invention uses a relaxation oscillator and a digital keypad processor having a counter / timer to decode specific keys. The RC portion of the relaxation oscillator includes a resistance ladder and a set of momentary on pushbutton switches disposed change resistance dependent upon which key is pressed. This causes the relaxation oscillator to produce an output signal having a corresponding frequency. The counter / timer of the digital keypad processor produces a count corresponding to the oscillator frequency. The digital keypad processor latches and holds a binary number specifically identifying the depressed key. A state machine in the digital keypad processor provides transient-free, noise immune keypad decoding.