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53results about How to "Reduce junction depth" patented technology

Boron diffusion method for N-type solar cell

The invention discloses a boron diffusion method for an N-type solar cell. The boron diffusion method comprises the following steps: (1) carrying out high-temperature boron source diffusion on an N-type silicon wafer after texturing so as to obtain a P+ emitting electrode; (2) carrying out a reaction for 40 to 60 s at room temperature in a hydrofluoric acid solution to remove borosilicate glass onthe surface of the N-type silicon wafer; (3) washing the N-type silicon wafer with pure water after the borosilicate glass is removed to remove the hydrofluoric acid solution remaining on the surface; (4) putting the N-type silicon wafer after being cleaned with pure water into an NaOH solution for carrying out a reaction for 2 to 5 min so that the square resistance of the N-type silicon wafer isimproved by 8 to 20 ohm/sq; (5) putting the N-type silicon wafer after the square resistance is improved into a hydrofluoric acid and hydrochloric acid mixed solution for washing for 1 to 2 min to remove metal ions and a back oxidation layer; and (6) washing with pure water and drying. According to the method, the square resistance on the surface of the silicon wafer after boron expansion can beuniformly improved, the condition that the concentration of the surface after the boron diffusion of the N-type cell is effectively solved, and the junction depth is improved.

Trench triode and manufacturing method thereof

The invention relates to a trench triode and a manufacturing method thereof. The trench triode comprises an N-type substrate, an N-type epitaxial layer which is formed on the N-type substrate, a P-type base region which is formed on the surface of the N-type epitaxial layer, multiple trenches which penetrate through the P-type base region and extend to the N-type epitaxial layer, a P-type high doped region which is formed on the side wall of multiple trenches, P-type polycrystalline silicon which is arranged in multiple trenches, an N-type region which is formed on the surface of the P-type base region, a TEOS oxide layer which is formed on the P-type polycrystalline silicon and the -type high doped region, emitter polysilicon which is formed on the N-type region, a contact hole which penetrates through the TEOS oxide layer and is corresponding to the P-type polycrystalline silicon, front metal and back metal. The front metal comprises an emitter which is formed on the emitter polysilicon and a base electrode which is formed on the TEOS oxide layer and connected with the P-type polycrystalline silicon through the contact hole. The back metal is formed on the surface, which is awayfrom the N-type epitaxial layer, of the N-type substrate to act as the collecting electrode.
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