The invention belongs to the technical field of programmable logic device and particularly discloses a programmable logic device. The programmable logic device comprises an address circuit module (310), a comparison unit (320), an SRAM (Static Random Access Memory) module (380), a logic array (390) and a resistance RAM module (370) which is used for overcoming the soft error rate in the SRAM module, wherein the resistance RAM module realizes single chip integration with the address circuit module, the comparison unit, the SRAM module and the logic array. The programmable logic device not only can overcome the SER (Symbol Error Rate) problem in the SRAM, but also has the characteristics of single chip, small size, radiation resistance, low power consumption and low cost.