278 results about "Scratchpad memory" patented technology

A method and system of monitoring code after being compiled or assembled is provided. Software code instructions, such as a function preamble and / or a data manipulation instruction, are identified using debug information and then dynamically replaced with an instruction that will branch execution to a scratchpad buffer. A routine is inserted into the scratchpad buffer, and includes instruction(s) to generate output to a trace buffer. Subsequent instructions in the scratchpad may execute the replaced instruction(s) and branch back to the address of the program code immediately following the original address of the replaced instruction.

A system and method for logging and storing failure analysis information on disk drive so that the information is readily and reliably available to vendor customer service and other interested parties is provided. The information, in an illustrative embodiment, is stored on a nonvolatile (flash) random access memory (RAM), found generally in most types of disk drives for storage of updateable disk drive firmware. A known location of limited size is defined in the flash RAM, to form a scratchpad. This scratchpad is a blank area of known addresses, formed during the original firmware download onto the memory, and which is itself free of firmware code. This scratchpad is sufficient in size to write a series of failure codes in a non-erasable list as failures / errors (and user / administrator attempts to unfail the disk) are logged. The log of failures always travels with the drive, and can be read by the vendor to determine the general nature of the most recent failure(s) and whether these failures represent a problematic history for the drive.

A method, system and computer program product are provided for implementing concurrent adapter driver maintenance and recovery for a Single Root Input / Output Virtualization (SRIOV) adapter in a computer system. An adapter driver at start up time performs configuration of the adapter and each of a set of virtual functions (VFs). The adapter driver writes critical adapter and VF configuration data to a scratchpad buffer. When device driver maintenance is needed, such as to load updated adapter driver firmware, all VF drivers are held off temporarily, current adapter driver is detached, and then the adapter driver is reloaded with the updated driver firmware. Then the adapter driver is restarted with the updated adapter driver firmware, and performs a reinitialization process. The adapter driver performs adapter and VF configuration restoring existing configuration using values read from the scratchpad buffer.

The invention discloses a page presenting method and page presenting equipment. The equipment comprises an element logger, an element resolving and rendering device, an element resolving and rendering judger, a temporary element register and an element representing device. The method comprises the following steps that when contents represented on the current window of a browser change, the element resolving and rendering judger judges whether to resolve and render registered elements stored in the temporary element register; and if resolving and rendering are required, the element resolving and rendering device resolves and renders the registered elements stored in the temporary element register. Elements required to be represented in a delayed way are registered, and the registered elements required to be represented in the delayed way are resolved, rendered and represented in the delayed way, so that pictures in a page can be represented and processed in the delayed way, other page elements can be represented and processed in the delayed way, and the display speed of the page is increased effectively.

A RISC-type processor includes a main register file and a data cache. The data cache can be partitioned to include a local memory, the size of which can be dynamically changed on a cache block basis while the processor is executing instructions that use the main register file. The local memory can emulate as an additional register file to the processor and can reside at a virtual address. The local memory can be further partitioned for prefetching data from a non-cacheable address to be stored / loaded into the main register file.

Methods and apparatus for managing stack data in multi-core processors having scratchpad memory or limited local memory. In one embodiment, stack data management calls are inserted into software in accordance with an integer linear programming formulation and a smart stack data management heuristic. In another embodiment, stack management and pointer management functions are inserted before and after function calls and pointer references, respectively. The calls may be inserted in an automated fashion by a compiler utilizing an optimized stack data management runtime library.

A video processing apparatus and methodology are implemented as a combination of a processor and a video decoding hardware block to decode video data by providing the video decoding block with an in-loop filter and a scratch pad memory, so that the in-loop filter may efficiently perform piecewise processing of overlap smoothing and in-loop deblocking in a macroblock-based fashion which is a much more efficient algorithm than the frame-based method.