2 results about "Token ring" patented technology

The application provides a token ring-based SPI backplane bus communication method, and constructs a token ring composed of a master device and slave devices; the master device comprises a master device single-chip microcomputer; the slave devices comprise slave device single-chip microcomputers; the master device single-chip microcomputer and all the slave device single-chip microcomputers are respectively connected with a flip-flop; all the flip-flops are serially cascaded to form a ring shift register for delivering tokens; a communication line is arranged between the master device single-chip microcomputer and the slave device single-chip microcomputers; a slave device obtaining a token obtains the right to access the SPI bus and performs SPI communication with the master device. The application has the advantages that the chip selection signal line is not required to be arranged between the master device and the slave devices, the pin burden of the master device is reduced; the different slave devices do not interfere with each other in communication, the master device reduces the number of chip selection signal lines, the cost is reduced, the transmission of data between the slave devices is ensured to be reliable and stable, and the application does not reduce the data transmission rate.

Methods, systems, and devices for power management associated with memory and a controller are described. A memory system performs a power management operation that accounts for power usage by any combination of application specific integrated circuits (ASICs) and memory arrays. The power management operation includes multiple logical unit numbers (LUNs) assigned to a single ASIC, which increases a quantity of bits for communicating a power usage. An ASIC included in a memory system may utilize twice as many bits for communicating power usage information when compared to a NAND array. As part of the power management operation, an ASIC may transmit, to a controller, a first set of bits indicating a power usage of the ASIC, a first subset of the set of bits transmitted during a first instance of a token ring and a second subset of the set of bits transmitted during a second instance of the token ring.