The invention relates to the technical field of high-speed
data transmission control, and discloses a PCSPMA 10-
gigabit Ethernet data communication
system which comprises a
user interface module, a receiving module, a sending module, a descrambling module, a scrambling module, a search synchronous locking control module and a hardcore configuration control module. According to the invention, data scrambling / descrambling (a parallel operation
shift register mode) is realized by adopting RTL (
Register Transfer Language) design; based on XilinxGigabit
Transceiver hardcore development, a Buffer Bypass mode design is selected, the
delay is lower and fixed, the deviation between Lanes is small, a Gear Box
transmission technology is adopted, a Slip Bit search
synchronization algorithm is achieved,
clock domain rate matching
processing is completed, and low-
delay PCSPMA in multi-path 10-
gigabit Ethernet communication is achieved. Standard AxiStream
bus user interface conversion is realized, and convenience is brought to
transplantation and
multiplexing; meanwhile, user-defined development of high-speed
data transmission based on 64B / 66B coding technology is supported; the method has the advantages of being stable in performance, low in
data transmission delay, reliable, capable of supporting user-defined development, high in flexibility and compatibility and the like.