165 results about "Interrupt request" patented technology

A microprocessor system having an interrupt controller is provided for use in a mobile communications device. Peripheral processing units generate interrupt requests for sending to the microprocessor. The microprocessor has components for responding to interrupt requests by interrupting current processing and performing an interrupt service routine associated with the interrupt request. The interrupt controller receives interrupt requests directed to the microprocessor from the peripheral processing units and for prioritizes the interrupt requests on behalf of the microprocessor. By providing an interrupt controller for prioritizing interrupt requests on behalf of the microprocessor, the microprocessor therefore need not devote significant internal resources to prioritizing the interrupt request signals.

A system, method, and computer program product for reporting and recovering from an internal processor error in a multiprocessor system supporting system management mode. In accordance with the method of the present invention one or more replacement agents are allocated such as during system startup within the multiprocessor system. Machine specific error-reporting registers are monitored for one or more active processor agents during system operation. In response to detecting a faulty agent via the monitoring, a system management interrupt (SMI) request is issued to one or both the faulty agent and a selected replacement agent. In response to receiving the SMI request, the operating state of the faulty agent is copied to the selected replacement agent in system management mode. Operating system processing is then resumed using the replacement agent.

A technique for establishing a perimeter of accountability for usage of digital assets such as data files. The accountability model not only tracks authorized users' access to files, but monitors passage of such files to uncontrollable removable storage media or through network connections and the like which may indicate possible abuse of access. In accordance with a preferred embodiment, an autonomous independent agent process running at a point of use, such as in the background of a client operating system kernel, interrupts requests for access to resources. The agent process senses low level system events, filters, aggregates them, and makes reports to a journaling server. The journaling server analyzes sequences of low level events to detect when aggregate events of interest occur, such as “FileEdit”, network file transfers and the like. Reports can be generated to provide an understanding of how digital assets have been accessed, used or communicated by individuals in an enterprise.

A system and method for establishing communications between first and second parties. In one embodiment, a request initiated by a first party is generated for establishing a communications channel over a first communications network between the first and second parties. An intermediary server device interrupts receipt of the request and attempts to generate the channel. If unsuccessful in the attempt, the server device translates the request into a data network object, which is passed to the second party via a second communications network. The network object enables a second party to communicate acceptance for establishing communication with the first party over the first communications network. The second party invokes the network object upon receipt thereof or at a future time for initiating creation of a communications channel between the first and second parties. Alternately, the first party may establish the network object in the form of a coupon for communication directly to a second party without a first prior attempt to create the channel.

The invention discloses an intelligence real-time robot operating system structure and an operating method thereof. The intelligence real-time robot operating system structure comprises a general-purpose operating system nucleus, a real-time operating system nucleus and an inter-processor interrupt interface, wherein the general-purpose operating system nucleus runs a general-purpose operating system to execute a non-real-time process, the real-time operating system nucleus runs a real-time operating system to execute a real-time process, and the inter-processor interrupt interface is connected between the general-purpose operating system nucleus and the real-time operating system nucleus and used for supporting communication between the non-real-time process and the real-time process. According to the intelligence real-time robot operating system (IRT-ROS) structure, a Linux operating system and an RTERS operating system are allowed to execute a non-real-time process and a real-time process respectively so as to respond to the non-real-time equipment interrupt request and the real-time equipment interrupt request respectively, communication between the non-real-time process and the real-time process is supported, a plurality of Linux drives are integrated, and therefore, the workload of driving general-purpose external equipment is greatly reduced.

An interrupt controller is provided for processing interrupt requests in a system having a plurality of data processing units operable to service those interrupt requests, each interrupt request having an associated priority level. The interrupt controller comprises request logic operable to receive an indication of unserviced interrupt requests, to apply predetermined criteria to determine which of said plurality of data processing units are candidate data processing units for servicing at least one of said unserviced interrupt requests, and to issue a request signal to each said candidate data processing unit. Priority encoding logic is operable to determine a highest priority unserviced interrupt request based on the associated priority levels of the unserviced interrupt requests. Further, handshake logic is operable to receive acknowledgement signals associated with said candidate data processing units replying to said request signals issued by the request logic, upon receipt of a first acknowledgement signal, the handshake logic being operable to allocate to the candidate data processing unit associated with that first acknowledgement signal the highest priority unserviced interrupt request as indicated by the priority encoding logic. By this approach, the highest priority unserviced interrupt request will be allocated to the data processing unit whose associated acknowledgement signal is first received by the handshake logic, and hence this increases the speed with which that highest priority interrupt request is serviced.

A method, medium, and apparatus to effectively handle an interrupt in a reconfigurable array. In the method, the reconfigurable array pauses execution of an operation when an interrupt request occurs, and after storing register values of a register to be used for handling the interrupt request, an interrupt service is performed by select processing units of the reconfigurable array in response to the interrupt request. Upon completion of the interrupt service, the register values are restored, and the reconfigurable array resumes execution of the operation.

An interrupt control device for issuing interrupts to a central processing unit (CPU) includes an object acquiring unit for acquiring data or resource(s) for use by the CPU and an interrupt issuing unit for issuing interrupts to the CPU. The interrupt issuing unit issues each interrupt to the CPU before the object acquiring unit actually acquires the data or the resource, but the interrupt indicates that the data or the resource is available. The interrupt control device further includes a use delay unit for delaying the use of the data or resource by the CPU unit until the object acquiring unit acquires the data or the resource if the CPU which has received the interrupt requests the use of the data or the resource before the object acquiring unit acquires the data or the resource. By adjusting the exact timing of the issuance of the interrupt according to the actual delays experienced by the CPU, the overall delays associated with interrupt handling are minimized.

The invention discloses an interrupt processing method and system based on interrupt nesting. Interrupt sources of various priorities are respectively provided with interrupt counters, and each of the interrupt counters is provided with a saturation value. The interrupt processing method includes: processing the current interrupt During the current interrupt request process of the source, if other interrupt requests from other high-priority interrupt sources are received, the current interrupt request will be interrupted, otherwise the current interrupt request will continue to be processed until the processing is completed; The interrupt counter counts the number of times the current interrupt request is interrupted by the other high-priority interrupt requests, and if the number of interruptions is equal to the saturation value of the interrupt counter, the current interrupt source The priority is increased; the other interrupt requests with high priority are processed until the end, and the current interrupt request is returned to be processed. Thereby, the present invention solves the problem that the low-priority interrupt request cannot be processed for a long time, and improves the interrupt processing efficiency.

A system, apparatus and method for efficiently processing interrupts using general purpose registers in a pipelined processor. In accordance with the present disclosure, a register file may be updated to efficiently save an interrupt return address. When an interrupt request is received by the system's processor, or when the request is issued in the execution of a program, a pseudo-instruction is generated. This pseudo-instruction travels down the pipeline in the same way as other instructions and updates the register file by causing the register file to be written with the return address of the last instruction for which processing has not been completed.

The present invention relates to a sensing system, a sensing device, a control method thereof, a mobile platform, and a storage medium. The control method comprises receiving an interrupt request sentby a second sensing system (700), and determining an interrupt time at which the interrupt request is received (S110); receiving a synchronization timestamp sent by the second sensing system (700), wherein the synchronization timestamp is a moment recorded according to a second local time axis when the interrupt request is sent (S120); and determining a time deviation value according to the interruption time and the synchronization timestamp (S130).