Multi-mode DMA data transmission system

A data transmission system and data transmission technology, applied in the field of microprocessor data transmission, can solve the problems of reduced transmission efficiency and difficulty in channel allocation, and achieve the effect of avoiding the waiting process and improving transmission efficiency

Active Publication Date: 2021-10-01
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the above method, the transmission terminal and the DMA channel are usually in a one-to-one or many-to-one interaction mode, and it is difficult to achieve more flexible channel allocation; the internal FIFO of the DMA channel usually stores data temporarily in a fixed size space, which cannot be better Cooperate with various types of peripherals for data transmission; when there are multiple higher-priority devices requesting data transmission, it is usually necessary to first complete the transmission process of this low-priority data before performing priority arbitration, and select the highest Priority channels are transmitted first. If the current low-priority channel needs to transmit a large amount of data, the transmission efficiency will decrease.

Method used

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  • Multi-mode DMA data transmission system
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  • Multi-mode DMA data transmission system

Examples

Experimental program
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Embodiment

[0068] Such as figure 1 Shown is the overall architecture of the DMA controller in this embodiment.

[0069] The DMA controller adopts a multi-channel data transmission mode and supports two startup modes of software request and hardware handshake. The controller is mainly divided into four modules, which are Slave interface module, Master interface module, data transmission channel module, and channel priority arbitration module.

[0070] The DMA Slave interface module is mainly used in the preprocessing stage before data transmission, and writes the information configured by the microprocessor to the DMA controller channel into the relevant registers through AHB bus addressing. mainly includes:

[0071] Transmission address registers: including transmission source address registers and destination address registers, used to store address information for data transmission.

[0072] Data size register: used to store the data volume information of this transmission.

[0073] ...

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Abstract

The invention discloses a multi-mode DMA data transmission system. The peripheral sends interruption request DMA transmission to the microprocessor or directly sends interruption to the DMA controller to request transmission; according to the two modes, channels of the DMA controller are divided into hardware handshake starting channels and software request starting channels; the channel allocation efficiency is improved in a pre-configuration and flexible replacement mode; a DMA channel FIFO threshold register is configured, an FIFO threshold of a working channel is pre-configured according to application requirements, threshold full interruption of the channel FIFO is obtained, and the data transmission rhythm is flexibly controlled; in order to improve the working efficiency of the system, a channel arbitration mode is provided, and a group of current state temporary storage registers and load_agin marks are used for setting a waiting stack, so that the transmission of a high-priority channel can be carried out without waiting for the completion of the transmission of the current channel.

Description

technical field [0001] The invention belongs to the technical field of microprocessor data transmission, in particular to a multi-mode DMA data transmission system. Background technique [0002] Direct memory access (Direct Memory Access, DMA) is a method applied to computers that completely performs data input / output exchange by hardware. DMA can move data between memory and peripherals by configuring its functional mode. In the DMA mode, the CPU only needs to perform a small amount of initialization operations on the DMA controller before data transmission, and then the CPU does not need to intervene in the data transmission process, and can work concurrently with the DMA, so that the data transmission rate and CPU utilization are both improved. Substantially improved. DMA has been developed so far and has been widely used in microprocessor systems. [0003] The existing DMA transmission has developed a channel allocation method of linked list and queue management, whic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/34
CPCG06F13/34G06F2213/2804
Inventor 樊梦文陈雷毕波高参张占宇陈启亮李海霞樊利芳梅其元薛钰
Owner BEIJING MXTRONICS CORP
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