DMA (Direct Memory Access) address couple pre-reading method based on SATA (Serial Advanced Technology Attachment) controller
An address pair and controller technology, applied in the direction of instruments, electrical digital data processing, etc., can solve problems such as limiting DMA data transmission efficiency, increasing DMA data transmission time, and increasing the number of times to repeatedly fetch memory addresses and lengths.
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[0040] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.
[0041] Such as image 3As shown, the DMA address pair prefetching method based on the SATA controller includes a LIS bus interface module, a DMA state machine, a receiving data buffer, a sending data buffer, an information control module and a prefetching buffer FIFO module;
[0042] LIS bus interface module: provides an interface for the LIS bus connecting the DMA state machine and the memory, and the LIS bus is a data bus for data transmission between the DMA and the memory;
[0043] Receive data cache: cache data written by DMA to memory;
[0044] Send data cache: cache DMA to read data in memory;
[0045] Information control module: process the cross-clock dom...
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