DMA (Direct Memory Access) address couple pre-reading method based on SATA (Serial Advanced Technology Attachment) controller

An address pair and controller technology, applied in the direction of instruments, electrical digital data processing, etc., can solve problems such as limiting DMA data transmission efficiency, increasing DMA data transmission time, and increasing the number of times to repeatedly fetch memory addresses and lengths.

Active Publication Date: 2013-02-20
无锡北方数据计算股份有限公司
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  • Abstract
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AI Technical Summary

Problems solved by technology

The traditional DMA basically needs to go to the memory to fetch the data address and data length every time the DMA transfers data, and then send an interrupt request to the CPU after the operation is completed. The addres

Method used

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  • DMA (Direct Memory Access) address couple pre-reading method based on SATA (Serial Advanced Technology Attachment) controller
  • DMA (Direct Memory Access) address couple pre-reading method based on SATA (Serial Advanced Technology Attachment) controller
  • DMA (Direct Memory Access) address couple pre-reading method based on SATA (Serial Advanced Technology Attachment) controller

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Embodiment Construction

[0040] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0041] Such as image 3As shown, the DMA address pair prefetching method based on the SATA controller includes a LIS bus interface module, a DMA state machine, a receiving data buffer, a sending data buffer, an information control module and a prefetching buffer FIFO module;

[0042] LIS bus interface module: provides an interface for the LIS bus connecting the DMA state machine and the memory, and the LIS bus is a data bus for data transmission between the DMA and the memory;

[0043] Receive data cache: cache data written by DMA to memory;

[0044] Send data cache: cache DMA to read data in memory;

[0045] Information control module: process the cross-clock dom...

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Abstract

The invention discloses a DMA (Direct Memory Access) address couple pre-reading method based on an SATA (Serial Advanced Technology Attachment) controller. A pre-reading cache FIFO (First In, First Out) module is called by hardware logic, wherein the cache FIFO module caches address and length (address couple) pre-operated by the DMA. When the DMA transmits data, a CPU (Central Processing Unit) processes an interrupt request of the DMA, judges data interaction information of a transmission layer, analyzes the address couple information of DMA operation from a data packet, and issues the address couple information of the data to the hardware cache FIFO module by a DCR (Device Control Register) bus. As long as the hardware cache FIFO module is null, the CPU will issue the address couple information to the hardware cache FIFO. When the DMA transmits data, the address couple information is directly red from the hardware cache FIFO, so that the time that the DMA reads the address couple information from a memory to transmit data is saved, the time of waiting the CPU to operate the request of the DMA is not needed, the data transmission efficiency of the DMA is improved while the CUP operation IO (Input-Output) efficiency is improved.

Description

technical field [0001] The invention relates to the storage technology field of computer systems, in particular to a method for prefetching DMA address pairs based on a SATA controller. Background technique [0002] SATA (Serial Advanced Technology Attachment) is a serial advanced technology attachment, a serial hardware drive interface based on industry standards, and a hard disk interface specification jointly proposed by Intel, IBM, Dell, APT, Maxtor and Seagate. [0003] SATA allows users to have high-performance hard drives without sacrificing data integrity. The biggest advantage of SATA is the high transfer rate. The working principle of SATA: use continuous serial method to realize data transmission to obtain higher transmission rate. The transmission rate provided by the SATA1.0 specification released in 2003 has reached 150MB / s, which is not only higher than the 100MB / s (ATA100) provided by ordinary IDE hard disks, but even exceeds the maximum transmission rate o...

Claims

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Application Information

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IPC IPC(8): G06F13/28
Inventor 张庆敏张衡胡刚
Owner 无锡北方数据计算股份有限公司
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