7 results about "Concurrent computing" patented technology

The invention provides an acceleration processing method and device for sparse matrix vector multiplication. The method comprises the following steps: acquiring a sparse matrix; dividing the sparse matrix into segments, and distributing threads for the segments; a matrix multiplication-accumulation instruction in a preset instruction set architecture is called, a tensor calculation core Tensor Core is used for carrying out matrix multiplication calculation of small blocks on the fragments, result data are obtained, and the result data are used for representing vector data objects of the linear equation set solution vectors. According to the method, the obtained sparse matrix is divided into the fragments and the threads are distributed, so that Tensor Core concurrent calculation is realized, the calculation efficiency is greatly improved, and the calculation time is remarkably shortened especially for solving a large-scale linear equation set.

The application provides a data processing method, device and equipment and a storage medium. The method comprises the following steps: obtaining to-be-processed data and a pre-designed calculation graph corresponding to the to-be-processed data; the pre-designed calculation graph represents the relationship between a plurality of operators, the plurality of operators comprise a connection operator and a task operator determined by a data processing task of the to-be-processed data, the task operator comprises an upstream task operator and at least two concurrent task operators; based on the upstream task operator, the to-be-processed data is processed to obtain an upstream data processing result; based on the at least two concurrent task operators, the upstream data processing result is processed concurrently to obtain a concurrent data processing result corresponding to each concurrent task operator; based on the connection operator, the concurrent data processing results corresponding to each concurrent task operator are combined to obtain a data combination result. The application can realize concurrent calculation of a single message among a plurality of operators, shorten the message processing time and improve the system response speed.

This application provides a dynamic empirical route generation method, relating to the field of intelligent scheduling and path planning technology for new energy commercial vehicles. The method includes: collecting multi-dimensional state data across the entire process; filtering valid data from the multi-dimensional state data to generate first state data; constructing a hierarchical energy consumption prediction model, which includes a lightweight model and a high-precision model; employing the NSGA-II algorithm and particle swarm optimization algorithm, with the objective functions of minimizing overall energy cost, minimizing time consumption, and minimizing refueling waiting time, and combining this with the hierarchical energy consumption prediction model to predict energy consumption, thereby generating a candidate route set; determining the total empirical matching score for each candidate route in the candidate route set, and determining the optimal route based on the total empirical matching score. This solution ensures the reliability of range prediction under extreme operating conditions while significantly reducing the load pressure of large-scale concurrent computing in the cloud.

A method, apparatus, medium, and product for generating distributed tile data are disclosed. The method includes, based on the concurrent computing power of a computing cluster, assigning multiple location point information of location data to corresponding computing nodes of the computing cluster to concurrently determine multiple first tile identifiers corresponding to at least some of the multiple location point information, and multiple pixels for the multiple location point information, wherein at least two location point information corresponding to the same first tile identifier are assigned to different computing nodes of the computing cluster. The method also includes, based on the multiple first tile identifiers, assigning multiple pixels to corresponding computing nodes of the computing cluster to concurrently generate multiple first tiles with multiple first tile identifiers, each first tile being uniquely identified by its corresponding first tile identifier, wherein at least two pixels corresponding to the same first tile identifier are assigned to the same computing node of the computing cluster.

The invention discloses a relational data restoration value evaluation and cleaning decision method and system, and aims to solve the problems that when a multi-field combination in relational data is restored, a CPU (Central Processing Unit) cannot complete utility evaluation within a limited time delay in a large-scale concurrent computing scene; the problem that cleaning resource allocation is low in efficiency due to the fact that the repair value cannot be estimated in real time and an executable priority ranking basis cannot be provided for computer hardware due to the fact that candidate distribution, model parameters and a verification set cannot be maintained in a limited memory for simultaneous residence operation is solved. Obtaining a request of a to-be-repaired field according to an abnormal result of the relational data and the problem label set, calculating and decomposing joint conditional distribution of the relational data corresponding to the request to obtain a candidate repair field set, solving an expected utility increment and a mean value of the relational data of the candidate repair field, obtaining a cleaning value of each relational data, and obtaining a to-be-repaired field; and traversing all the relational data in a descending order according to the calculated unit budget score, and obtaining a repair list in combination with a preset cost budget.

The application provides a kind of intelligent chip memory access control method and system based on high concurrency computing, applied to high-frequency random memory access scene, method includes: in response to the multiple memory access requests generated by multiple concurrent computing tasks, each memory access request contains the memory address to be accessed;Multiple memory access requests are temporarily stored in request buffer data structure;Detect whether multiple memory access requests temporarily stored in request buffer data structure point to the same memory page;In response to detecting that at least two memory access requests point to the same memory page, at least two memory access requests are merged to generate a merged memory access instruction, and the merged memory access instruction is sent to the memory controller to perform a one-time memory read operation.The application improves the probability of accessing the same page for high concurrency characteristics, reduces the demand for hardware resources, and significantly improves the memory bandwidth utilization and overall system performance.

The invention provides a special function calculation method and a special function unit calculation core of a multi-core processor, the method comprises that the multi-core processor comprises a plurality of cores and the special function unit calculation core in communication connection with the plurality of cores, and the special function unit calculation core comprises a calculation scheduling module and a plurality of calculation units. And the calculation scheduling module receives a task request of a source core in the plurality of cores, matches a target calculation unit in an idle state for the task request in the plurality of calculation units, and allocates the task request to the target calculation unit for calculation, so that the target calculation unit returns an obtained calculation result to the source core. According to the method, the task request is intelligently distributed through the calculation scheduling module, and the idle target calculation unit is dynamically matched in the multiple calculation units to process the task request, so that the calculation efficiency of the SFU in a high-concurrency calculation scene is effectively improved, the calculation delay is reduced, and the overall calculation performance of the multi-core processor is guaranteed.